test_spi_slave.c 4.9 KB

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  1. /*
  2. Tests for the spi_slave device driver
  3. */
  4. #include <string.h>
  5. #include "unity.h"
  6. #include "driver/spi_master.h"
  7. #include "driver/spi_slave.h"
  8. #include "esp_log.h"
  9. #include "sdkconfig.h"
  10. #ifndef CONFIG_SPIRAM_SUPPORT
  11. //This test should be removed once the timing test is merged.
  12. #define PIN_NUM_MISO 25
  13. #define PIN_NUM_MOSI 23
  14. #define PIN_NUM_CLK 19
  15. #define PIN_NUM_CS 22
  16. static const char MASTER_TAG[] = "test_master";
  17. static const char SLAVE_TAG[] = "test_slave";
  18. #define MASTER_SEND {0x93, 0x34, 0x56, 0x78, 0x9a, 0xbc, 0xde, 0xf0, 0xaa, 0xcc, 0xff, 0xee, 0x55, 0x77, 0x88, 0x43}
  19. #define SLAVE_SEND { 0xaa, 0xdc, 0xba, 0x98, 0x76, 0x54, 0x32, 0x10, 0x13, 0x57, 0x9b, 0xdf, 0x24, 0x68, 0xac, 0xe0 }
  20. static inline void int_connect( uint32_t gpio, uint32_t sigo, uint32_t sigi )
  21. {
  22. gpio_matrix_out( gpio, sigo, false, false );
  23. gpio_matrix_in( gpio, sigi, false );
  24. }
  25. static void master_init_nodma( spi_device_handle_t* spi)
  26. {
  27. esp_err_t ret;
  28. spi_bus_config_t buscfg={
  29. .miso_io_num=PIN_NUM_MISO,
  30. .mosi_io_num=PIN_NUM_MOSI,
  31. .sclk_io_num=PIN_NUM_CLK,
  32. .quadwp_io_num=-1,
  33. .quadhd_io_num=-1
  34. };
  35. spi_device_interface_config_t devcfg={
  36. .clock_speed_hz=4*1000*1000, //currently only up to 4MHz for internel connect
  37. .mode=0, //SPI mode 0
  38. .spics_io_num=PIN_NUM_CS, //CS pin
  39. .queue_size=7, //We want to be able to queue 7 transactions at a time
  40. .pre_cb=NULL,
  41. .cs_ena_posttrans=1,
  42. };
  43. //Initialize the SPI bus
  44. ret=spi_bus_initialize(HSPI_HOST, &buscfg, 0);
  45. TEST_ASSERT(ret==ESP_OK);
  46. //Attach the LCD to the SPI bus
  47. ret=spi_bus_add_device(HSPI_HOST, &devcfg, spi);
  48. TEST_ASSERT(ret==ESP_OK);
  49. }
  50. static void slave_init()
  51. {
  52. //Configuration for the SPI bus
  53. spi_bus_config_t buscfg={
  54. .mosi_io_num=PIN_NUM_MOSI,
  55. .miso_io_num=PIN_NUM_MISO,
  56. .sclk_io_num=PIN_NUM_CLK
  57. };
  58. //Configuration for the SPI slave interface
  59. spi_slave_interface_config_t slvcfg={
  60. .mode=0,
  61. .spics_io_num=PIN_NUM_CS,
  62. .queue_size=3,
  63. .flags=0,
  64. };
  65. //Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
  66. gpio_set_pull_mode(PIN_NUM_MOSI, GPIO_PULLUP_ONLY);
  67. gpio_set_pull_mode(PIN_NUM_CLK, GPIO_PULLUP_ONLY);
  68. gpio_set_pull_mode(PIN_NUM_CS, GPIO_PULLUP_ONLY);
  69. //Initialize SPI slave interface
  70. TEST_ESP_OK( spi_slave_initialize(VSPI_HOST, &buscfg, &slvcfg, 2) );
  71. }
  72. TEST_CASE("test slave send unaligned","[spi]")
  73. {
  74. WORD_ALIGNED_ATTR uint8_t master_txbuf[320]=MASTER_SEND;
  75. WORD_ALIGNED_ATTR uint8_t master_rxbuf[320];
  76. WORD_ALIGNED_ATTR uint8_t slave_txbuf[320]=SLAVE_SEND;
  77. WORD_ALIGNED_ATTR uint8_t slave_rxbuf[320];
  78. spi_device_handle_t spi;
  79. //initial master
  80. master_init_nodma( &spi );
  81. //initial slave
  82. slave_init();
  83. //do internal connection
  84. int_connect( PIN_NUM_MOSI, HSPID_OUT_IDX, VSPIQ_IN_IDX );
  85. int_connect( PIN_NUM_MISO, VSPIQ_OUT_IDX, HSPID_IN_IDX );
  86. int_connect( PIN_NUM_CS, HSPICS0_OUT_IDX, VSPICS0_IN_IDX );
  87. int_connect( PIN_NUM_CLK, HSPICLK_OUT_IDX, VSPICLK_IN_IDX );
  88. for ( int i = 0; i < 4; i ++ ) {
  89. //slave send
  90. spi_slave_transaction_t slave_t;
  91. spi_slave_transaction_t* out;
  92. memset(&slave_t, 0, sizeof(spi_slave_transaction_t));
  93. slave_t.length=8*32;
  94. slave_t.tx_buffer=slave_txbuf+i;
  95. slave_t.rx_buffer=slave_rxbuf;
  96. TEST_ESP_OK( spi_slave_queue_trans( VSPI_HOST, &slave_t, portMAX_DELAY ) );
  97. //send
  98. spi_transaction_t t = {};
  99. t.length = 32*(i+1);
  100. if ( t.length != 0 ) {
  101. t.tx_buffer = master_txbuf+i;
  102. t.rx_buffer = master_rxbuf+i;
  103. }
  104. spi_device_transmit( spi, (spi_transaction_t*)&t );
  105. //wait for end
  106. TEST_ESP_OK( spi_slave_get_trans_result( VSPI_HOST, &out, portMAX_DELAY ) );
  107. //show result
  108. ESP_LOGI(SLAVE_TAG, "trans_len: %d", slave_t.trans_len);
  109. ESP_LOG_BUFFER_HEX( "master tx", t.tx_buffer, t.length/8 );
  110. ESP_LOG_BUFFER_HEX( "master rx", t.rx_buffer, t.length/8 );
  111. ESP_LOG_BUFFER_HEX( "slave tx", slave_t.tx_buffer, (slave_t.trans_len+7)/8);
  112. ESP_LOG_BUFFER_HEX( "slave rx", slave_t.rx_buffer, (slave_t.trans_len+7)/8);
  113. TEST_ASSERT_EQUAL_HEX8_ARRAY( t.tx_buffer, slave_t.rx_buffer, t.length/8 );
  114. TEST_ASSERT_EQUAL_HEX8_ARRAY( slave_t.tx_buffer, t.rx_buffer, t.length/8 );
  115. TEST_ASSERT_EQUAL( t.length, slave_t.trans_len );
  116. //clean
  117. memset( master_rxbuf, 0x66, sizeof(master_rxbuf));
  118. memset( slave_rxbuf, 0x66, sizeof(slave_rxbuf));
  119. }
  120. TEST_ASSERT(spi_slave_free(VSPI_HOST) == ESP_OK);
  121. TEST_ASSERT(spi_bus_remove_device(spi) == ESP_OK);
  122. TEST_ASSERT(spi_bus_free(HSPI_HOST) == ESP_OK);
  123. ESP_LOGI(MASTER_TAG, "test passed.");
  124. }
  125. #endif // !CONFIG_SPIRAM_SUPPORT