core_dump.c 23 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <string.h>
  14. #include "freertos/FreeRTOS.h"
  15. #include "freertos/task.h"
  16. #include "soc/uart_reg.h"
  17. #include "soc/io_mux_reg.h"
  18. #include "soc/timer_group_struct.h"
  19. #include "soc/timer_group_reg.h"
  20. #include "driver/gpio.h"
  21. #include "rom/crc.h"
  22. #include "esp_panic.h"
  23. #include "esp_partition.h"
  24. #include "esp_clk.h"
  25. #include "esp_core_dump.h"
  26. #include "esp_log.h"
  27. const static DRAM_ATTR char TAG[] __attribute__((unused)) = "esp_core_dump";
  28. typedef uint32_t core_dump_crc_t;
  29. #if CONFIG_ESP32_ENABLE_COREDUMP
  30. #define ESP_COREDUMP_LOG( level, format, ... ) if (LOG_LOCAL_LEVEL >= level) { ets_printf(DRAM_STR(format), esp_log_early_timestamp(), (const char *)TAG, ##__VA_ARGS__); }
  31. #define ESP_COREDUMP_LOGE( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_ERROR, LOG_FORMAT(E, format), ##__VA_ARGS__)
  32. #define ESP_COREDUMP_LOGW( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_WARN, LOG_FORMAT(W, format), ##__VA_ARGS__)
  33. #define ESP_COREDUMP_LOGI( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_INFO, LOG_FORMAT(I, format), ##__VA_ARGS__)
  34. #define ESP_COREDUMP_LOGD( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_DEBUG, LOG_FORMAT(D, format), ##__VA_ARGS__)
  35. #define ESP_COREDUMP_LOGV( format, ... ) ESP_COREDUMP_LOG(ESP_LOG_VERBOSE, LOG_FORMAT(V, format), ##__VA_ARGS__)
  36. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  37. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) ESP_COREDUMP_LOGD(format, ##__VA_ARGS__)
  38. #else
  39. #define ESP_COREDUMP_LOG_PROCESS( format, ... ) do{/*(__VA_ARGS__);*/}while(0)
  40. #endif
  41. #define COREDUMP_MAX_TASK_STACK_SIZE (64*1024)
  42. #define COREDUMP_VERSION 1
  43. typedef esp_err_t (*esp_core_dump_write_prepare_t)(void *priv, uint32_t *data_len);
  44. typedef esp_err_t (*esp_core_dump_write_start_t)(void *priv);
  45. typedef esp_err_t (*esp_core_dump_write_end_t)(void *priv);
  46. typedef esp_err_t (*esp_core_dump_flash_write_data_t)(void *priv, void * data, uint32_t data_len);
  47. /** core dump emitter control structure */
  48. typedef struct _core_dump_write_config_t
  49. {
  50. // this function is called before core dump data writing
  51. // used for sanity checks
  52. esp_core_dump_write_prepare_t prepare;
  53. // this function is called at the beginning of data writing
  54. esp_core_dump_write_start_t start;
  55. // this function is called when all dump data are written
  56. esp_core_dump_write_end_t end;
  57. // this function is called to write data chunk
  58. esp_core_dump_flash_write_data_t write;
  59. // number of tasks with corrupted TCBs
  60. uint32_t bad_tasks_num;
  61. // pointer to data which are specific for particular core dump emitter
  62. void * priv;
  63. } core_dump_write_config_t;
  64. /** core dump data header */
  65. typedef struct _core_dump_header_t
  66. {
  67. uint32_t data_len; // data length
  68. uint32_t version; // core dump struct version
  69. uint32_t tasks_num; // number of tasks
  70. uint32_t tcb_sz; // size of TCB
  71. } core_dump_header_t;
  72. /** core dump task data header */
  73. typedef struct _core_dump_task_header_t
  74. {
  75. void * tcb_addr; // TCB address
  76. uint32_t stack_start; // stack start address
  77. uint32_t stack_end; // stack end address
  78. } core_dump_task_header_t;
  79. static inline bool esp_task_stack_start_is_sane(uint32_t sp)
  80. {
  81. return !(sp < 0x3ffae010UL || sp > 0x3fffffffUL);
  82. }
  83. static inline bool esp_tcb_addr_is_sane(uint32_t addr, uint32_t sz)
  84. {
  85. //TODO: currently core dump supports TCBs in DRAM only, external SRAM not supported yet
  86. return !(addr < 0x3ffae000UL || (addr + sz) > 0x40000000UL);
  87. }
  88. static void esp_core_dump_write(XtExcFrame *frame, core_dump_write_config_t *write_cfg)
  89. {
  90. int cur_task_bad = 0;
  91. esp_err_t err;
  92. TaskSnapshot_t tasks[CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM];
  93. UBaseType_t tcb_sz, tcb_sz_padded, task_num;
  94. uint32_t data_len = 0, i, len;
  95. union
  96. {
  97. core_dump_header_t hdr;
  98. core_dump_task_header_t task_hdr;
  99. } dump_data;
  100. task_num = uxTaskGetSnapshotAll(tasks, CONFIG_ESP32_CORE_DUMP_MAX_TASKS_NUM, &tcb_sz);
  101. // take TCB padding into account, actual TCB size will be stored in header
  102. if (tcb_sz % sizeof(uint32_t))
  103. tcb_sz_padded = (tcb_sz / sizeof(uint32_t) + 1) * sizeof(uint32_t);
  104. else
  105. tcb_sz_padded = tcb_sz;
  106. // header + tasknum*(tcb + stack start/end + tcb addr)
  107. data_len = sizeof(core_dump_header_t) + task_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
  108. for (i = 0; i < task_num; i++) {
  109. if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
  110. ESP_COREDUMP_LOG_PROCESS("Bad TCB addr %x!", tasks[i].pxTCB);
  111. write_cfg->bad_tasks_num++;
  112. continue;
  113. }
  114. if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
  115. // set correct stack top for current task
  116. tasks[i].pxTopOfStack = (StackType_t *)frame;
  117. // This field is not initialized for crashed task, but stack frame has the structure of interrupt one,
  118. // so make workaround to allow espcoredump to parse it properly.
  119. if (frame->exit == 0)
  120. frame->exit = -1;
  121. ESP_COREDUMP_LOG_PROCESS("Current task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  122. frame->exit, frame->pc, frame->ps, frame->a0, frame->a1);
  123. }
  124. else {
  125. XtSolFrame *task_frame = (XtSolFrame *)tasks[i].pxTopOfStack;
  126. if (task_frame->exit == 0) {
  127. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  128. task_frame->exit, task_frame->pc, task_frame->ps, task_frame->a0, task_frame->a1);
  129. }
  130. else {
  131. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  132. XtExcFrame *task_frame2 = (XtExcFrame *)tasks[i].pxTopOfStack;
  133. ESP_COREDUMP_LOG_PROCESS("Task EXIT/PC/PS/A0/SP %x %x %x %x %x",
  134. task_frame2->exit, task_frame2->pc, task_frame2->ps, task_frame2->a0, task_frame2->a1);
  135. #endif
  136. }
  137. }
  138. len = (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack;
  139. // check task's stack
  140. if (!esp_stack_ptr_is_sane((uint32_t)tasks[i].pxTopOfStack) || !esp_task_stack_start_is_sane((uint32_t)tasks[i].pxEndOfStack)
  141. || len > COREDUMP_MAX_TASK_STACK_SIZE) {
  142. if (tasks[i].pxTCB == xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID())) {
  143. cur_task_bad = 1;
  144. }
  145. ESP_COREDUMP_LOG_PROCESS("Corrupted TCB %x: stack len %lu, top %x, end %x!",
  146. tasks[i].pxTCB, len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
  147. tasks[i].pxTCB = 0; // make TCB addr invalid to skip it in dump
  148. write_cfg->bad_tasks_num++;
  149. } else {
  150. ESP_COREDUMP_LOG_PROCESS("Stack len = %lu (%x %x)", len, tasks[i].pxTopOfStack, tasks[i].pxEndOfStack);
  151. // take stack padding into account
  152. len = (len + sizeof(uint32_t) - 1) & ~(sizeof(uint32_t) - 1);
  153. data_len += len;
  154. }
  155. }
  156. data_len -= write_cfg->bad_tasks_num*(tcb_sz_padded + sizeof(core_dump_task_header_t));
  157. ESP_COREDUMP_LOG_PROCESS("Core dump len = %lu (%d %d)", data_len, task_num, write_cfg->bad_tasks_num);
  158. // prepare write
  159. if (write_cfg->prepare) {
  160. err = write_cfg->prepare(write_cfg->priv, &data_len);
  161. if (err != ESP_OK) {
  162. ESP_COREDUMP_LOGE("Failed to prepare core dump (%d)!", err);
  163. return;
  164. }
  165. }
  166. // write start
  167. if (write_cfg->start) {
  168. err = write_cfg->start(write_cfg->priv);
  169. if (err != ESP_OK) {
  170. ESP_COREDUMP_LOGE("Failed to start core dump (%d)!", err);
  171. return;
  172. }
  173. }
  174. // write header
  175. dump_data.hdr.data_len = data_len;
  176. dump_data.hdr.version = COREDUMP_VERSION;
  177. dump_data.hdr.tasks_num = task_num - write_cfg->bad_tasks_num;
  178. dump_data.hdr.tcb_sz = tcb_sz;
  179. err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_header_t));
  180. if (err != ESP_OK) {
  181. ESP_COREDUMP_LOGE("Failed to write core dump header (%d)!", err);
  182. return;
  183. }
  184. // write tasks
  185. for (i = 0; i < task_num; i++) {
  186. if (!esp_tcb_addr_is_sane((uint32_t)tasks[i].pxTCB, tcb_sz)) {
  187. ESP_COREDUMP_LOG_PROCESS("Skip TCB with bad addr %x!", tasks[i].pxTCB);
  188. continue;
  189. }
  190. ESP_COREDUMP_LOG_PROCESS("Dump task %x", tasks[i].pxTCB);
  191. // save TCB address, stack base and stack top addr
  192. dump_data.task_hdr.tcb_addr = tasks[i].pxTCB;
  193. dump_data.task_hdr.stack_start = (uint32_t)tasks[i].pxTopOfStack;
  194. dump_data.task_hdr.stack_end = (uint32_t)tasks[i].pxEndOfStack;
  195. err = write_cfg->write(write_cfg->priv, &dump_data, sizeof(core_dump_task_header_t));
  196. if (err != ESP_OK) {
  197. ESP_COREDUMP_LOGE("Failed to write task header (%d)!", err);
  198. return;
  199. }
  200. // save TCB
  201. err = write_cfg->write(write_cfg->priv, tasks[i].pxTCB, tcb_sz);
  202. if (err != ESP_OK) {
  203. ESP_COREDUMP_LOGE("Failed to write TCB (%d)!", err);
  204. return;
  205. }
  206. // save task stack
  207. if (tasks[i].pxTopOfStack != 0 && tasks[i].pxEndOfStack != 0) {
  208. err = write_cfg->write(write_cfg->priv, tasks[i].pxTopOfStack,
  209. (uint32_t)tasks[i].pxEndOfStack - (uint32_t)tasks[i].pxTopOfStack);
  210. if (err != ESP_OK) {
  211. ESP_COREDUMP_LOGE("Failed to write task stack (%d)!", err);
  212. return;
  213. }
  214. } else {
  215. ESP_COREDUMP_LOG_PROCESS("Skip corrupted task %x stack!", tasks[i].pxTCB);
  216. }
  217. }
  218. // write end
  219. if (write_cfg->end) {
  220. err = write_cfg->end(write_cfg->priv);
  221. if (err != ESP_OK) {
  222. ESP_COREDUMP_LOGE("Failed to end core dump (%d)!", err);
  223. return;
  224. }
  225. }
  226. if (write_cfg->bad_tasks_num) {
  227. ESP_COREDUMP_LOGE("Skipped %d tasks with bad TCB!", write_cfg->bad_tasks_num);
  228. if (cur_task_bad) {
  229. ESP_COREDUMP_LOGE("Crashed task has been skipped!");
  230. }
  231. }
  232. }
  233. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  234. typedef struct _core_dump_write_flash_data_t
  235. {
  236. uint32_t off; // current offset in partition
  237. core_dump_crc_t crc; // CRC of dumped data
  238. } core_dump_write_flash_data_t;
  239. typedef struct _core_dump_partition_t
  240. {
  241. // core dump partition start
  242. uint32_t start;
  243. // core dump partition size
  244. uint32_t size;
  245. } core_dump_partition_t;
  246. typedef struct _core_dump_flash_config_t
  247. {
  248. // core dump partition config
  249. core_dump_partition_t partition;
  250. // CRC of core dump partition config
  251. core_dump_crc_t partition_config_crc;
  252. } core_dump_flash_config_t;
  253. // core dump flash data
  254. static core_dump_flash_config_t s_core_flash_config;
  255. static inline core_dump_crc_t esp_core_dump_calc_flash_config_crc(void)
  256. {
  257. return crc32_le(0, (uint8_t const *)&s_core_flash_config.partition, sizeof(s_core_flash_config.partition));
  258. }
  259. static uint32_t esp_core_dump_write_flash_padded(size_t off, uint8_t *data, uint32_t data_size)
  260. {
  261. esp_err_t err;
  262. uint32_t data_len = 0, k, len;
  263. union
  264. {
  265. uint8_t data8[4];
  266. uint32_t data32;
  267. } rom_data;
  268. data_len = (data_size / sizeof(uint32_t)) * sizeof(uint32_t);
  269. assert(off >= s_core_flash_config.partition.start);
  270. assert((off + data_len + (data_size % sizeof(uint32_t) ? sizeof(uint32_t) : 0)) <=
  271. s_core_flash_config.partition.start + s_core_flash_config.partition.size);
  272. err = spi_flash_write(off, data, data_len);
  273. if (err != ESP_OK) {
  274. ESP_COREDUMP_LOGE("Failed to write data to flash (%d)!", err);
  275. return 0;
  276. }
  277. len = data_size % sizeof(uint32_t);
  278. if (len) {
  279. // write last bytes with padding, actual TCB len can be retrieved by esptool from core dump header
  280. rom_data.data32 = 0;
  281. for (k = 0; k < len; k++) {
  282. rom_data.data8[k] = *(data + data_len + k);
  283. }
  284. err = spi_flash_write(off + data_len, &rom_data, sizeof(uint32_t));
  285. if (err != ESP_OK) {
  286. ESP_COREDUMP_LOGE("Failed to finish write data to flash (%d)!", err);
  287. return 0;
  288. }
  289. data_len += sizeof(uint32_t);
  290. }
  291. return data_len;
  292. }
  293. static esp_err_t esp_core_dump_flash_write_prepare(void *priv, uint32_t *data_len)
  294. {
  295. esp_err_t err;
  296. uint32_t sec_num;
  297. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  298. // check for available space in partition
  299. if ((*data_len + sizeof(uint32_t)) > s_core_flash_config.partition.size) {
  300. ESP_COREDUMP_LOGE("Not enough space to save core dump!");
  301. return ESP_ERR_NO_MEM;
  302. }
  303. // add space for CRC
  304. *data_len += sizeof(core_dump_crc_t);
  305. memset(wr_data, 0, sizeof(*wr_data));
  306. sec_num = *data_len / SPI_FLASH_SEC_SIZE;
  307. if (*data_len % SPI_FLASH_SEC_SIZE) {
  308. sec_num++;
  309. }
  310. assert(sec_num * SPI_FLASH_SEC_SIZE <= s_core_flash_config.partition.size);
  311. err = spi_flash_erase_range(s_core_flash_config.partition.start + 0, sec_num * SPI_FLASH_SEC_SIZE);
  312. if (err != ESP_OK) {
  313. ESP_COREDUMP_LOGE("Failed to erase flash (%d)!", err);
  314. return err;
  315. }
  316. return err;
  317. }
  318. static esp_err_t esp_core_dump_flash_write_word(core_dump_write_flash_data_t *wr_data, uint32_t word)
  319. {
  320. esp_err_t err = ESP_OK;
  321. uint32_t data32 = word;
  322. assert(wr_data->off + sizeof(uint32_t) <= s_core_flash_config.partition.size);
  323. err = spi_flash_write(s_core_flash_config.partition.start + wr_data->off, &data32, sizeof(uint32_t));
  324. if (err != ESP_OK) {
  325. ESP_COREDUMP_LOGE("Failed to write to flash (%d)!", err);
  326. return err;
  327. }
  328. wr_data->off += sizeof(uint32_t);
  329. return err;
  330. }
  331. static esp_err_t esp_core_dump_flash_write_start(void *priv)
  332. {
  333. return ESP_OK;
  334. }
  335. static esp_err_t esp_core_dump_flash_write_end(void *priv)
  336. {
  337. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  338. #if LOG_LOCAL_LEVEL >= ESP_LOG_DEBUG
  339. union
  340. {
  341. uint8_t data8[16];
  342. uint32_t data32[4];
  343. } rom_data;
  344. esp_err_t err = spi_flash_read(s_core_flash_config.partition.start + 0, &rom_data, sizeof(rom_data));
  345. if (err != ESP_OK) {
  346. ESP_COREDUMP_LOGE("Failed to read flash (%d)!", err);
  347. return err;
  348. } else {
  349. ESP_COREDUMP_LOG_PROCESS("Data from flash:");
  350. for (uint32_t i = 0; i < sizeof(rom_data)/sizeof(rom_data.data32[0]); i++) {
  351. ESP_COREDUMP_LOG_PROCESS("%x", rom_data.data32[i]);
  352. }
  353. }
  354. #endif
  355. // write core dump CRC
  356. ESP_COREDUMP_LOG_PROCESS("Dump data CRC = 0x%x", wr_data->crc);
  357. return esp_core_dump_flash_write_word(wr_data, wr_data->crc);
  358. }
  359. static esp_err_t esp_core_dump_flash_write_data(void *priv, void * data, uint32_t data_len)
  360. {
  361. esp_err_t err = ESP_OK;
  362. core_dump_write_flash_data_t *wr_data = (core_dump_write_flash_data_t *)priv;
  363. uint32_t len = esp_core_dump_write_flash_padded(s_core_flash_config.partition.start + wr_data->off, data, data_len);
  364. if (len != data_len) {
  365. return ESP_FAIL;
  366. }
  367. wr_data->off += len;
  368. wr_data->crc = crc32_le(wr_data->crc, data, data_len);
  369. return err;
  370. }
  371. void esp_core_dump_to_flash(XtExcFrame *frame)
  372. {
  373. core_dump_write_config_t wr_cfg;
  374. core_dump_write_flash_data_t wr_data;
  375. core_dump_crc_t crc = esp_core_dump_calc_flash_config_crc();
  376. if (s_core_flash_config.partition_config_crc != crc) {
  377. ESP_COREDUMP_LOGE("Core dump flash config is corrupted! CRC=0x%x instead of 0x%x", crc, s_core_flash_config.partition_config_crc);
  378. return;
  379. }
  380. // check that partition can hold at least core dump data length
  381. if (s_core_flash_config.partition.start == 0 || s_core_flash_config.partition.size < sizeof(uint32_t)) {
  382. ESP_COREDUMP_LOGE("Invalid flash partition config!");
  383. return;
  384. }
  385. /* init non-OS flash access critical section */
  386. spi_flash_guard_set(&g_flash_guard_no_os_ops);
  387. memset(&wr_cfg, 0, sizeof(wr_cfg));
  388. wr_cfg.prepare = esp_core_dump_flash_write_prepare;
  389. wr_cfg.start = esp_core_dump_flash_write_start;
  390. wr_cfg.end = esp_core_dump_flash_write_end;
  391. wr_cfg.write = esp_core_dump_flash_write_data;
  392. wr_cfg.priv = &wr_data;
  393. ESP_COREDUMP_LOGI("Save core dump to flash...");
  394. esp_core_dump_write(frame, &wr_cfg);
  395. ESP_COREDUMP_LOGI("Core dump has been saved to flash.");
  396. }
  397. #endif
  398. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  399. static void esp_core_dump_b64_encode(const uint8_t *src, uint32_t src_len, uint8_t *dst) {
  400. const static DRAM_ATTR char b64[] =
  401. "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
  402. int i, j, a, b, c;
  403. for (i = j = 0; i < src_len; i += 3) {
  404. a = src[i];
  405. b = i + 1 >= src_len ? 0 : src[i + 1];
  406. c = i + 2 >= src_len ? 0 : src[i + 2];
  407. dst[j++] = b64[a >> 2];
  408. dst[j++] = b64[((a & 3) << 4) | (b >> 4)];
  409. if (i + 1 < src_len) {
  410. dst[j++] = b64[(b & 0x0F) << 2 | (c >> 6)];
  411. }
  412. if (i + 2 < src_len) {
  413. dst[j++] = b64[c & 0x3F];
  414. }
  415. }
  416. while (j % 4 != 0) {
  417. dst[j++] = '=';
  418. }
  419. dst[j++] = '\0';
  420. }
  421. static esp_err_t esp_core_dump_uart_write_start(void *priv)
  422. {
  423. esp_err_t err = ESP_OK;
  424. ets_printf(DRAM_STR("================= CORE DUMP START =================\r\n"));
  425. return err;
  426. }
  427. static esp_err_t esp_core_dump_uart_write_end(void *priv)
  428. {
  429. esp_err_t err = ESP_OK;
  430. ets_printf(DRAM_STR("================= CORE DUMP END =================\r\n"));
  431. return err;
  432. }
  433. static esp_err_t esp_core_dump_uart_write_data(void *priv, void * data, uint32_t data_len)
  434. {
  435. esp_err_t err = ESP_OK;
  436. char buf[64 + 4], *addr = data;
  437. char *end = addr + data_len;
  438. while (addr < end) {
  439. size_t len = end - addr;
  440. if (len > 48) len = 48;
  441. /* Copy to stack to avoid alignment restrictions. */
  442. char *tmp = buf + (sizeof(buf) - len);
  443. memcpy(tmp, addr, len);
  444. esp_core_dump_b64_encode((const uint8_t *)tmp, len, (uint8_t *)buf);
  445. addr += len;
  446. ets_printf(DRAM_STR("%s\r\n"), buf);
  447. }
  448. return err;
  449. }
  450. static int esp_core_dump_uart_get_char() {
  451. int i;
  452. uint32_t reg = (READ_PERI_REG(UART_STATUS_REG(0)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
  453. if (reg) {
  454. i = READ_PERI_REG(UART_FIFO_REG(0));
  455. } else {
  456. i = -1;
  457. }
  458. return i;
  459. }
  460. void esp_core_dump_to_uart(XtExcFrame *frame)
  461. {
  462. core_dump_write_config_t wr_cfg;
  463. uint32_t tm_end, tm_cur;
  464. int ch;
  465. memset(&wr_cfg, 0, sizeof(wr_cfg));
  466. wr_cfg.prepare = NULL;
  467. wr_cfg.start = esp_core_dump_uart_write_start;
  468. wr_cfg.end = esp_core_dump_uart_write_end;
  469. wr_cfg.write = esp_core_dump_uart_write_data;
  470. wr_cfg.priv = NULL;
  471. //Make sure txd/rxd are enabled
  472. // use direct reg access instead of gpio_pullup_dis which can cause exception when flash cache is disabled
  473. REG_CLR_BIT(GPIO_PIN_REG_1, FUN_PU);
  474. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
  475. PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
  476. ESP_COREDUMP_LOGI("Press Enter to print core dump to UART...");
  477. const int cpu_ticks_per_ms = esp_clk_cpu_freq() / 1000;
  478. tm_end = xthal_get_ccount() / cpu_ticks_per_ms + CONFIG_ESP32_CORE_DUMP_UART_DELAY;
  479. ch = esp_core_dump_uart_get_char();
  480. while (!(ch == '\n' || ch == '\r')) {
  481. tm_cur = xthal_get_ccount() / cpu_ticks_per_ms;
  482. if (tm_cur >= tm_end){
  483. break;
  484. }
  485. ch = esp_core_dump_uart_get_char();
  486. }
  487. ESP_COREDUMP_LOGI("Print core dump to uart...");
  488. esp_core_dump_write(frame, &wr_cfg);
  489. ESP_COREDUMP_LOGI("Core dump has been written to uart.");
  490. }
  491. #endif
  492. void esp_core_dump_init()
  493. {
  494. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
  495. const esp_partition_t *core_part;
  496. ESP_COREDUMP_LOGI("Init core dump to flash");
  497. core_part = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_COREDUMP, NULL);
  498. if (!core_part) {
  499. ESP_COREDUMP_LOGE("No core dump partition found!");
  500. return;
  501. }
  502. ESP_COREDUMP_LOGI("Found partition '%s' @ %x %d bytes", core_part->label, core_part->address, core_part->size);
  503. s_core_flash_config.partition.start = core_part->address;
  504. s_core_flash_config.partition.size = core_part->size;
  505. s_core_flash_config.partition_config_crc = esp_core_dump_calc_flash_config_crc();
  506. #endif
  507. #if CONFIG_ESP32_ENABLE_COREDUMP_TO_UART
  508. ESP_COREDUMP_LOGI("Init core dump to UART");
  509. #endif
  510. }
  511. esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size)
  512. {
  513. esp_err_t err;
  514. const void *core_data;
  515. spi_flash_mmap_handle_t core_data_handle;
  516. if (out_addr == NULL || out_size == NULL) {
  517. return ESP_ERR_INVALID_ARG;
  518. }
  519. const esp_partition_t *core_part = esp_partition_find_first(ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_COREDUMP, NULL);
  520. if (!core_part) {
  521. ESP_LOGE(TAG, "No core dump partition found!");
  522. return ESP_FAIL;
  523. }
  524. if (core_part->size < sizeof(uint32_t)) {
  525. ESP_LOGE(TAG, "Too small core dump partition!");
  526. return ESP_FAIL;
  527. }
  528. err = esp_partition_mmap(core_part, 0, sizeof(uint32_t),
  529. SPI_FLASH_MMAP_DATA, &core_data, &core_data_handle);
  530. if (err != ESP_OK) {
  531. ESP_LOGE(TAG, "Failed to mmap core dump data (%d)!", err);
  532. return err;
  533. }
  534. uint32_t *dw = (uint32_t *)core_data;
  535. *out_size = *dw;
  536. spi_flash_munmap(core_data_handle);
  537. // remap full core dump with CRC
  538. err = esp_partition_mmap(core_part, 0, *out_size,
  539. SPI_FLASH_MMAP_DATA, &core_data, &core_data_handle);
  540. if (err != ESP_OK) {
  541. ESP_LOGE(TAG, "Failed to mmap core dump data (%d)!", err);
  542. return err;
  543. }
  544. uint32_t *crc = (uint32_t *)(((uint8_t *)core_data) + *out_size);
  545. crc--; // Point to CRC field
  546. // Calc CRC over core dump data except for CRC field
  547. core_dump_crc_t cur_crc = crc32_le(0, (uint8_t const *)core_data, *out_size - sizeof(core_dump_crc_t));
  548. if (*crc != cur_crc) {
  549. ESP_LOGE(TAG, "Core dump data CRC check failed: 0x%x -> 0x%x!", *crc, cur_crc);
  550. spi_flash_munmap(core_data_handle);
  551. return ESP_FAIL;
  552. }
  553. spi_flash_munmap(core_data_handle);
  554. *out_addr = core_part->address;
  555. return ESP_OK;
  556. }
  557. #endif