esp-idf/components/idf_test/integration_test/TC_IT_SYS_MISC.yml

test cases:
- CI ready: 'Yes'
  ID: SYS_MISC_0101
  SDK: |-
    8266_NonOS
    8266_RTOS
    ESP32_IDF
  Test App: SSC
  allow fail: ''
  auto test: 'Yes'
  category: Function
  cmd set:
  - ''
  - - SSC SSC1 reboot
    - - R SSC1 C !!!ready!!!
  execution time: 0.0
  expected result: 重启成功
  initial condition: None
  level: Integration
  module: System
  steps: 系统重启
  sub module: Misc
  summary: test reboot function
  test environment: SSC_T1_4
  test point 1: basic function
  test point 2: sw reboot
  version: v1 (2016-8-15)
- CI ready: 'Yes'
  ID: SYS_MISC_0201
  SDK: |-
    8266_NonOS
    8266_RTOS
    ESP32_IDF
  Test App: SSC
  allow fail: ''
  auto test: 'Yes'
  category: Function
  cmd set:
  - ''
  - - SSC SSC1 ram -H
    - - R SSC1 RE FREEHEAP:\d+\r\n
  execution time: 0.0
  expected result: |2

    可以查询到一个数值
  initial condition: None
  level: Integration
  module: System
  steps: 查询空闲ram
  sub module: Misc
  summary: get heap size test
  test environment: SSC_T1_4
  test point 1: basic function
  test point 2: 'get heap size '
  version: v1 (2016-8-15)
- CI ready: 'No'
  ID: SYS_MISC_5001
  SDK: |-
    8266_NonOS
    8266_RTOS
  Test App: SSC
  auto test: 'Yes'
  category: Stress
  cmd set: ''
  execution time: 12.0
  expected result: 4.target1正常运行，无异常
  initial condition: None
  level: Integration
  module: System
  steps: |-
    1.target1、target2通过UART与PC相连接
    2.target1的晶振为40MHz晶振，烧录SDK的时候选择26MHz晶振
    3.target2的GPIO PIN脚通过排线与target1的电源相连接，target1与target2 GND通过排线连接
    4.PC发送命令控制target2使GPIO不停的拉高拉低
  sub module: Misc
  summary: random reboot to confirm default init data bin will not overwrite user
    config
  test environment: SSC_T1_InitData
  test point 1: stress
  test point 2: reboot when using user defined init data bin
  version: v1 (2016-8-15)