test_i2c.c 27 KB

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  1. /**
  2. * test environment UT_T2_I2C:
  3. * please prepare two ESP32-WROVER-KIT board.
  4. * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
  5. */
  6. #include <stdio.h>
  7. #include <string.h>
  8. #include "unity.h"
  9. #include "test_utils.h"
  10. #include "unity_config.h"
  11. #include "driver/i2c.h"
  12. #include "esp_attr.h"
  13. #include "esp_log.h"
  14. #include "soc/gpio_periph.h"
  15. #include "soc/i2c_periph.h"
  16. #include "esp_system.h"
  17. #include "soc/uart_struct.h"
  18. #include "driver/periph_ctrl.h"
  19. #include "esp_rom_gpio.h"
  20. #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
  21. #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
  22. #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
  23. #if CONFIG_IDF_TARGET_ESP32C3
  24. #define I2C_SLAVE_SCL_IO 5 /*!<gpio number for i2c slave clock */
  25. #define I2C_SLAVE_SDA_IO 6 /*!<gpio number for i2c slave data */
  26. #else
  27. #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
  28. #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
  29. #endif
  30. #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
  31. #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
  32. #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
  33. #if CONFIG_IDF_TARGET_ESP32C3
  34. #define I2C_MASTER_SCL_IO 5 /*!<gpio number for i2c master clock */
  35. #define I2C_MASTER_SDA_IO 6 /*!<gpio number for i2c master data */
  36. #else
  37. #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
  38. #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
  39. #endif
  40. #define I2C_MASTER_NUM I2C_NUM_0 /*!< I2C port number for master dev */
  41. #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  42. #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  43. #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
  44. #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
  45. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  46. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  47. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  48. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  49. #define ACK_VAL 0x0 /*!< I2C ack value */
  50. #define NACK_VAL 0x1 /*!< I2C nack value */
  51. #define PULSE_IO 19
  52. #define PCNT_INPUT_IO 4
  53. #define PCNT_CTRL_FLOATING_IO 5
  54. #define HIGHEST_LIMIT 10000
  55. #define LOWEST_LIMIT -10000
  56. static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
  57. #if SOC_I2C_NUM > 1
  58. &I2C1,
  59. #endif
  60. };
  61. static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
  62. {
  63. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  64. i2c_master_start(cmd);
  65. TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
  66. TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
  67. TEST_ESP_OK(i2c_master_stop(cmd));
  68. esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  69. i2c_cmd_link_delete(cmd);
  70. return ret;
  71. }
  72. static i2c_config_t i2c_master_init(void)
  73. {
  74. i2c_config_t conf_master = {
  75. .mode = I2C_MODE_MASTER,
  76. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  77. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  78. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  79. .sda_io_num = I2C_MASTER_SDA_IO,
  80. .scl_io_num = I2C_MASTER_SCL_IO,
  81. .clk_flags = 0,
  82. };
  83. return conf_master;
  84. }
  85. static i2c_config_t i2c_slave_init(void)
  86. {
  87. i2c_config_t conf_slave = {
  88. .mode = I2C_MODE_SLAVE,
  89. .sda_io_num = I2C_SLAVE_SDA_IO,
  90. .scl_io_num = I2C_SLAVE_SCL_IO,
  91. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  92. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  93. .slave.addr_10bit_en = 0,
  94. .slave.slave_addr = ESP_SLAVE_ADDR,
  95. };
  96. return conf_slave;
  97. }
  98. TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
  99. {
  100. TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
  101. }
  102. TEST_CASE("I2C config test", "[i2c]")
  103. {
  104. // master test
  105. i2c_config_t conf_master = i2c_master_init();
  106. gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  107. gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  108. for (int i = 0; i < 2; i++) {
  109. for (int j = 0; j < 2; j++) {
  110. conf_master.sda_pullup_en = sda_pull_up_en[i];
  111. conf_master.scl_pullup_en = scl_pull_up_en[j];
  112. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  113. I2C_MASTER_RX_BUF_DISABLE,
  114. I2C_MASTER_TX_BUF_DISABLE, 0));
  115. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  116. TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
  117. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  118. }
  119. }
  120. // slave test
  121. i2c_config_t conf_slave = i2c_slave_init();
  122. for (int i = 0; i < 2; i++) {
  123. for (int j = 0; j < 2; j++) {
  124. conf_slave.sda_pullup_en = sda_pull_up_en[i];
  125. conf_slave.scl_pullup_en = scl_pull_up_en[j];
  126. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  127. I2C_SLAVE_RX_BUF_LEN,
  128. I2C_SLAVE_TX_BUF_LEN, 0));
  129. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  130. TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
  131. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  132. }
  133. }
  134. }
  135. TEST_CASE("I2C set and get period test", "[i2c]")
  136. {
  137. int high_period, low_period;
  138. i2c_config_t conf_master = i2c_master_init();
  139. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  140. I2C_MASTER_RX_BUF_DISABLE,
  141. I2C_MASTER_TX_BUF_DISABLE, 0));
  142. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  143. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
  144. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  145. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
  146. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
  147. TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
  148. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
  149. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  150. TEST_ASSERT_EQUAL_INT(300, high_period);
  151. TEST_ASSERT_EQUAL_INT(400, low_period);
  152. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  153. }
  154. TEST_CASE("I2C config FIFO test", "[i2c]")
  155. {
  156. i2c_config_t conf_slave = i2c_slave_init();
  157. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  158. I2C_SLAVE_RX_BUF_LEN,
  159. I2C_SLAVE_TX_BUF_LEN, 0));
  160. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  161. TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  162. TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
  163. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  164. TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
  165. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
  166. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  167. }
  168. TEST_CASE("I2C timing test", "[i2c]")
  169. {
  170. int test_setup_time, test_data_time, test_stop_time, test_hold_time;
  171. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  172. i2c_config_t conf_master = i2c_master_init();
  173. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  174. I2C_MASTER_RX_BUF_DISABLE,
  175. I2C_MASTER_TX_BUF_DISABLE, 0));
  176. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  177. TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
  178. TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
  179. TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
  180. for (int i = 0; i < DATA_LENGTH; i++) {
  181. data_wr[i] = i;
  182. }
  183. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  184. TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
  185. TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
  186. TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
  187. TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
  188. TEST_ASSERT_EQUAL_INT32(80, test_data_time);
  189. TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
  190. TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
  191. free(data_wr);
  192. i2c_driver_delete(I2C_MASTER_NUM);
  193. }
  194. TEST_CASE("I2C data mode test", "[i2c]")
  195. {
  196. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  197. i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
  198. i2c_config_t conf_master = i2c_master_init();
  199. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  200. I2C_MASTER_RX_BUF_DISABLE,
  201. I2C_MASTER_TX_BUF_DISABLE, 0));
  202. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  203. for (int i = 0; i < DATA_LENGTH; i++) {
  204. data_wr[i] = i;
  205. }
  206. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
  207. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  208. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
  209. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
  210. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  211. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
  212. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  213. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
  214. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
  215. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  216. free(data_wr);
  217. i2c_driver_delete(I2C_MASTER_NUM);
  218. }
  219. TEST_CASE("I2C driver memory leaking check", "[i2c]")
  220. {
  221. esp_err_t ret;
  222. int size = esp_get_free_heap_size();
  223. for (uint32_t i = 0; i <= 1000; i++) {
  224. ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  225. I2C_SLAVE_RX_BUF_LEN,
  226. I2C_SLAVE_TX_BUF_LEN, 0);
  227. TEST_ASSERT(ret == ESP_OK);
  228. vTaskDelay(10 / portTICK_RATE_MS);
  229. i2c_driver_delete(I2C_SLAVE_NUM);
  230. TEST_ASSERT(ret == ESP_OK);
  231. }
  232. TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
  233. }
  234. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
  235. // print the reading buffer
  236. static void disp_buf(uint8_t *buf, int len)
  237. {
  238. int i;
  239. for (i = 0; i < len; i++) {
  240. printf("%02x ", buf[i]);
  241. if (( i + 1 ) % 16 == 0) {
  242. printf("\n");
  243. }
  244. }
  245. printf("\n");
  246. }
  247. static void i2c_master_write_test(void)
  248. {
  249. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  250. int i;
  251. i2c_config_t conf_master = i2c_master_init();
  252. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  253. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  254. I2C_MASTER_RX_BUF_DISABLE,
  255. I2C_MASTER_TX_BUF_DISABLE, 0));
  256. unity_wait_for_signal("i2c slave init finish");
  257. unity_send_signal("master write");
  258. for (i = 0; i < DATA_LENGTH / 2; i++) {
  259. data_wr[i] = i;
  260. }
  261. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
  262. disp_buf(data_wr, i + 1);
  263. free(data_wr);
  264. unity_wait_for_signal("ready to delete");
  265. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  266. }
  267. static void i2c_slave_read_test(void)
  268. {
  269. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  270. int size_rd = 0;
  271. int len = 0;
  272. i2c_config_t conf_slave = i2c_slave_init();
  273. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  274. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  275. I2C_SLAVE_RX_BUF_LEN,
  276. I2C_SLAVE_TX_BUF_LEN, 0));
  277. unity_send_signal("i2c slave init finish");
  278. unity_wait_for_signal("master write");
  279. while (1) {
  280. len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
  281. if (len == 0) {
  282. break;
  283. }
  284. size_rd += len;
  285. }
  286. disp_buf(data_rd, size_rd);
  287. for (int i = 0; i < size_rd; i++) {
  288. TEST_ASSERT(data_rd[i] == i);
  289. }
  290. free(data_rd);
  291. unity_send_signal("ready to delete");
  292. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  293. }
  294. TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
  295. static void master_read_slave_test(void)
  296. {
  297. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  298. memset(data_rd, 0, DATA_LENGTH);
  299. i2c_config_t conf_master = i2c_master_init();
  300. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  301. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  302. I2C_MASTER_RX_BUF_DISABLE,
  303. I2C_MASTER_TX_BUF_DISABLE, 0));
  304. unity_wait_for_signal("i2c slave init finish");
  305. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  306. i2c_master_start(cmd);
  307. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  308. unity_send_signal("slave write");
  309. unity_wait_for_signal("master read");
  310. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
  311. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
  312. i2c_master_stop(cmd);
  313. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  314. i2c_cmd_link_delete(cmd);
  315. vTaskDelay(100 / portTICK_RATE_MS);
  316. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  317. printf("%d\n", data_rd[i]);
  318. TEST_ASSERT(data_rd[i]==i);
  319. }
  320. free(data_rd);
  321. unity_send_signal("ready to delete");
  322. i2c_driver_delete(I2C_MASTER_NUM);
  323. }
  324. static void slave_write_buffer_test(void)
  325. {
  326. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  327. int size_rd;
  328. i2c_config_t conf_slave = i2c_slave_init();
  329. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  330. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  331. I2C_SLAVE_RX_BUF_LEN,
  332. I2C_SLAVE_TX_BUF_LEN, 0));
  333. unity_send_signal("i2c slave init finish");
  334. unity_wait_for_signal("slave write");
  335. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  336. data_wr[i] = i;
  337. }
  338. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  339. disp_buf(data_wr, size_rd);
  340. unity_send_signal("master read");
  341. unity_wait_for_signal("ready to delete");
  342. free(data_wr);
  343. i2c_driver_delete(I2C_SLAVE_NUM);
  344. }
  345. TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
  346. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32, ESP32C3)
  347. static void i2c_master_write_read_test(void)
  348. {
  349. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  350. memset(data_rd, 0, DATA_LENGTH);
  351. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  352. i2c_config_t conf_master = i2c_master_init();
  353. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  354. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  355. I2C_MASTER_RX_BUF_DISABLE,
  356. I2C_MASTER_TX_BUF_DISABLE, 0));
  357. unity_wait_for_signal("i2c slave init finish");
  358. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  359. i2c_master_start(cmd);
  360. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  361. unity_send_signal("slave write");
  362. unity_wait_for_signal("master read and write");
  363. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
  364. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
  365. i2c_master_stop(cmd);
  366. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  367. i2c_cmd_link_delete(cmd);
  368. vTaskDelay(100 / portTICK_RATE_MS);
  369. disp_buf(data_rd, RW_TEST_LENGTH);
  370. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  371. TEST_ASSERT(data_rd[i] == i/2);
  372. }
  373. for (int i = 0; i < DATA_LENGTH; i++) {
  374. data_wr[i] = i % 3;
  375. }
  376. vTaskDelay(100 / portTICK_RATE_MS);
  377. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  378. free(data_wr);
  379. free(data_rd);
  380. unity_send_signal("slave read");
  381. unity_wait_for_signal("ready to delete");
  382. i2c_driver_delete(I2C_MASTER_NUM);
  383. }
  384. static void i2c_slave_read_write_test(void)
  385. {
  386. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  387. memset(data_rd, 0, DATA_LENGTH);
  388. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  389. int size_rd;
  390. i2c_config_t conf_slave = i2c_slave_init();
  391. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  392. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  393. I2C_SLAVE_RX_BUF_LEN,
  394. I2C_SLAVE_TX_BUF_LEN, 0));
  395. unity_send_signal("i2c slave init finish");
  396. unity_wait_for_signal("slave write");
  397. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  398. data_wr[i] = i/2;
  399. }
  400. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  401. disp_buf(data_wr, size_rd);
  402. unity_send_signal("master read and write");
  403. unity_wait_for_signal("slave read");
  404. size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
  405. printf("slave read data is:\n");
  406. disp_buf(data_rd, size_rd);
  407. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  408. TEST_ASSERT(data_rd[i] == i % 3);
  409. }
  410. free(data_wr);
  411. free(data_rd);
  412. unity_send_signal("ready to delete");
  413. i2c_driver_delete(I2C_SLAVE_NUM);
  414. }
  415. TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
  416. static void i2c_master_repeat_write(void)
  417. {
  418. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  419. int times = 3;
  420. i2c_config_t conf_master = i2c_master_init();
  421. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  422. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  423. I2C_MASTER_RX_BUF_DISABLE,
  424. I2C_MASTER_TX_BUF_DISABLE, 0));
  425. unity_wait_for_signal("i2c slave init finish");
  426. for (int j = 0; j < times; j++) {
  427. for (int i = 0; i < DATA_LENGTH; i++) {
  428. data_wr[i] = j + i;
  429. }
  430. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  431. disp_buf(data_wr, RW_TEST_LENGTH);
  432. }
  433. free(data_wr);
  434. unity_send_signal("master write");
  435. unity_wait_for_signal("ready to delete");
  436. i2c_driver_delete(I2C_MASTER_NUM);
  437. }
  438. static void i2c_slave_repeat_read(void)
  439. {
  440. int size_rd = 0;
  441. int times = 3;
  442. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
  443. i2c_config_t conf_slave = i2c_slave_init();
  444. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  445. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  446. I2C_SLAVE_RX_BUF_LEN,
  447. I2C_SLAVE_TX_BUF_LEN, 0));
  448. unity_send_signal("i2c slave init finish");
  449. unity_wait_for_signal("master write");
  450. while (1) {
  451. int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
  452. if (len == 0) {
  453. break;
  454. }
  455. size_rd += len;
  456. }
  457. disp_buf(data_rd, size_rd);
  458. for (int j = 0; j < times; j++) {
  459. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  460. printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
  461. TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
  462. }
  463. }
  464. free(data_rd);
  465. unity_send_signal("ready to delete");
  466. i2c_driver_delete(I2C_SLAVE_NUM);
  467. }
  468. TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
  469. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
  470. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
  471. static volatile bool exit_flag;
  472. static bool test_read_func;
  473. static void test_task(void *pvParameters)
  474. {
  475. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  476. uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
  477. i2c_config_t conf_slave = i2c_slave_init();
  478. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  479. I2C_SLAVE_RX_BUF_LEN,
  480. I2C_SLAVE_TX_BUF_LEN, 0));
  481. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  482. while (exit_flag == false) {
  483. if (test_read_func) {
  484. i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  485. } else {
  486. i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  487. }
  488. vTaskDelay(10/portTICK_RATE_MS);
  489. }
  490. free(data);
  491. xSemaphoreGive(*sema);
  492. vTaskDelete(NULL);
  493. }
  494. TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  495. {
  496. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  497. exit_flag = false;
  498. test_read_func = true;
  499. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  500. printf("Waiting for 5 sec\n");
  501. vTaskDelay(5000 / portTICK_PERIOD_MS);
  502. exit_flag = true;
  503. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  504. vSemaphoreDelete(exit_sema);
  505. } else {
  506. TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
  507. }
  508. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  509. }
  510. TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  511. {
  512. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  513. exit_flag = false;
  514. test_read_func = false;
  515. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  516. printf("Waiting for 5 sec\n");
  517. vTaskDelay(5000 / portTICK_PERIOD_MS);
  518. exit_flag = true;
  519. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  520. vSemaphoreDelete(exit_sema);
  521. } else {
  522. TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
  523. }
  524. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  525. }
  526. TEST_CASE("I2C general API test", "[i2c]")
  527. {
  528. #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
  529. #define I2C_TEST_TIME 0x3ff
  530. #else
  531. #define I2C_TEST_TIME 0x1f
  532. #endif
  533. const int i2c_num = 0;
  534. i2c_config_t conf_master = {
  535. .mode = I2C_MODE_MASTER,
  536. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  537. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  538. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  539. .sda_io_num = I2C_MASTER_SDA_IO,
  540. .scl_io_num = I2C_MASTER_SCL_IO,
  541. };
  542. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  543. int time_get0, time_get1;
  544. for(int i = 10; i < I2C_TEST_TIME; i++) {
  545. //set period test
  546. TEST_ESP_OK(i2c_set_period(i2c_num, i, i));
  547. TEST_ESP_OK(i2c_get_period(i2c_num, &time_get0, &time_get1));
  548. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  549. //set start timing test
  550. TEST_ESP_OK(i2c_set_start_timing(i2c_num, i, i));
  551. TEST_ESP_OK(i2c_get_start_timing(i2c_num, &time_get0, &time_get1));
  552. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  553. //set stop timing test
  554. TEST_ESP_OK(i2c_set_stop_timing(i2c_num, i, i));
  555. TEST_ESP_OK(i2c_get_stop_timing(i2c_num, &time_get0, &time_get1));
  556. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  557. //set data timing test
  558. TEST_ESP_OK(i2c_set_data_timing(i2c_num, i, i));
  559. TEST_ESP_OK(i2c_get_data_timing(i2c_num, &time_get0, &time_get1));
  560. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  561. //set time out test
  562. TEST_ESP_OK(i2c_set_timeout(i2c_num, i));
  563. TEST_ESP_OK(i2c_get_timeout(i2c_num, &time_get0));
  564. TEST_ASSERT(time_get0 == i);
  565. }
  566. }
  567. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
  568. //Init uart baud rate detection
  569. static void uart_aut_baud_det_init(int rxd_io_num)
  570. {
  571. PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
  572. gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
  573. esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT1_SCL_OUT_IDX, 0, 0);
  574. esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
  575. periph_module_enable(PERIPH_UART1_MODULE);
  576. UART1.int_ena.val = 0;
  577. UART1.int_clr.val = ~0;
  578. UART1.auto_baud.en = 1;
  579. }
  580. //Calculate I2C scl freq
  581. static void i2c_scl_freq_cal(void)
  582. {
  583. const int i2c_source_clk_freq = 80000000;
  584. const float i2c_cource_clk_period = 0.0125;
  585. int edg_cnt = UART1.rxd_cnt.edge_cnt;
  586. int pospulse_cnt = UART1.pospulse.min_cnt;
  587. int negpulse_cnt = UART1.negpulse.min_cnt;
  588. int high_period_cnt = UART1.highpulse.min_cnt;
  589. int low_period_cnt = UART1.lowpulse.min_cnt;
  590. if(edg_cnt != 542) {
  591. printf("\nedg_cnt != 542, test fail\n");
  592. return;
  593. }
  594. printf("\nDetected SCL frequency: %d Hz\n", i2c_source_clk_freq / ((pospulse_cnt + negpulse_cnt) / 2) );
  595. printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt));
  596. UART1.auto_baud.en = 0;
  597. periph_module_disable(PERIPH_UART1_MODULE);
  598. }
  599. TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
  600. {
  601. //Use the UART baud rate detection function to detect the I2C SCL frequency.
  602. const int i2c_num = 1;
  603. const int uart1_rxd_io = 5;
  604. i2c_config_t conf_master = {
  605. .mode = I2C_MODE_MASTER,
  606. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  607. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  608. .master.clk_speed = 400000,
  609. .sda_io_num = I2C_MASTER_SDA_IO,
  610. .scl_io_num = I2C_MASTER_SCL_IO,
  611. };
  612. uint8_t *data = (uint8_t *)malloc(30);
  613. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  614. TEST_ESP_OK(i2c_driver_install(i2c_num, I2C_MODE_MASTER, 0, 0, 0));
  615. memset(data, 0, 0);
  616. uart_aut_baud_det_init(uart1_rxd_io);
  617. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  618. i2c_master_start(cmd);
  619. i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
  620. i2c_master_stop(cmd);
  621. i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  622. i2c_cmd_link_delete(cmd);
  623. i2c_scl_freq_cal();
  624. free(data);
  625. TEST_ESP_OK(i2c_driver_delete(i2c_num));
  626. }
  627. #endif // TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)