test_spi_param.c 43 KB

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  1. #include "esp_log.h"
  2. #include "esp_attr.h"
  3. #include "soc/spi_periph.h"
  4. #include "sdkconfig.h"
  5. #include "test/test_common_spi.h"
  6. #include "driver/spi_master.h"
  7. #include "driver/spi_slave.h"
  8. #if !DISABLED_FOR_TARGETS(ESP32C3)
  9. //There is only one GPSPI controller on ESP32C3, so single-board test is disabled.
  10. #ifndef MIN
  11. #define MIN(a, b)((a) > (b)? (b): (a))
  12. #endif
  13. /********************************************************************************
  14. * Test By Internal Connections
  15. ********************************************************************************/
  16. static void local_test_init(void** context);
  17. static void local_test_deinit(void* context);
  18. static void local_test_loop(const void *test_param, void* context);
  19. static const ptest_func_t local_test_func = {
  20. .pre_test = local_test_init,
  21. .post_test = local_test_deinit,
  22. .loop = local_test_loop,
  23. .def_param = spitest_def_param,
  24. };
  25. #define TEST_SPI_LOCAL(name, param_set) \
  26. PARAM_GROUP_DECLARE(name, param_set) \
  27. TEST_SINGLE_BOARD(SPI_##name, param_set, "[spi][timeout=120]", &local_test_func)
  28. static void local_test_init(void** arg)
  29. {
  30. esp_log_level_set("gpio", ESP_LOG_WARN);
  31. TEST_ASSERT(*arg==NULL);
  32. *arg = malloc(sizeof(spitest_context_t));
  33. spitest_context_t* context = (spitest_context_t*)*arg;
  34. TEST_ASSERT(context!=NULL);
  35. context->slave_context = (spi_slave_task_context_t){};
  36. esp_err_t err = init_slave_context( &context->slave_context);
  37. TEST_ASSERT(err == ESP_OK);
  38. xTaskCreate(spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
  39. }
  40. static void local_test_deinit(void* arg)
  41. {
  42. spitest_context_t* context = arg;
  43. vTaskDelete(context->handle_slave);
  44. context->handle_slave = 0;
  45. deinit_slave_context(&context->slave_context);
  46. }
  47. static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
  48. {
  49. //master config
  50. spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
  51. spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
  52. spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
  53. //pin config & initialize
  54. //we can't have two sets of iomux pins on the same pins
  55. assert(!pset->master_iomux || !pset->slave_iomux);
  56. if (pset->slave_iomux) {
  57. //only in this case, use VSPI iomux pins
  58. buscfg.miso_io_num = SLAVE_IOMUX_PIN_MISO;
  59. buscfg.mosi_io_num = SLAVE_IOMUX_PIN_MOSI;
  60. buscfg.sclk_io_num = SLAVE_IOMUX_PIN_SCLK;
  61. devcfg.spics_io_num = SLAVE_IOMUX_PIN_CS;
  62. slvcfg.spics_io_num = SLAVE_IOMUX_PIN_CS;
  63. } else {
  64. buscfg.miso_io_num = MASTER_IOMUX_PIN_MISO;
  65. buscfg.mosi_io_num = MASTER_IOMUX_PIN_MOSI;
  66. buscfg.sclk_io_num = MASTER_IOMUX_PIN_SCLK;
  67. devcfg.spics_io_num = MASTER_IOMUX_PIN_CS;
  68. slvcfg.spics_io_num = MASTER_IOMUX_PIN_CS;
  69. }
  70. //this does nothing, but avoid the driver from using iomux pins if required
  71. buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? UNCONNECTED_PIN : -1);
  72. devcfg.mode = pset->mode;
  73. const int cs_pretrans_max = 15;
  74. if (pset->dup == HALF_DUPLEX_MISO) {
  75. devcfg.cs_ena_pretrans = cs_pretrans_max;
  76. devcfg.flags |= SPI_DEVICE_HALFDUPLEX;
  77. } else if (pset->dup == HALF_DUPLEX_MOSI) {
  78. devcfg.cs_ena_pretrans = cs_pretrans_max;
  79. devcfg.flags |= SPI_DEVICE_NO_DUMMY;
  80. } else {
  81. devcfg.cs_ena_pretrans = cs_pretrans_max;
  82. }
  83. const int cs_posttrans_max = 15;
  84. devcfg.cs_ena_posttrans = cs_posttrans_max;
  85. devcfg.input_delay_ns = pset->slave_tv_ns;
  86. devcfg.clock_speed_hz = freq;
  87. if (pset->master_limit != 0 && freq > pset->master_limit) devcfg.flags |= SPI_DEVICE_NO_DUMMY;
  88. //slave config
  89. slvcfg.mode = pset->mode;
  90. slave_pull_up(&buscfg, slvcfg.spics_io_num);
  91. TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buscfg, pset->master_dma_chan));
  92. TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devcfg, spi));
  93. //slave automatically use iomux pins if pins are on VSPI_* pins
  94. buscfg.quadhd_io_num = -1;
  95. TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &buscfg, &slvcfg, pset->slave_dma_chan));
  96. //initialize master and slave on the same pins break some of the output configs, fix them
  97. if (pset->master_iomux) {
  98. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, spi_periph_signal[TEST_SPI_HOST].spid_out);
  99. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
  100. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, spi_periph_signal[TEST_SPI_HOST].spics_out[0]);
  101. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
  102. } else if (pset->slave_iomux) {
  103. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
  104. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
  105. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spics_out[0]);
  106. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
  107. } else {
  108. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spid_out);
  109. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, spi_periph_signal[TEST_SLAVE_HOST].spiq_out);
  110. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spics_out[0]);
  111. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, spi_periph_signal[TEST_SPI_HOST].spiclk_out);
  112. }
  113. if (context) {
  114. //clear master receive buffer
  115. memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
  116. }
  117. }
  118. static void local_test_end(spi_device_handle_t spi)
  119. {
  120. master_free_device_bus(spi);
  121. TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
  122. }
  123. static void local_test_loop(const void* arg1, void* arg2)
  124. {
  125. const spitest_param_set_t *pset = arg1;
  126. spitest_context_t *context = arg2;
  127. spi_device_handle_t spi;
  128. spitest_init_transactions(pset, context);
  129. const int *timing_speed_array = pset->freq_list;
  130. ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
  131. for (int i = 0; ; i++) {
  132. const int freq = timing_speed_array[i];
  133. if (freq==0) break;
  134. if (pset->freq_limit && freq > pset->freq_limit) break;
  135. ESP_LOGI(MASTER_TAG, "==> %dkHz", freq / 1000);
  136. bool check_master_data = (pset->dup!=HALF_DUPLEX_MOSI &&
  137. (pset->master_limit==0 || freq <= pset->master_limit));
  138. if (!check_master_data) ESP_LOGI(MASTER_TAG, "skip master data check");
  139. bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
  140. if (!check_slave_data) ESP_LOGI(SLAVE_TAG, "skip slave data check");
  141. local_test_start(&spi, freq, pset, context);
  142. for (int k = 0; k < pset->test_size; k++) {
  143. WORD_ALIGNED_ATTR uint8_t recvbuf[320+8];
  144. slave_txdata_t *txdata = &context->slave_trans[k];
  145. spi_slave_transaction_t slave_trans = {
  146. .tx_buffer = txdata->start,
  147. .rx_buffer = recvbuf,
  148. .length = txdata->len,
  149. };
  150. esp_err_t err = spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_trans, portMAX_DELAY);
  151. TEST_ESP_OK(err);
  152. //wait for both master and slave end
  153. spi_transaction_t *t = &context->master_trans[k];
  154. int len = get_trans_len(pset->dup, t);
  155. ESP_LOGI(MASTER_TAG, " ==> #%d: len: %d", k, len);
  156. //send master tx data
  157. err = spi_device_transmit(spi, t);
  158. TEST_ESP_OK(err);
  159. spi_slave_transaction_t *ret_trans;
  160. err = spi_slave_get_trans_result(TEST_SLAVE_HOST, &ret_trans, 5);
  161. TEST_ESP_OK(err);
  162. TEST_ASSERT_EQUAL(&slave_trans, ret_trans);
  163. uint32_t rcv_len = slave_trans.trans_len;
  164. bool failed = false;
  165. //check master data
  166. if (check_master_data && memcmp(slave_trans.tx_buffer, t->rx_buffer, (len + 7) / 8) != 0 ) {
  167. failed = true;
  168. }
  169. //check slave data and length
  170. //currently the rcv_len can be in range of [t->length-1, t->length+3]
  171. if ( rcv_len < len - 1 || rcv_len > len + 4) {
  172. failed = true;
  173. }
  174. if (check_slave_data && memcmp(t->tx_buffer, slave_trans.rx_buffer, (len + 7) / 8) != 0 ) {
  175. failed = true;
  176. }
  177. if (failed) {
  178. ESP_LOGI(SLAVE_TAG, "slave_recv_len: %d", rcv_len);
  179. spitest_master_print_data(t, len);
  180. ESP_LOG_BUFFER_HEX("slave tx", slave_trans.tx_buffer, len);
  181. ESP_LOG_BUFFER_HEX("slave rx", slave_trans.rx_buffer, len);
  182. //already failed, try to use the TEST_ASSERT to output the reason...
  183. TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_trans.tx_buffer, t->rx_buffer, (len + 7) / 8);
  184. TEST_ASSERT_EQUAL_HEX8_ARRAY(t->tx_buffer, slave_trans.rx_buffer, (len + 7) / 8);
  185. TEST_ASSERT(rcv_len >= len - 1 && rcv_len <= len + 4);
  186. }
  187. }
  188. local_test_end(spi);
  189. }
  190. }
  191. /************ Timing Test ***********************************************/
  192. //TODO: esp32s2 has better timing performance
  193. static spitest_param_set_t timing_pgroup[] = {
  194. //signals are not fed to peripherals through iomux if the functions are not selected to iomux
  195. #if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  196. { .pset_name = "FULL_DUP, MASTER IOMUX",
  197. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  198. .master_limit = SPI_MASTER_FREQ_13M,
  199. .dup = FULL_DUPLEX,
  200. .master_iomux = true,
  201. .slave_iomux = false,
  202. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  203. },
  204. { .pset_name = "FULL_DUP, SLAVE IOMUX",
  205. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  206. .master_limit = SPI_MASTER_FREQ_13M,
  207. .dup = FULL_DUPLEX,
  208. .master_iomux = false,
  209. .slave_iomux = true,
  210. .slave_tv_ns = TV_INT_CONNECT,
  211. },
  212. #endif
  213. { .pset_name = "FULL_DUP, BOTH GPIO",
  214. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  215. .master_limit = SPI_MASTER_FREQ_10M,
  216. .dup = FULL_DUPLEX,
  217. .master_iomux = false,
  218. .slave_iomux = false,
  219. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  220. },
  221. //signals are not fed to peripherals through iomux if the functions are not selected to iomux
  222. #if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  223. { .pset_name = "MISO_DUP, MASTER IOMUX",
  224. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  225. .master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  226. .dup = HALF_DUPLEX_MISO,
  227. .master_iomux = true,
  228. .slave_iomux = false,
  229. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  230. },
  231. { .pset_name = "MISO_DUP, SLAVE IOMUX",
  232. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  233. //.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  234. .dup = HALF_DUPLEX_MISO,
  235. .master_iomux = false,
  236. .slave_iomux = true,
  237. .slave_tv_ns = TV_INT_CONNECT,
  238. },
  239. #endif
  240. { .pset_name = "MISO_DUP, BOTH GPIO",
  241. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  242. //.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  243. .dup = HALF_DUPLEX_MISO,
  244. .master_iomux = false,
  245. .slave_iomux = false,
  246. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  247. },
  248. //signals are not fed to peripherals through iomux if the functions are not selected to iomux
  249. #if !DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  250. { .pset_name = "MOSI_DUP, MASTER IOMUX",
  251. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  252. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  253. .dup = HALF_DUPLEX_MOSI,
  254. .master_iomux = true,
  255. .slave_iomux = false,
  256. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  257. },
  258. { .pset_name = "MOSI_DUP, SLAVE IOMUX",
  259. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  260. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  261. .dup = HALF_DUPLEX_MOSI,
  262. .master_iomux = false,
  263. .slave_iomux = true,
  264. .slave_tv_ns = TV_INT_CONNECT,
  265. },
  266. #endif
  267. { .pset_name = "MOSI_DUP, BOTH GPIO",
  268. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  269. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  270. .dup = HALF_DUPLEX_MOSI,
  271. .master_iomux = false,
  272. .slave_iomux = false,
  273. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  274. },
  275. };
  276. TEST_SPI_LOCAL(TIMING, timing_pgroup)
  277. /************ Mode Test ***********************************************/
  278. #define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
  279. static int test_freq_mode_local[]={
  280. 1*1000*1000,
  281. SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
  282. SPI_MASTER_FREQ_13M,
  283. SPI_MASTER_FREQ_16M,
  284. SPI_MASTER_FREQ_20M,
  285. SPI_MASTER_FREQ_26M,
  286. SPI_MASTER_FREQ_40M,
  287. 0,
  288. };
  289. //signals are not fed to peripherals through iomux if the functions are not selected to iomux
  290. #ifdef CONFIG_IDF_TARGET_ESP32
  291. #define LOCAL_MODE_TEST_SLAVE_IOMUX true
  292. /*
  293. * When DMA is enabled in mode 0 and 2, an special workaround is used. The MISO (slave's output) is
  294. * half an SPI clock ahead, but then delay 3 apb clocks.
  295. * Compared to the normal timing, the MISO is not slower than when the frequency is below 13.3MHz,
  296. * under which there's no need for the master to compensate the MISO signal. However compensation
  297. * is required when the frequency is beyond 16MHz, at this time, an extra positive delay is added
  298. * to the normal delay (3 apb clocks).
  299. *
  300. * It's is hard to tell the master driver that kind of delay logic. This magic delay value happens
  301. * to compensate master timing beyond 16MHz.
  302. *
  303. * If the master or slave's timing is changed again, and the test no longer passes, above 16MHz,
  304. * it's OK to use `master_limit` to disable master data check or skip the test above some
  305. * frequencies above 10MHz (the design target value).
  306. */
  307. #define SLAVE_EXTRA_DELAY_DMA 12.5
  308. #else
  309. #define LOCAL_MODE_TEST_SLAVE_IOMUX false
  310. #define SLAVE_EXTRA_DELAY_DMA 0
  311. #endif
  312. static spitest_param_set_t mode_pgroup[] = {
  313. { .pset_name = "Mode 0",
  314. .freq_list = test_freq_mode_local,
  315. .master_limit = SPI_MASTER_FREQ_13M,
  316. .dup = FULL_DUPLEX,
  317. .mode = 0,
  318. .master_iomux = false,
  319. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  320. .slave_tv_ns = TV_INT_CONNECT,
  321. },
  322. { .pset_name = "Mode 1",
  323. .freq_list = test_freq_mode_local,
  324. .freq_limit = SPI_MASTER_FREQ_26M,
  325. .master_limit = SPI_MASTER_FREQ_13M,
  326. .dup = FULL_DUPLEX,
  327. .mode = 1,
  328. .master_iomux = false,
  329. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  330. .slave_tv_ns = TV_INT_CONNECT,
  331. },
  332. { .pset_name = "Mode 2",
  333. .freq_list = test_freq_mode_local,
  334. .master_limit = SPI_MASTER_FREQ_13M,
  335. .dup = FULL_DUPLEX,
  336. .mode = 2,
  337. .master_iomux = false,
  338. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  339. .slave_tv_ns = TV_INT_CONNECT,
  340. },
  341. { .pset_name = "Mode 3",
  342. .freq_list = test_freq_mode_local,
  343. .freq_limit = SPI_MASTER_FREQ_26M,
  344. .master_limit = SPI_MASTER_FREQ_13M,
  345. .dup = FULL_DUPLEX,
  346. .mode = 3,
  347. .master_iomux = false,
  348. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  349. .slave_tv_ns = TV_INT_CONNECT,
  350. },
  351. { .pset_name = "Mode 0, DMA",
  352. .freq_list = test_freq_mode_local,
  353. .master_limit = SPI_MASTER_FREQ_13M,
  354. .dup = FULL_DUPLEX,
  355. .mode = 0,
  356. .slave_dma_chan = 2,
  357. .master_iomux = false,
  358. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  359. .slave_tv_ns = TV_INT_CONNECT,
  360. .length_aligned = true,
  361. },
  362. { .pset_name = "Mode 1, DMA",
  363. .freq_list = test_freq_mode_local,
  364. .freq_limit = SPI_MASTER_FREQ_26M,
  365. .master_limit = SPI_MASTER_FREQ_13M,
  366. .dup = FULL_DUPLEX,
  367. .mode = 1,
  368. .slave_dma_chan = 2,
  369. .master_iomux = false,
  370. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  371. .slave_tv_ns = TV_INT_CONNECT,
  372. .length_aligned = true,
  373. },
  374. { .pset_name = "Mode 2, DMA",
  375. .freq_list = test_freq_mode_local,
  376. .master_limit = SPI_MASTER_FREQ_13M,
  377. .dup = FULL_DUPLEX,
  378. .mode = 2,
  379. .slave_dma_chan = 2,
  380. .master_iomux = false,
  381. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  382. .slave_tv_ns = TV_INT_CONNECT,
  383. .length_aligned = true,
  384. },
  385. { .pset_name = "Mode 3, DMA",
  386. .freq_list = test_freq_mode_local,
  387. .freq_limit = SPI_MASTER_FREQ_26M,
  388. .master_limit = SPI_MASTER_FREQ_13M,
  389. .dup = FULL_DUPLEX,
  390. .mode = 3,
  391. .slave_dma_chan = 2,
  392. .master_iomux = false,
  393. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  394. .slave_tv_ns = TV_INT_CONNECT,
  395. .length_aligned = true,
  396. },
  397. /////////////////////////// MISO ////////////////////////////////////
  398. { .pset_name = "MISO, Mode 0",
  399. .freq_list = test_freq_mode_local,
  400. .dup = HALF_DUPLEX_MISO,
  401. .mode = 0,
  402. .master_iomux = false,
  403. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  404. .slave_tv_ns = TV_INT_CONNECT,
  405. },
  406. { .pset_name = "MISO, Mode 1",
  407. .freq_list = test_freq_mode_local,
  408. .dup = HALF_DUPLEX_MISO,
  409. .mode = 1,
  410. .master_iomux = false,
  411. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  412. .slave_tv_ns = TV_INT_CONNECT,
  413. },
  414. { .pset_name = "MISO, Mode 2",
  415. .freq_list = test_freq_mode_local,
  416. .dup = HALF_DUPLEX_MISO,
  417. .mode = 2,
  418. .master_iomux = false,
  419. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  420. .slave_tv_ns = TV_INT_CONNECT,
  421. },
  422. { .pset_name = "MISO, Mode 3",
  423. .freq_list = test_freq_mode_local,
  424. .dup = HALF_DUPLEX_MISO,
  425. .mode = 3,
  426. .master_iomux = false,
  427. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  428. .slave_tv_ns = TV_INT_CONNECT,
  429. },
  430. { .pset_name = "MISO, Mode 0, DMA",
  431. .freq_list = test_freq_mode_local,
  432. .dup = HALF_DUPLEX_MISO,
  433. .mode = 0,
  434. .slave_dma_chan = 2,
  435. .master_iomux = false,
  436. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  437. .slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
  438. .length_aligned = true,
  439. },
  440. { .pset_name = "MISO, Mode 1, DMA",
  441. .freq_list = test_freq_mode_local,
  442. .dup = HALF_DUPLEX_MISO,
  443. .mode = 1,
  444. .slave_dma_chan = 2,
  445. .master_iomux = false,
  446. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  447. .slave_tv_ns = TV_INT_CONNECT,
  448. .length_aligned = true,
  449. },
  450. { .pset_name = "MISO, Mode 2, DMA",
  451. .freq_list = test_freq_mode_local,
  452. .dup = HALF_DUPLEX_MISO,
  453. .mode = 2,
  454. .slave_dma_chan = 2,
  455. .master_iomux = false,
  456. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  457. .slave_tv_ns = TV_INT_CONNECT+SLAVE_EXTRA_DELAY_DMA,
  458. .length_aligned = true,
  459. },
  460. { .pset_name = "MISO, Mode 3, DMA",
  461. .freq_list = test_freq_mode_local,
  462. .dup = HALF_DUPLEX_MISO,
  463. .mode = 3,
  464. .slave_dma_chan = 2,
  465. .master_iomux = false,
  466. .slave_iomux = LOCAL_MODE_TEST_SLAVE_IOMUX,
  467. .slave_tv_ns = TV_INT_CONNECT,
  468. .length_aligned = true,
  469. },
  470. };
  471. TEST_SPI_LOCAL(MODE, mode_pgroup)
  472. /**********************SPI master slave transaction length test*************/
  473. /* Test SPI slave can receive different length of data in all 4 modes (permutations of
  474. * CPOL/CPHA and when DMA is used or not).
  475. * Length from 1 to 16 bytes are tested.
  476. */
  477. #define MASTER_DATA_RAND_SEED 123
  478. #define SLAVE_DATA_RAND_SEED 456
  479. TEST_CASE("Slave receive correct data", "[spi]")
  480. {
  481. // Initialize device handle and spi bus
  482. uint32_t master_seed_send = MASTER_DATA_RAND_SEED;
  483. uint32_t slave_seed_send = SLAVE_DATA_RAND_SEED;
  484. uint32_t master_seed_cmp = slave_seed_send;
  485. uint32_t slave_seed_cmp = master_seed_send;
  486. const int buf_size = 20;
  487. WORD_ALIGNED_ATTR uint8_t slave_sendbuf[buf_size];
  488. WORD_ALIGNED_ATTR uint8_t slave_recvbuf[buf_size];
  489. WORD_ALIGNED_ATTR uint8_t master_sendbuf[buf_size];
  490. WORD_ALIGNED_ATTR uint8_t master_recvbuf[buf_size];
  491. uint8_t master_cmpbuf[buf_size];
  492. uint8_t slave_cmpbuf[buf_size];
  493. for (int spi_mode = 0; spi_mode < 4; spi_mode++) {
  494. for (int dma_chan = 0; dma_chan < 2; dma_chan++) {
  495. spi_device_handle_t spi;
  496. spitest_param_set_t test_param = {
  497. .dup = FULL_DUPLEX,
  498. .mode = spi_mode,
  499. .master_iomux = false,
  500. .slave_iomux = false,
  501. .master_dma_chan = 0,
  502. .slave_dma_chan = (dma_chan? TEST_DMA_CHAN_SLAVE: 0),
  503. };
  504. ESP_LOGI(SLAVE_TAG, "Test slave recv @ mode %d, dma enabled=%d", spi_mode, dma_chan);
  505. local_test_start(&spi, 1000*1000, &test_param, NULL);
  506. for (int round = 0; round < 20; round++) {
  507. // printf("trans %d\n", round);
  508. int master_trans_len = round + 1;
  509. const int slave_trans_len = 16;
  510. memset(master_sendbuf, 0xcc, buf_size);
  511. memset(slave_sendbuf, 0x55, buf_size);
  512. memset(master_recvbuf, 0xaa, buf_size);
  513. memset(slave_recvbuf, 0xbb, buf_size);
  514. for(int i = 0; i < master_trans_len; i++){
  515. master_sendbuf[i] = rand_r(&master_seed_send);
  516. slave_sendbuf[i] = rand_r(&slave_seed_send);
  517. }
  518. spi_slave_transaction_t slave_trans = {
  519. .length = slave_trans_len * 8,
  520. .tx_buffer = slave_sendbuf,
  521. .rx_buffer = slave_recvbuf
  522. };
  523. esp_err_t ret= spi_slave_queue_trans(TEST_SLAVE_HOST, &slave_trans, portMAX_DELAY);
  524. TEST_ESP_OK(ret);
  525. spi_transaction_t master_trans = {
  526. .length = 8 * master_trans_len,
  527. .tx_buffer = master_sendbuf,
  528. .rx_buffer = master_recvbuf
  529. };
  530. ret = spi_device_transmit(spi, &master_trans);
  531. TEST_ESP_OK(ret);
  532. spi_slave_transaction_t *out_trans;
  533. ret = spi_slave_get_trans_result(TEST_SLAVE_HOST, &out_trans, portMAX_DELAY);
  534. TEST_ESP_OK(ret);
  535. TEST_ASSERT_EQUAL_HEX32(&slave_trans, out_trans);
  536. for(int i = 0; i < master_trans_len; i++){
  537. master_cmpbuf[i] = rand_r(&master_seed_cmp);
  538. slave_cmpbuf[i] = rand_r(&slave_seed_cmp);
  539. }
  540. // esp_log_buffer_hex("master_send", master_sendbuf, buf_size);
  541. // esp_log_buffer_hex("slave_recv", slave_recvbuf, buf_size);
  542. // esp_log_buffer_hex("slave_send", slave_sendbuf, buf_size);
  543. // esp_log_buffer_hex("master_recv", master_recvbuf, buf_size);
  544. int master_expected_len = MIN(master_trans_len, slave_trans_len);
  545. TEST_ASSERT_EQUAL_HEX8_ARRAY(master_cmpbuf, master_recvbuf, master_expected_len);
  546. int slave_expected_len;
  547. if (dma_chan) {
  548. slave_expected_len = (master_expected_len & (~3));
  549. } else {
  550. slave_expected_len = master_expected_len;
  551. }
  552. if (slave_expected_len) {
  553. TEST_ASSERT_EQUAL_HEX8_ARRAY(slave_cmpbuf, slave_recvbuf, slave_expected_len);
  554. }
  555. }
  556. local_test_end(spi);
  557. }
  558. }
  559. }
  560. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
  561. //These tests are ESP32 only due to lack of runners
  562. /********************************************************************************
  563. * Test By Master & Slave (2 boards)
  564. *
  565. * Wiring:
  566. * | Master | Slave |
  567. * | ------ | ----- |
  568. * | 12 | 19 |
  569. * | 13 | 23 |
  570. * | 14 | 18 |
  571. * | 15 | 5 |
  572. * | GND | GND |
  573. *
  574. ********************************************************************************/
  575. static void test_master_init(void** context);
  576. static void test_master_deinit(void* context);
  577. static void test_master_loop(const void *test_cfg, void* context);
  578. static const ptest_func_t master_test_func = {
  579. .pre_test = test_master_init,
  580. .post_test = test_master_deinit,
  581. .loop = test_master_loop,
  582. .def_param = spitest_def_param,
  583. };
  584. static void test_slave_init(void** context);
  585. static void test_slave_deinit(void* context);
  586. static void test_slave_loop(const void *test_cfg, void* context);
  587. static const ptest_func_t slave_test_func = {
  588. .pre_test = test_slave_init,
  589. .post_test = test_slave_deinit,
  590. .loop = test_slave_loop,
  591. .def_param = spitest_def_param,
  592. };
  593. #define TEST_SPI_MASTER_SLAVE(name, param_group, extra_tag) \
  594. PARAM_GROUP_DECLARE(name, param_group) \
  595. TEST_MASTER_SLAVE(name, param_group, "[spi_ms][test_env=Example_SPI_Multi_device][timeout=120]"#extra_tag, &master_test_func, &slave_test_func)
  596. /************ Master Code ***********************************************/
  597. static void test_master_init(void** arg)
  598. {
  599. TEST_ASSERT(*arg==NULL);
  600. *arg = malloc(sizeof(spitest_context_t));
  601. spitest_context_t* context = *arg;
  602. TEST_ASSERT(context!=NULL);
  603. context->slave_context = (spi_slave_task_context_t){};
  604. esp_err_t err = init_slave_context(&context->slave_context);
  605. TEST_ASSERT(err == ESP_OK);
  606. }
  607. static void test_master_deinit(void* arg)
  608. {
  609. spitest_context_t* context = (spitest_context_t*)arg;
  610. deinit_slave_context(&context->slave_context);
  611. }
  612. static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
  613. {
  614. //master config
  615. spi_bus_config_t buspset=SPI_BUS_TEST_DEFAULT_CONFIG();
  616. buspset.miso_io_num = MASTER_IOMUX_PIN_MISO;
  617. buspset.mosi_io_num = MASTER_IOMUX_PIN_MOSI;
  618. buspset.sclk_io_num = MASTER_IOMUX_PIN_SCLK;
  619. //this does nothing, but avoid the driver from using native pins
  620. if (!pset->master_iomux) buspset.quadhd_io_num = UNCONNECTED_PIN;
  621. spi_device_interface_config_t devpset=SPI_DEVICE_TEST_DEFAULT_CONFIG();
  622. devpset.spics_io_num = MASTER_IOMUX_PIN_CS;
  623. devpset.mode = pset->mode;
  624. const int cs_pretrans_max = 15;
  625. if (pset->dup==HALF_DUPLEX_MISO) {
  626. devpset.cs_ena_pretrans = cs_pretrans_max;
  627. devpset.flags |= SPI_DEVICE_HALFDUPLEX;
  628. } else if (pset->dup == HALF_DUPLEX_MOSI) {
  629. devpset.cs_ena_pretrans = cs_pretrans_max;
  630. devpset.flags |= SPI_DEVICE_NO_DUMMY;
  631. } else {
  632. devpset.cs_ena_pretrans = cs_pretrans_max;//20;
  633. }
  634. const int cs_posttrans_max = 15;
  635. devpset.cs_ena_posttrans = cs_posttrans_max;
  636. devpset.input_delay_ns = pset->slave_tv_ns;
  637. devpset.clock_speed_hz = freq;
  638. if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
  639. TEST_ESP_OK(spi_bus_initialize(TEST_SPI_HOST, &buspset, pset->master_dma_chan));
  640. TEST_ESP_OK(spi_bus_add_device(TEST_SPI_HOST, &devpset, spi));
  641. //prepare data for the slave
  642. for (int i = 0; i < pset->test_size; i ++) {
  643. /* in the single board, the data is send to the slave task, then to the driver.
  644. * However, in this test we don't know the data received by the slave.
  645. * So we send to the return queue of the slave directly.
  646. */
  647. //xQueueSend( slave_context.data_to_send, &slave_txdata[i], portMAX_DELAY );
  648. uint8_t slave_buffer[320+8];
  649. int length;
  650. if (pset->dup!=HALF_DUPLEX_MISO) {
  651. length = context->master_trans[i].length;
  652. } else {
  653. length = context->master_trans[i].rxlength;
  654. }
  655. uint32_t* ptr = (uint32_t*)slave_buffer;
  656. ptr[0] = length;
  657. ptr[1] = (uint32_t)context->slave_trans[i].start;
  658. if (context->master_trans[i].tx_buffer!=NULL) {
  659. memcpy(ptr+2, context->master_trans[i].tx_buffer, (context->master_trans[i].length+7)/8);
  660. }
  661. //Send to return queue directly
  662. xRingbufferSend(context->slave_context.data_received, slave_buffer, 8+(length+7)/8, portMAX_DELAY);
  663. }
  664. memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
  665. }
  666. static void test_master_loop(const void *arg1, void* arg2)
  667. {
  668. const spitest_param_set_t *test_cfg = (spitest_param_set_t*)arg1;
  669. spitest_context_t* context = (spitest_context_t*)arg2;
  670. spi_device_handle_t spi;
  671. spitest_init_transactions(test_cfg, context);
  672. const int *timing_speed_array = test_cfg->freq_list;
  673. ESP_LOGI(MASTER_TAG, "****************** %s ***************", test_cfg->pset_name);
  674. for (int i=0; ; i++ ) {
  675. const int freq = timing_speed_array[i];
  676. if (freq==0) break;
  677. if (test_cfg->freq_limit && freq > test_cfg->freq_limit) break;
  678. ESP_LOGI(MASTER_TAG, "==============> %dk", freq/1000);
  679. test_master_start(&spi, freq, test_cfg, context);
  680. unity_wait_for_signal("slave ready");
  681. for( int j= 0; j < test_cfg->test_size; j ++ ) {
  682. //wait for both master and slave end
  683. ESP_LOGI( MASTER_TAG, "=> test%d", j );
  684. //send master tx data
  685. vTaskDelay(20);
  686. spi_transaction_t *t = &context->master_trans[j];
  687. TEST_ESP_OK (spi_device_transmit(spi, t) );
  688. int len = get_trans_len(test_cfg->dup, t);
  689. spitest_master_print_data(t, len);
  690. size_t rcv_len;
  691. slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
  692. spitest_slave_print_data(rcv_data, false);
  693. //check result
  694. bool check_master_data = (test_cfg->dup != HALF_DUPLEX_MOSI &&
  695. (test_cfg->master_limit == 0 || freq <= test_cfg->master_limit));
  696. const bool check_slave_data = false;
  697. const bool check_len = false;
  698. if (!check_master_data) {
  699. ESP_LOGI(MASTER_TAG, "skip data check due to duplex mode or freq.");
  700. } else {
  701. TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data,
  702. check_len, check_slave_data));
  703. }
  704. //clean
  705. vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
  706. }
  707. master_free_device_bus(spi);
  708. }
  709. }
  710. /************ Slave Code ***********************************************/
  711. static void test_slave_init(void** arg)
  712. {
  713. TEST_ASSERT(*arg==NULL);
  714. *arg = malloc(sizeof(spitest_context_t));
  715. spitest_context_t* context = (spitest_context_t*)*arg;
  716. TEST_ASSERT(context!=NULL);
  717. context->slave_context = (spi_slave_task_context_t){};
  718. esp_err_t err = init_slave_context( &context->slave_context );
  719. TEST_ASSERT( err == ESP_OK );
  720. xTaskCreate( spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
  721. }
  722. static void test_slave_deinit(void* arg)
  723. {
  724. spitest_context_t* context = (spitest_context_t*)arg;
  725. vTaskDelete( context->handle_slave );
  726. context->handle_slave = 0;
  727. deinit_slave_context(&context->slave_context);
  728. }
  729. static void timing_slave_start(int speed, const spitest_param_set_t* pset, spitest_context_t *context)
  730. {
  731. //slave config
  732. spi_bus_config_t slv_buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
  733. slv_buscfg.miso_io_num = SLAVE_IOMUX_PIN_MISO;
  734. slv_buscfg.mosi_io_num = SLAVE_IOMUX_PIN_MOSI;
  735. slv_buscfg.sclk_io_num = SLAVE_IOMUX_PIN_SCLK;
  736. //this does nothing, but avoid the driver from using native pins
  737. if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = UNCONNECTED_PIN;
  738. spi_slave_interface_config_t slvcfg=SPI_SLAVE_TEST_DEFAULT_CONFIG();
  739. slvcfg.spics_io_num = SLAVE_IOMUX_PIN_CS;
  740. slvcfg.mode = pset->mode;
  741. //Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
  742. slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
  743. TEST_ESP_OK(spi_slave_initialize(TEST_SLAVE_HOST, &slv_buscfg, &slvcfg, pset->slave_dma_chan));
  744. //prepare data for the master
  745. for (int i = 0; i < pset->test_size; i++) {
  746. if (pset->dup==FULL_DUPLEX) {
  747. memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
  748. } else if (pset->dup==HALF_DUPLEX_MISO) {
  749. memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].rxlength+7)/8);
  750. }
  751. }
  752. }
  753. static void test_slave_loop(const void *arg1, void* arg2)
  754. {
  755. const spitest_param_set_t *pset = (spitest_param_set_t*)arg1;
  756. spitest_context_t* context = (spitest_context_t*)arg2;
  757. ESP_LOGI(SLAVE_TAG, "****************** %s ***************", pset->pset_name);
  758. spitest_init_transactions(pset, context);
  759. const int *timing_speed_array = pset->freq_list;
  760. for (int i=0; ; i++ ) {
  761. const int freq = timing_speed_array[i];
  762. if (freq==0) break;
  763. if (pset->freq_limit != 0 && freq > pset->freq_limit) break;
  764. ESP_LOGI(MASTER_TAG, "==============> %dk", timing_speed_array[i]/1000);
  765. //Initialize SPI slave interface
  766. timing_slave_start(freq, pset, context);
  767. //prepare slave tx data
  768. for (int i = 0; i < pset->test_size; i ++) {
  769. xQueueSend( context->slave_context.data_to_send, &context->slave_trans[i], portMAX_DELAY );
  770. //memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
  771. }
  772. vTaskDelay(50/portTICK_PERIOD_MS);
  773. unity_send_signal("slave ready");
  774. for( int i= 0; i < pset->test_size; i ++ ) {
  775. //wait for both master and slave end
  776. ESP_LOGI( MASTER_TAG, "===== test%d =====", i );
  777. //send master tx data
  778. vTaskDelay(20);
  779. spi_transaction_t *t = &context->master_trans[i];
  780. int len = get_trans_len(pset->dup, t);
  781. spitest_master_print_data(t, FULL_DUPLEX);
  782. size_t rcv_len;
  783. slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
  784. spitest_slave_print_data(rcv_data, true);
  785. //check result
  786. const bool check_master_data = false;
  787. bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
  788. const bool check_len = true;
  789. TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
  790. //clean
  791. vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
  792. }
  793. TEST_ASSERT(spi_slave_free(TEST_SLAVE_HOST) == ESP_OK);
  794. }
  795. }
  796. /************ Timing Test ***********************************************/
  797. static spitest_param_set_t timing_conf[] = {
  798. { .pset_name = "FULL_DUP, BOTH IOMUX",
  799. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  800. .master_limit = SPI_MASTER_FREQ_16M,
  801. .dup = FULL_DUPLEX,
  802. .master_iomux= true,
  803. .slave_iomux = true,
  804. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  805. },
  806. { .pset_name = "FULL_DUP, MASTER IOMUX",
  807. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  808. .master_limit = SPI_MASTER_FREQ_11M,
  809. .dup = FULL_DUPLEX,
  810. .master_iomux = true,
  811. .slave_iomux = false,
  812. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  813. },
  814. { .pset_name = "FULL_DUP, SLAVE IOMUX",
  815. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  816. .master_limit = SPI_MASTER_FREQ_11M,
  817. .dup = FULL_DUPLEX,
  818. .master_iomux = false,
  819. .slave_iomux = true,
  820. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  821. },
  822. { .pset_name = "FULL_DUP, BOTH GPIO",
  823. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  824. .master_limit = SPI_MASTER_FREQ_9M,
  825. .dup = FULL_DUPLEX,
  826. .master_iomux = false,
  827. .slave_iomux = false,
  828. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  829. },
  830. { .pset_name = "MOSI_DUP, BOTH IOMUX",
  831. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  832. .dup = HALF_DUPLEX_MOSI,
  833. .master_iomux= true,
  834. .slave_iomux = true,
  835. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  836. },
  837. { .pset_name = "MOSI_DUP, MASTER IOMUX",
  838. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  839. .dup = HALF_DUPLEX_MOSI,
  840. .master_iomux= true,
  841. .slave_iomux = false,
  842. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  843. },
  844. { .pset_name = "MOSI_DUP, SLAVE IOMUX",
  845. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  846. .dup = HALF_DUPLEX_MOSI,
  847. .master_iomux= false,
  848. .slave_iomux = true,
  849. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  850. },
  851. { .pset_name = "MOSI_DUP, BOTH GPIO",
  852. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  853. .dup = HALF_DUPLEX_MOSI,
  854. .master_iomux= false,
  855. .slave_iomux = false,
  856. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  857. },
  858. { .pset_name = "MISO_DUP, BOTH IOMUX",
  859. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  860. .dup = HALF_DUPLEX_MISO,
  861. .master_iomux = true,
  862. .slave_iomux = true,
  863. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  864. },
  865. { .pset_name = "MISO_DUP, MASTER IOMUX",
  866. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  867. .dup = HALF_DUPLEX_MISO,
  868. .master_iomux = true,
  869. .slave_iomux = false,
  870. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  871. },
  872. { .pset_name = "MISO_DUP, SLAVE IOMUX",
  873. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  874. .dup = HALF_DUPLEX_MISO,
  875. .master_iomux = false,
  876. .slave_iomux = true,
  877. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  878. },
  879. { .pset_name = "MISO_DUP, BOTH GPIO",
  880. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  881. .dup = HALF_DUPLEX_MISO,
  882. .master_iomux = false,
  883. .slave_iomux = false,
  884. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  885. },
  886. };
  887. TEST_SPI_MASTER_SLAVE(TIMING, timing_conf, "")
  888. /************ Mode Test ***********************************************/
  889. #define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
  890. //Set to this input delay so that the master will read with delay until 7M
  891. #define DELAY_HCLK_UNTIL_7M 12.5*3
  892. static int test_freq_mode_ms[]={
  893. 100*1000,
  894. 6*1000*1000,
  895. 7*1000*1000,
  896. SPI_MASTER_FREQ_8M, //maximum freq MISO stable before next latch edge
  897. SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
  898. SPI_MASTER_FREQ_10M,
  899. SPI_MASTER_FREQ_11M,
  900. SPI_MASTER_FREQ_13M,
  901. SPI_MASTER_FREQ_16M,
  902. SPI_MASTER_FREQ_20M,
  903. 0,
  904. };
  905. static int test_freq_20M_only[]={
  906. SPI_MASTER_FREQ_20M,
  907. 0,
  908. };
  909. spitest_param_set_t mode_conf[] = {
  910. //non-DMA tests
  911. { .pset_name = "mode 0, no DMA",
  912. .freq_list = test_freq_mode_ms,
  913. .master_limit = FREQ_LIMIT_MODE,
  914. .dup = FULL_DUPLEX,
  915. .master_iomux= true,
  916. .slave_iomux = true,
  917. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  918. .mode = 0,
  919. },
  920. { .pset_name = "mode 1, no DMA",
  921. .freq_list = test_freq_mode_ms,
  922. .master_limit = FREQ_LIMIT_MODE,
  923. .dup = FULL_DUPLEX,
  924. .master_iomux= true,
  925. .slave_iomux = true,
  926. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  927. .mode = 1,
  928. },
  929. { .pset_name = "mode 2, no DMA",
  930. .freq_list = test_freq_mode_ms,
  931. .master_limit = FREQ_LIMIT_MODE,
  932. .dup = FULL_DUPLEX,
  933. .master_iomux= true,
  934. .slave_iomux = true,
  935. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  936. .mode = 2,
  937. },
  938. { .pset_name = "mode 3, no DMA",
  939. .freq_list = test_freq_mode_ms,
  940. .master_limit = FREQ_LIMIT_MODE,
  941. .dup = FULL_DUPLEX,
  942. .master_iomux= true,
  943. .slave_iomux = true,
  944. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  945. .mode = 3,
  946. },
  947. //the master can only read to 16MHz, use half-duplex mode to read at 20.
  948. { .pset_name = "mode 0, no DMA, 20M",
  949. .freq_list = test_freq_20M_only,
  950. .dup = HALF_DUPLEX_MISO,
  951. .master_iomux= true,
  952. .slave_iomux = true,
  953. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  954. .mode = 0,
  955. },
  956. { .pset_name = "mode 1, no DMA, 20M",
  957. .freq_list = test_freq_20M_only,
  958. .dup = HALF_DUPLEX_MISO,
  959. .master_iomux= true,
  960. .slave_iomux = true,
  961. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  962. .mode = 1,
  963. },
  964. { .pset_name = "mode 2, no DMA, 20M",
  965. .freq_list = test_freq_20M_only,
  966. .dup = HALF_DUPLEX_MISO,
  967. .master_iomux= true,
  968. .slave_iomux = true,
  969. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  970. .mode = 2,
  971. },
  972. { .pset_name = "mode 3, no DMA, 20M",
  973. .freq_list = test_freq_20M_only,
  974. .dup = HALF_DUPLEX_MISO,
  975. .master_iomux= true,
  976. .slave_iomux = true,
  977. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  978. .mode = 3,
  979. },
  980. //DMA tests
  981. { .pset_name = "mode 0, DMA",
  982. .freq_list = test_freq_mode_ms,
  983. .master_limit = FREQ_LIMIT_MODE,
  984. .dup = FULL_DUPLEX,
  985. .master_iomux= true,
  986. .slave_iomux = true,
  987. .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
  988. .mode = 0,
  989. .master_dma_chan = 1,
  990. .slave_dma_chan = 1,
  991. .length_aligned = true,
  992. },
  993. { .pset_name = "mode 1, DMA",
  994. .freq_list = test_freq_mode_ms,
  995. .master_limit = FREQ_LIMIT_MODE,
  996. .dup = FULL_DUPLEX,
  997. .master_iomux= true,
  998. .slave_iomux = true,
  999. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1000. .mode = 1,
  1001. .master_dma_chan = 1,
  1002. .slave_dma_chan = 1,
  1003. .length_aligned = true,
  1004. },
  1005. { .pset_name = "mode 2, DMA",
  1006. .freq_list = test_freq_mode_ms,
  1007. .master_limit = FREQ_LIMIT_MODE,
  1008. .dup = FULL_DUPLEX,
  1009. .master_iomux= true,
  1010. .slave_iomux = true,
  1011. .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
  1012. .mode = 2,
  1013. .master_dma_chan = 1,
  1014. .slave_dma_chan = 1,
  1015. .length_aligned = true,
  1016. },
  1017. { .pset_name = "mode 3, DMA",
  1018. .freq_list = test_freq_mode_ms,
  1019. .master_limit = FREQ_LIMIT_MODE,
  1020. .dup = FULL_DUPLEX,
  1021. .master_iomux= true,
  1022. .slave_iomux = true,
  1023. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1024. .mode = 3,
  1025. .master_dma_chan = 1,
  1026. .slave_dma_chan = 1,
  1027. .length_aligned = true,
  1028. },
  1029. //the master can only read to 16MHz, use half-duplex mode to read at 20.
  1030. { .pset_name = "mode 0, DMA, 20M",
  1031. .freq_list = test_freq_20M_only,
  1032. .dup = HALF_DUPLEX_MISO,
  1033. .master_iomux= true,
  1034. .slave_iomux = true,
  1035. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1036. .mode = 0,
  1037. .master_dma_chan = 1,
  1038. .slave_dma_chan = 1,
  1039. },
  1040. { .pset_name = "mode 1, DMA, 20M",
  1041. .freq_list = test_freq_20M_only,
  1042. .dup = HALF_DUPLEX_MISO,
  1043. .master_iomux= true,
  1044. .slave_iomux = true,
  1045. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1046. .mode = 1,
  1047. .master_dma_chan = 1,
  1048. .slave_dma_chan = 1,
  1049. },
  1050. { .pset_name = "mode 2, DMA, 20M",
  1051. .freq_list = test_freq_20M_only,
  1052. .dup = HALF_DUPLEX_MISO,
  1053. .master_iomux= true,
  1054. .slave_iomux = true,
  1055. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1056. .mode = 2,
  1057. .master_dma_chan = 1,
  1058. .slave_dma_chan = 1,
  1059. },
  1060. { .pset_name = "mode 3, DMA, 20M",
  1061. .freq_list = test_freq_20M_only,
  1062. .dup = HALF_DUPLEX_MISO,
  1063. .master_iomux= true,
  1064. .slave_iomux = true,
  1065. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  1066. .mode = 3,
  1067. .master_dma_chan = 1,
  1068. .slave_dma_chan = 1,
  1069. },
  1070. };
  1071. TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "")
  1072. #endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
  1073. #endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)