cache_err_int.c 1.0 KB

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  1. // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. /*
  15. The cache has an interrupt that can be raised as soon as an access to a cached
  16. region (flash) is done without the cache being enabled. We use that here
  17. to panic the CPU, which from a debugging perspective is better than grabbing bad
  18. data from the bus.
  19. */
  20. #include <stdint.h>
  21. #include "sdkconfig.h"
  22. #include "esp_attr.h"
  23. // TODO ESP32-C3 IDF-2450
  24. void esp_cache_err_int_init(void)
  25. {
  26. }
  27. int IRAM_ATTR esp_cache_err_get_cpuid(void)
  28. {
  29. return 0;
  30. }