emac_dev.c 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101
  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stdio.h>
  14. #include <string.h>
  15. #include "freertos/FreeRTOS.h"
  16. #include "freertos/task.h"
  17. #include "rom/ets_sys.h"
  18. #include "rom/gpio.h"
  19. #include "soc/dport_reg.h"
  20. #include "soc/io_mux_reg.h"
  21. #include "soc/rtc_cntl_reg.h"
  22. #include "soc/gpio_reg.h"
  23. #include "soc/gpio_sig_map.h"
  24. #include "soc/emac_reg_v2.h"
  25. #include "soc/emac_ex_reg.h"
  26. #include "esp_log.h"
  27. #include "driver/gpio.h"
  28. #include "sdkconfig.h"
  29. #include "emac_common.h"
  30. void emac_enable_flowctrl(void)
  31. {
  32. REG_SET_BIT(EMAC_GMACFC_REG, EMAC_TFCE);
  33. REG_SET_BIT(EMAC_GMACFC_REG, EMAC_RFCE);
  34. REG_CLR_BIT(EMAC_GMACFC_REG, EMAC_DZPQ);
  35. REG_SET_FIELD(EMAC_GMACFC_REG, EMAC_PAUSE_TIME, 0x1648);
  36. REG_SET_FIELD(EMAC_GMACFC_REG, EMAC_PLT, 0x1);
  37. }
  38. void emac_disable_flowctrl(void)
  39. {
  40. REG_CLR_BIT(EMAC_GMACFC_REG, EMAC_TFCE);
  41. REG_CLR_BIT(EMAC_GMACFC_REG, EMAC_RFCE);
  42. REG_CLR_BIT(EMAC_GMACFC_REG, EMAC_DZPQ);
  43. REG_SET_FIELD(EMAC_GMACFC_REG, EMAC_PAUSE_TIME, 0);
  44. REG_SET_FIELD(EMAC_GMACFC_REG, EMAC_PLT, 0);
  45. }
  46. void emac_enable_dma_tx(void)
  47. {
  48. REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_TRANSMISSION_COMMAND);
  49. }
  50. void emac_enable_dma_rx(void)
  51. {
  52. REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_RX);
  53. }
  54. void emac_disable_dma_tx(void)
  55. {
  56. REG_CLR_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_TRANSMISSION_COMMAND);
  57. }
  58. void emac_disable_dma_rx(void)
  59. {
  60. REG_CLR_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_RX);
  61. }
  62. void emac_enable_clk(bool enable)
  63. {
  64. if (enable == true) {
  65. DPORT_REG_SET_BIT(EMAC_CLK_EN_REG, EMAC_CLK_EN);
  66. } else {
  67. DPORT_REG_CLR_BIT(EMAC_CLK_EN_REG, EMAC_CLK_EN);
  68. }
  69. }
  70. void emac_dma_init(void)
  71. {
  72. REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_FWD_UNDER_GF);
  73. REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_OPT_SECOND_FRAME);
  74. REG_SET_FIELD(EMAC_DMABUSMODE_REG, EMAC_PROG_BURST_LEN, 4);
  75. }
  76. void emac_mac_enable_txrx(void)
  77. {
  78. REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_EMACRX);
  79. REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_EMACTX);
  80. }
  81. void emac_mac_init(void)
  82. {
  83. REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_EMACDUPLEX);
  84. REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_EMACMII);
  85. REG_CLR_BIT(EMAC_GMACCONFIG_REG, EMAC_EMACFESPEED);
  86. }