bt.c 54 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr_alloc.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp32/clk.h"
  41. #include "esp_coexist_internal.h"
  42. #if !CONFIG_FREERTOS_UNICORE
  43. #include "esp_ipc.h"
  44. #endif
  45. #include "esp_rom_sys.h"
  46. #if CONFIG_BT_ENABLED
  47. /* Macro definition
  48. ************************************************************************
  49. */
  50. #define BTDM_LOG_TAG "BTDM_INIT"
  51. #define BTDM_INIT_PERIOD (5000) /* ms */
  52. /* Bluetooth system and controller config */
  53. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  54. #define BTDM_CFG_HCI_UART (1<<1)
  55. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  56. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  57. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  58. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  59. /* Sleep mode */
  60. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  61. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  62. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  63. /* Low Power Clock Selection */
  64. #define BTDM_LPCLK_SEL_XTAL (0)
  65. #define BTDM_LPCLK_SEL_XTAL32K (1)
  66. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  67. #define BTDM_LPCLK_SEL_8M (3)
  68. /* Sleep and wakeup interval control */
  69. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  70. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  71. #define BT_DEBUG(...)
  72. #define BT_API_CALL_CHECK(info, api_call, ret) \
  73. do{\
  74. esp_err_t __err = (api_call);\
  75. if ((ret) != __err) {\
  76. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  77. return __err;\
  78. }\
  79. } while(0)
  80. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  81. #define OSI_VERSION 0x00010002
  82. #define OSI_MAGIC_VALUE 0xFADEBEAD
  83. /* SPIRAM Configuration */
  84. #if CONFIG_SPIRAM_USE_MALLOC
  85. #define BTDM_MAX_QUEUE_NUM (5)
  86. #endif
  87. /* Types definition
  88. ************************************************************************
  89. */
  90. /* VHCI function interface */
  91. typedef struct vhci_host_callback {
  92. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  93. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  94. } vhci_host_callback_t;
  95. /* Dram region */
  96. typedef struct {
  97. esp_bt_mode_t mode;
  98. intptr_t start;
  99. intptr_t end;
  100. } btdm_dram_available_region_t;
  101. /* PSRAM configuration */
  102. #if CONFIG_SPIRAM_USE_MALLOC
  103. typedef struct {
  104. QueueHandle_t handle;
  105. void *storage;
  106. void *buffer;
  107. } btdm_queue_item_t;
  108. #endif
  109. /* OSI function */
  110. struct osi_funcs_t {
  111. uint32_t _version;
  112. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  113. void (*_ints_on)(unsigned int mask);
  114. void (*_interrupt_disable)(void);
  115. void (*_interrupt_restore)(void);
  116. void (*_task_yield)(void);
  117. void (*_task_yield_from_isr)(void);
  118. void *(*_semphr_create)(uint32_t max, uint32_t init);
  119. void (*_semphr_delete)(void *semphr);
  120. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  121. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  122. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  123. int32_t (*_semphr_give)(void *semphr);
  124. void *(*_mutex_create)(void);
  125. void (*_mutex_delete)(void *mutex);
  126. int32_t (*_mutex_lock)(void *mutex);
  127. int32_t (*_mutex_unlock)(void *mutex);
  128. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  129. void (* _queue_delete)(void *queue);
  130. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  131. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  132. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  133. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  134. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  135. void (* _task_delete)(void *task_handle);
  136. bool (* _is_in_isr)(void);
  137. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  138. void *(* _malloc)(uint32_t size);
  139. void *(* _malloc_internal)(uint32_t size);
  140. void (* _free)(void *p);
  141. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  142. void (* _srand)(unsigned int seed);
  143. int (* _rand)(void);
  144. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  145. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  146. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  147. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  148. void (* _btdm_sleep_enter_phase2)(void);
  149. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  150. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  151. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  152. bool (* _coex_bt_wakeup_request)(void);
  153. void (* _coex_bt_wakeup_request_end)(void);
  154. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  155. int (* _coex_bt_release)(uint32_t event);
  156. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  157. uint32_t (* _coex_bb_reset_lock)(void);
  158. void (* _coex_bb_reset_unlock)(uint32_t restore);
  159. int (* _coex_schm_register_btdm_callback)(void *callback);
  160. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  161. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  162. uint32_t (* _coex_schm_interval_get)(void);
  163. uint8_t (* _coex_schm_curr_period_get)(void);
  164. void *(* _coex_schm_curr_phase_get)(void);
  165. int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
  166. int (* _coex_register_wifi_channel_change_callback)(void *cb);
  167. uint32_t _magic;
  168. };
  169. typedef void (*workitem_handler_t)(void* arg);
  170. /* External functions or values
  171. ************************************************************************
  172. */
  173. /* not for user call, so don't put to include file */
  174. /* OSI */
  175. extern int btdm_osi_funcs_register(void *osi_funcs);
  176. /* Initialise and De-initialise */
  177. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  178. extern void btdm_controller_deinit(void);
  179. extern int btdm_controller_enable(esp_bt_mode_t mode);
  180. extern void btdm_controller_disable(void);
  181. extern uint8_t btdm_controller_get_mode(void);
  182. extern const char *btdm_controller_get_compile_version(void);
  183. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  184. extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
  185. /* Sleep */
  186. extern void btdm_controller_enable_sleep(bool enable);
  187. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  188. extern uint8_t btdm_controller_get_sleep_mode(void);
  189. extern bool btdm_power_state_active(void);
  190. extern void btdm_wakeup_request(void);
  191. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  192. /* Low Power Clock */
  193. extern bool btdm_lpclk_select_src(uint32_t sel);
  194. extern bool btdm_lpclk_set_div(uint32_t div);
  195. /* VHCI */
  196. extern bool API_vhci_host_check_send_available(void);
  197. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  198. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  199. /* TX power */
  200. extern int ble_txpwr_set(int power_type, int power_level);
  201. extern int ble_txpwr_get(int power_type);
  202. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  203. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  204. extern void bredr_sco_datapath_set(uint8_t data_path);
  205. extern void btdm_controller_scan_duplicate_list_clear(void);
  206. /* Coexistence */
  207. extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
  208. extern int coex_bt_release(uint32_t event);
  209. extern int coex_register_bt_cb(coex_func_cb_t cb);
  210. extern uint32_t coex_bb_reset_lock(void);
  211. extern void coex_bb_reset_unlock(uint32_t restore);
  212. extern int coex_schm_register_btdm_callback(void *callback);
  213. extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
  214. extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
  215. extern uint32_t coex_schm_interval_get(void);
  216. extern uint8_t coex_schm_curr_period_get(void);
  217. extern void * coex_schm_curr_phase_get(void);
  218. extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
  219. extern int coex_register_wifi_channel_change_callback(void *cb);
  220. extern void coex_ble_adv_priority_high_set(bool high);
  221. extern char _bss_start_btdm;
  222. extern char _bss_end_btdm;
  223. extern char _data_start_btdm;
  224. extern char _data_end_btdm;
  225. extern uint32_t _data_start_btdm_rom;
  226. extern uint32_t _data_end_btdm_rom;
  227. extern uint32_t _bt_bss_start;
  228. extern uint32_t _bt_bss_end;
  229. extern uint32_t _nimble_bss_start;
  230. extern uint32_t _nimble_bss_end;
  231. extern uint32_t _btdm_bss_start;
  232. extern uint32_t _btdm_bss_end;
  233. extern uint32_t _bt_data_start;
  234. extern uint32_t _bt_data_end;
  235. extern uint32_t _nimble_data_start;
  236. extern uint32_t _nimble_data_end;
  237. extern uint32_t _btdm_data_start;
  238. extern uint32_t _btdm_data_end;
  239. /* Local Function Declare
  240. *********************************************************************
  241. */
  242. #if CONFIG_SPIRAM_USE_MALLOC
  243. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  244. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  245. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  246. static void IRAM_ATTR interrupt_disable(void);
  247. static void IRAM_ATTR interrupt_restore(void);
  248. static void IRAM_ATTR task_yield_from_isr(void);
  249. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  250. static void semphr_delete_wrapper(void *semphr);
  251. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  252. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  253. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  254. static int32_t semphr_give_wrapper(void *semphr);
  255. static void *mutex_create_wrapper(void);
  256. static void mutex_delete_wrapper(void *mutex);
  257. static int32_t mutex_lock_wrapper(void *mutex);
  258. static int32_t mutex_unlock_wrapper(void *mutex);
  259. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  260. static void queue_delete_wrapper(void *queue);
  261. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  262. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  263. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  264. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  265. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  266. static void task_delete_wrapper(void *task_handle);
  267. static bool IRAM_ATTR is_in_isr_wrapper(void);
  268. static void IRAM_ATTR cause_sw_intr(void *arg);
  269. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  270. static void *malloc_internal_wrapper(size_t size);
  271. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  272. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  273. static int IRAM_ATTR rand_wrapper(void);
  274. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  275. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  276. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  277. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  278. static void btdm_sleep_enter_phase2_wrapper(void);
  279. static void btdm_sleep_exit_phase3_wrapper(void);
  280. static bool coex_bt_wakeup_request(void);
  281. static void coex_bt_wakeup_request_end(void);
  282. static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  283. static int coex_bt_release_wrapper(uint32_t event);
  284. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  285. static uint32_t coex_bb_reset_lock_wrapper(void);
  286. static void coex_bb_reset_unlock_wrapper(uint32_t restore);
  287. static int coex_schm_register_btdm_callback_wrapper(void *callback);
  288. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  289. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  290. static uint32_t coex_schm_interval_get_wrapper(void);
  291. static uint8_t coex_schm_curr_period_get_wrapper(void);
  292. static void * coex_schm_curr_phase_get_wrapper(void);
  293. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
  294. static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
  295. /* Local variable definition
  296. ***************************************************************************
  297. */
  298. /* OSI funcs */
  299. static const struct osi_funcs_t osi_funcs_ro = {
  300. ._version = OSI_VERSION,
  301. ._set_isr = xt_set_interrupt_handler,
  302. ._ints_on = xt_ints_on,
  303. ._interrupt_disable = interrupt_disable,
  304. ._interrupt_restore = interrupt_restore,
  305. ._task_yield = vPortYield,
  306. ._task_yield_from_isr = task_yield_from_isr,
  307. ._semphr_create = semphr_create_wrapper,
  308. ._semphr_delete = semphr_delete_wrapper,
  309. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  310. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  311. ._semphr_take = semphr_take_wrapper,
  312. ._semphr_give = semphr_give_wrapper,
  313. ._mutex_create = mutex_create_wrapper,
  314. ._mutex_delete = mutex_delete_wrapper,
  315. ._mutex_lock = mutex_lock_wrapper,
  316. ._mutex_unlock = mutex_unlock_wrapper,
  317. ._queue_create = queue_create_wrapper,
  318. ._queue_delete = queue_delete_wrapper,
  319. ._queue_send = queue_send_wrapper,
  320. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  321. ._queue_recv = queue_recv_wrapper,
  322. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  323. ._task_create = task_create_wrapper,
  324. ._task_delete = task_delete_wrapper,
  325. ._is_in_isr = is_in_isr_wrapper,
  326. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  327. ._malloc = malloc,
  328. ._malloc_internal = malloc_internal_wrapper,
  329. ._free = free,
  330. ._read_efuse_mac = read_mac_wrapper,
  331. ._srand = srand_wrapper,
  332. ._rand = rand_wrapper,
  333. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  334. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  335. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  336. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  337. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  338. ._btdm_sleep_exit_phase1 = NULL,
  339. ._btdm_sleep_exit_phase2 = NULL,
  340. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  341. ._coex_bt_wakeup_request = coex_bt_wakeup_request,
  342. ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
  343. ._coex_bt_request = coex_bt_request_wrapper,
  344. ._coex_bt_release = coex_bt_release_wrapper,
  345. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  346. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  347. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  348. ._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
  349. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  350. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  351. ._coex_schm_interval_get = coex_schm_interval_get_wrapper,
  352. ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
  353. ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
  354. ._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
  355. ._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
  356. ._magic = OSI_MAGIC_VALUE,
  357. };
  358. /* the mode column will be modified by release function to indicate the available region */
  359. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  360. //following is .data
  361. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  362. //following is memory which HW will use
  363. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  364. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  365. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  366. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  367. //following is .bss
  368. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  369. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  370. };
  371. /* Reserve the full memory region used by Bluetooth Controller,
  372. * some may be released later at runtime. */
  373. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  374. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  375. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  376. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  377. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  378. #if CONFIG_SPIRAM_USE_MALLOC
  379. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  380. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  381. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  382. /* Static variable declare */
  383. // timestamp when PHY/RF was switched on
  384. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  385. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  386. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  387. // measured average low power clock period in micro seconds
  388. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  389. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  390. #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
  391. // used low power clock
  392. static DRAM_ATTR uint8_t btdm_lpclk_sel;
  393. #endif /* #ifdef CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG */
  394. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  395. #ifdef CONFIG_PM_ENABLE
  396. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  397. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  398. static bool s_pm_lock_acquired = true;
  399. static DRAM_ATTR bool s_btdm_allow_light_sleep;
  400. // pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
  401. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  402. static void btdm_slp_tmr_callback(void *arg);
  403. #endif /* #ifdef CONFIG_PM_ENABLE */
  404. static inline void btdm_check_and_init_bb(void)
  405. {
  406. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  407. int64_t latest_ts = esp_phy_rf_get_on_ts();
  408. if (latest_ts != s_time_phy_rf_just_enabled ||
  409. s_time_phy_rf_just_enabled == 0) {
  410. btdm_rf_bb_init_phase2();
  411. s_time_phy_rf_just_enabled = latest_ts;
  412. }
  413. }
  414. #if CONFIG_SPIRAM_USE_MALLOC
  415. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  416. {
  417. if (!btdm_queue_table_mux || !queue) {
  418. return NULL;
  419. }
  420. bool ret = false;
  421. btdm_queue_item_t *item;
  422. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  423. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  424. item = &btdm_queue_table[i];
  425. if (item->handle == NULL) {
  426. memcpy(item, queue, sizeof(btdm_queue_item_t));
  427. ret = true;
  428. break;
  429. }
  430. }
  431. xSemaphoreGive(btdm_queue_table_mux);
  432. return ret;
  433. }
  434. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  435. {
  436. if (!btdm_queue_table_mux || !queue) {
  437. return false;
  438. }
  439. bool ret = false;
  440. btdm_queue_item_t *item;
  441. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  442. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  443. item = &btdm_queue_table[i];
  444. if (item->handle == queue->handle) {
  445. memcpy(queue, item, sizeof(btdm_queue_item_t));
  446. memset(item, 0, sizeof(btdm_queue_item_t));
  447. ret = true;
  448. break;
  449. }
  450. }
  451. xSemaphoreGive(btdm_queue_table_mux);
  452. return ret;
  453. }
  454. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  455. static void IRAM_ATTR interrupt_disable(void)
  456. {
  457. if (xPortInIsrContext()) {
  458. portENTER_CRITICAL_ISR(&global_int_mux);
  459. } else {
  460. portENTER_CRITICAL(&global_int_mux);
  461. }
  462. }
  463. static void IRAM_ATTR interrupt_restore(void)
  464. {
  465. if (xPortInIsrContext()) {
  466. portEXIT_CRITICAL_ISR(&global_int_mux);
  467. } else {
  468. portEXIT_CRITICAL(&global_int_mux);
  469. }
  470. }
  471. static void IRAM_ATTR task_yield_from_isr(void)
  472. {
  473. portYIELD_FROM_ISR();
  474. }
  475. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  476. {
  477. #if !CONFIG_SPIRAM_USE_MALLOC
  478. return (void *)xSemaphoreCreateCounting(max, init);
  479. #else
  480. StaticQueue_t *queue_buffer = NULL;
  481. QueueHandle_t handle = NULL;
  482. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  483. if (!queue_buffer) {
  484. goto error;
  485. }
  486. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  487. if (!handle) {
  488. goto error;
  489. }
  490. btdm_queue_item_t item = {
  491. .handle = handle,
  492. .storage = NULL,
  493. .buffer = queue_buffer,
  494. };
  495. if (!btdm_queue_generic_register(&item)) {
  496. goto error;
  497. }
  498. return handle;
  499. error:
  500. if (handle) {
  501. vSemaphoreDelete(handle);
  502. }
  503. if (queue_buffer) {
  504. free(queue_buffer);
  505. }
  506. return NULL;
  507. #endif
  508. }
  509. static void semphr_delete_wrapper(void *semphr)
  510. {
  511. #if !CONFIG_SPIRAM_USE_MALLOC
  512. vSemaphoreDelete(semphr);
  513. #else
  514. btdm_queue_item_t item = {
  515. .handle = semphr,
  516. .storage = NULL,
  517. .buffer = NULL,
  518. };
  519. if (btdm_queue_generic_deregister(&item)) {
  520. vSemaphoreDelete(item.handle);
  521. free(item.buffer);
  522. }
  523. return;
  524. #endif
  525. }
  526. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  527. {
  528. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  529. }
  530. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  531. {
  532. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  533. }
  534. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  535. {
  536. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  537. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  538. } else {
  539. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  540. }
  541. }
  542. static int32_t semphr_give_wrapper(void *semphr)
  543. {
  544. return (int32_t)xSemaphoreGive(semphr);
  545. }
  546. static void *mutex_create_wrapper(void)
  547. {
  548. #if CONFIG_SPIRAM_USE_MALLOC
  549. StaticQueue_t *queue_buffer = NULL;
  550. QueueHandle_t handle = NULL;
  551. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  552. if (!queue_buffer) {
  553. goto error;
  554. }
  555. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  556. if (!handle) {
  557. goto error;
  558. }
  559. btdm_queue_item_t item = {
  560. .handle = handle,
  561. .storage = NULL,
  562. .buffer = queue_buffer,
  563. };
  564. if (!btdm_queue_generic_register(&item)) {
  565. goto error;
  566. }
  567. return handle;
  568. error:
  569. if (handle) {
  570. vSemaphoreDelete(handle);
  571. }
  572. if (queue_buffer) {
  573. free(queue_buffer);
  574. }
  575. return NULL;
  576. #else
  577. return (void *)xSemaphoreCreateMutex();
  578. #endif
  579. }
  580. static void mutex_delete_wrapper(void *mutex)
  581. {
  582. #if !CONFIG_SPIRAM_USE_MALLOC
  583. vSemaphoreDelete(mutex);
  584. #else
  585. btdm_queue_item_t item = {
  586. .handle = mutex,
  587. .storage = NULL,
  588. .buffer = NULL,
  589. };
  590. if (btdm_queue_generic_deregister(&item)) {
  591. vSemaphoreDelete(item.handle);
  592. free(item.buffer);
  593. }
  594. return;
  595. #endif
  596. }
  597. static int32_t mutex_lock_wrapper(void *mutex)
  598. {
  599. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  600. }
  601. static int32_t mutex_unlock_wrapper(void *mutex)
  602. {
  603. return (int32_t)xSemaphoreGive(mutex);
  604. }
  605. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  606. {
  607. #if CONFIG_SPIRAM_USE_MALLOC
  608. StaticQueue_t *queue_buffer = NULL;
  609. uint8_t *queue_storage = NULL;
  610. QueueHandle_t handle = NULL;
  611. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  612. if (!queue_buffer) {
  613. goto error;
  614. }
  615. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  616. if (!queue_storage ) {
  617. goto error;
  618. }
  619. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  620. if (!handle) {
  621. goto error;
  622. }
  623. btdm_queue_item_t item = {
  624. .handle = handle,
  625. .storage = queue_storage,
  626. .buffer = queue_buffer,
  627. };
  628. if (!btdm_queue_generic_register(&item)) {
  629. goto error;
  630. }
  631. return handle;
  632. error:
  633. if (handle) {
  634. vQueueDelete(handle);
  635. }
  636. if (queue_storage) {
  637. free(queue_storage);
  638. }
  639. if (queue_buffer) {
  640. free(queue_buffer);
  641. }
  642. return NULL;
  643. #else
  644. return (void *)xQueueCreate(queue_len, item_size);
  645. #endif
  646. }
  647. static void queue_delete_wrapper(void *queue)
  648. {
  649. #if !CONFIG_SPIRAM_USE_MALLOC
  650. vQueueDelete(queue);
  651. #else
  652. btdm_queue_item_t item = {
  653. .handle = queue,
  654. .storage = NULL,
  655. .buffer = NULL,
  656. };
  657. if (btdm_queue_generic_deregister(&item)) {
  658. vQueueDelete(item.handle);
  659. free(item.storage);
  660. free(item.buffer);
  661. }
  662. return;
  663. #endif
  664. }
  665. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  666. {
  667. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  668. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  669. } else {
  670. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  671. }
  672. }
  673. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  674. {
  675. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  676. }
  677. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  678. {
  679. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  680. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  681. } else {
  682. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  683. }
  684. }
  685. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  686. {
  687. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  688. }
  689. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  690. {
  691. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  692. }
  693. static void task_delete_wrapper(void *task_handle)
  694. {
  695. vTaskDelete(task_handle);
  696. }
  697. static bool IRAM_ATTR is_in_isr_wrapper(void)
  698. {
  699. return !xPortCanYield();
  700. }
  701. static void IRAM_ATTR cause_sw_intr(void *arg)
  702. {
  703. /* just convert void * to int, because the width is the same */
  704. uint32_t intr_no = (uint32_t)arg;
  705. XTHAL_SET_INTSET((1<<intr_no));
  706. }
  707. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  708. {
  709. esp_err_t err = ESP_OK;
  710. #if CONFIG_FREERTOS_UNICORE
  711. cause_sw_intr((void *)intr_no);
  712. #else /* CONFIG_FREERTOS_UNICORE */
  713. if (xPortGetCoreID() == core_id) {
  714. cause_sw_intr((void *)intr_no);
  715. } else {
  716. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  717. }
  718. #endif /* !CONFIG_FREERTOS_UNICORE */
  719. return err;
  720. }
  721. static void *malloc_internal_wrapper(size_t size)
  722. {
  723. return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
  724. }
  725. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  726. {
  727. return esp_read_mac(mac, ESP_MAC_BT);
  728. }
  729. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  730. {
  731. /* empty function */
  732. }
  733. static int IRAM_ATTR rand_wrapper(void)
  734. {
  735. return (int)esp_random();
  736. }
  737. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  738. {
  739. // The number of lp cycles should not lead to overflow. Thrs: 100s
  740. // clock measurement is conducted
  741. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  742. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  743. return (uint32_t)us;
  744. }
  745. /*
  746. * @brief Converts a duration in slots into a number of low power clock cycles.
  747. */
  748. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  749. {
  750. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  751. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  752. // clock measurement is conducted
  753. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  754. return (uint32_t)cycles;
  755. }
  756. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  757. {
  758. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  759. return false;
  760. }
  761. /* wake up in advance considering the delay in enabling PHY/RF */
  762. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  763. return true;
  764. }
  765. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  766. {
  767. #ifdef CONFIG_PM_ENABLE
  768. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  769. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  770. #define BTDM_MIN_TIMER_UNCERTAINTY_US (500)
  771. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  772. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  773. // and set the timer in advance
  774. uint32_t uncertainty = (us_to_sleep >> 11);
  775. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  776. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  777. }
  778. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  779. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  780. }
  781. #endif
  782. }
  783. static void btdm_sleep_enter_phase2_wrapper(void)
  784. {
  785. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  786. esp_phy_disable();
  787. #ifdef CONFIG_PM_ENABLE
  788. if (s_pm_lock_acquired) {
  789. esp_pm_lock_release(s_pm_lock);
  790. s_pm_lock_acquired = false;
  791. }
  792. #endif
  793. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  794. esp_phy_disable();
  795. // pause bluetooth baseband
  796. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  797. }
  798. }
  799. static void btdm_sleep_exit_phase3_wrapper(void)
  800. {
  801. #ifdef CONFIG_PM_ENABLE
  802. if (!s_pm_lock_acquired) {
  803. s_pm_lock_acquired = true;
  804. esp_pm_lock_acquire(s_pm_lock);
  805. }
  806. #endif
  807. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  808. esp_phy_enable();
  809. btdm_check_and_init_bb();
  810. #ifdef CONFIG_PM_ENABLE
  811. esp_timer_stop(s_btdm_slp_tmr);
  812. #endif
  813. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  814. // resume bluetooth baseband
  815. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  816. esp_phy_enable();
  817. }
  818. }
  819. #ifdef CONFIG_PM_ENABLE
  820. static void btdm_slp_tmr_customer_callback(void * arg)
  821. {
  822. (void)(arg);
  823. if (!s_pm_lock_acquired) {
  824. s_pm_lock_acquired = true;
  825. esp_pm_lock_acquire(s_pm_lock);
  826. }
  827. }
  828. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  829. {
  830. (void)(arg);
  831. btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
  832. }
  833. #endif
  834. #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
  835. #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
  836. #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
  837. #define BTDM_ASYNC_WAKEUP_REQMAX 3
  838. static void btdm_wakeup_request_callback(void * arg)
  839. {
  840. (void)(arg);
  841. #if CONFIG_PM_ENABLE
  842. if (!s_pm_lock_acquired) {
  843. s_pm_lock_acquired = true;
  844. esp_pm_lock_acquire(s_pm_lock);
  845. }
  846. esp_timer_stop(s_btdm_slp_tmr);
  847. #endif
  848. btdm_wakeup_request();
  849. semphr_give_wrapper(s_wakeup_req_sem);
  850. }
  851. static bool async_wakeup_request(int event)
  852. {
  853. bool do_wakeup_request = false;
  854. switch (event) {
  855. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  856. btdm_in_wakeup_requesting_set(true);
  857. // NO break
  858. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  859. if (!btdm_power_state_active()) {
  860. do_wakeup_request = true;
  861. btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
  862. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  863. }
  864. break;
  865. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  866. if (!btdm_power_state_active()) {
  867. do_wakeup_request = true;
  868. #if CONFIG_PM_ENABLE
  869. if (!s_pm_lock_acquired) {
  870. s_pm_lock_acquired = true;
  871. esp_pm_lock_acquire(s_pm_lock);
  872. }
  873. esp_timer_stop(s_btdm_slp_tmr);
  874. #endif
  875. btdm_wakeup_request();
  876. }
  877. break;
  878. default:
  879. return false;
  880. }
  881. return do_wakeup_request;
  882. }
  883. static void async_wakeup_request_end(int event)
  884. {
  885. bool request_lock = false;
  886. switch (event) {
  887. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  888. request_lock = true;
  889. break;
  890. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  891. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  892. request_lock = false;
  893. break;
  894. default:
  895. return;
  896. }
  897. if (request_lock) {
  898. btdm_in_wakeup_requesting_set(false);
  899. }
  900. return;
  901. }
  902. static bool coex_bt_wakeup_request(void)
  903. {
  904. return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
  905. }
  906. static void coex_bt_wakeup_request_end(void)
  907. {
  908. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
  909. return;
  910. }
  911. static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
  912. {
  913. #if CONFIG_SW_COEXIST_ENABLE
  914. return coex_bt_request(event, latency, duration);
  915. #else
  916. return 0;
  917. #endif
  918. }
  919. static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
  920. {
  921. #if CONFIG_SW_COEXIST_ENABLE
  922. return coex_bt_release(event);
  923. #else
  924. return 0;
  925. #endif
  926. }
  927. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
  928. {
  929. #if CONFIG_SW_COEXIST_ENABLE
  930. return coex_register_bt_cb(cb);
  931. #else
  932. return 0;
  933. #endif
  934. }
  935. static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
  936. {
  937. #if CONFIG_SW_COEXIST_ENABLE
  938. return coex_bb_reset_lock();
  939. #else
  940. return 0;
  941. #endif
  942. }
  943. static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
  944. {
  945. #if CONFIG_SW_COEXIST_ENABLE
  946. coex_bb_reset_unlock(restore);
  947. #endif
  948. }
  949. static int coex_schm_register_btdm_callback_wrapper(void *callback)
  950. {
  951. #if CONFIG_SW_COEXIST_ENABLE
  952. return coex_schm_register_btdm_callback(callback);
  953. #else
  954. return 0;
  955. #endif
  956. }
  957. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  958. {
  959. #if CONFIG_SW_COEXIST_ENABLE
  960. coex_schm_status_bit_clear(type, status);
  961. #endif
  962. }
  963. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  964. {
  965. #if CONFIG_SW_COEXIST_ENABLE
  966. coex_schm_status_bit_set(type, status);
  967. #endif
  968. }
  969. static uint32_t coex_schm_interval_get_wrapper(void)
  970. {
  971. #if CONFIG_SW_COEXIST_ENABLE
  972. return coex_schm_interval_get();
  973. #else
  974. return 0;
  975. #endif
  976. }
  977. static uint8_t coex_schm_curr_period_get_wrapper(void)
  978. {
  979. #if CONFIG_SW_COEXIST_ENABLE
  980. return coex_schm_curr_period_get();
  981. #else
  982. return 1;
  983. #endif
  984. }
  985. static void * coex_schm_curr_phase_get_wrapper(void)
  986. {
  987. #if CONFIG_SW_COEXIST_ENABLE
  988. return coex_schm_curr_phase_get();
  989. #else
  990. return NULL;
  991. #endif
  992. }
  993. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
  994. {
  995. #if CONFIG_SW_COEXIST_ENABLE
  996. return coex_wifi_channel_get(primary, secondary);
  997. #else
  998. return -1;
  999. #endif
  1000. }
  1001. static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
  1002. {
  1003. #if CONFIG_SW_COEXIST_ENABLE
  1004. return coex_register_wifi_channel_change_callback(cb);
  1005. #else
  1006. return -1;
  1007. #endif
  1008. }
  1009. bool esp_vhci_host_check_send_available(void)
  1010. {
  1011. return API_vhci_host_check_send_available();
  1012. }
  1013. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  1014. {
  1015. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1016. API_vhci_host_send_packet(data, len);
  1017. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1018. }
  1019. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  1020. {
  1021. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  1022. }
  1023. static uint32_t btdm_config_mask_load(void)
  1024. {
  1025. uint32_t mask = 0x0;
  1026. #if CONFIG_BTDM_CTRL_HCI_MODE_UART_H4
  1027. mask |= BTDM_CFG_HCI_UART;
  1028. #endif
  1029. #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
  1030. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  1031. #endif
  1032. #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
  1033. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  1034. #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
  1035. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  1036. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  1037. return mask;
  1038. }
  1039. static void btdm_controller_mem_init(void)
  1040. {
  1041. /* initialise .data section */
  1042. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  1043. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  1044. //initial em, .bss section
  1045. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1046. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  1047. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  1048. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  1049. }
  1050. }
  1051. }
  1052. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  1053. {
  1054. int ret = heap_caps_add_region(start, end);
  1055. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  1056. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  1057. * we replace it by ESP_OK
  1058. */
  1059. if (ret == ESP_ERR_INVALID_SIZE) {
  1060. return ESP_OK;
  1061. }
  1062. return ret;
  1063. }
  1064. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  1065. {
  1066. bool update = true;
  1067. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  1068. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1069. return ESP_ERR_INVALID_STATE;
  1070. }
  1071. //already released
  1072. if (!(mode & btdm_dram_available_region[0].mode)) {
  1073. return ESP_ERR_INVALID_STATE;
  1074. }
  1075. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1076. //skip the share mode, idle mode and other mode
  1077. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  1078. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  1079. //clear the bit of the mode which will be released
  1080. btdm_dram_available_region[i].mode &= ~mode;
  1081. continue;
  1082. } else {
  1083. //clear the bit of the mode which will be released
  1084. btdm_dram_available_region[i].mode &= ~mode;
  1085. }
  1086. if (update) {
  1087. mem_start = btdm_dram_available_region[i].start;
  1088. mem_end = btdm_dram_available_region[i].end;
  1089. update = false;
  1090. }
  1091. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  1092. mem_end = btdm_dram_available_region[i].end;
  1093. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  1094. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  1095. && mem_end == btdm_dram_available_region[i+1].start) {
  1096. continue;
  1097. } else {
  1098. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1099. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1100. update = true;
  1101. }
  1102. } else {
  1103. mem_end = btdm_dram_available_region[i].end;
  1104. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1105. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1106. update = true;
  1107. }
  1108. }
  1109. if (mode == ESP_BT_MODE_BTDM) {
  1110. mem_start = (intptr_t)&_btdm_bss_start;
  1111. mem_end = (intptr_t)&_btdm_bss_end;
  1112. if (mem_start != mem_end) {
  1113. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1114. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1115. }
  1116. mem_start = (intptr_t)&_btdm_data_start;
  1117. mem_end = (intptr_t)&_btdm_data_end;
  1118. if (mem_start != mem_end) {
  1119. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1120. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1121. }
  1122. }
  1123. return ESP_OK;
  1124. }
  1125. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  1126. {
  1127. int ret;
  1128. intptr_t mem_start, mem_end;
  1129. ret = esp_bt_controller_mem_release(mode);
  1130. if (ret != ESP_OK) {
  1131. return ret;
  1132. }
  1133. if (mode == ESP_BT_MODE_BTDM) {
  1134. mem_start = (intptr_t)&_bt_bss_start;
  1135. mem_end = (intptr_t)&_bt_bss_end;
  1136. if (mem_start != mem_end) {
  1137. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1138. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1139. }
  1140. mem_start = (intptr_t)&_bt_data_start;
  1141. mem_end = (intptr_t)&_bt_data_end;
  1142. if (mem_start != mem_end) {
  1143. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1144. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1145. }
  1146. mem_start = (intptr_t)&_nimble_bss_start;
  1147. mem_end = (intptr_t)&_nimble_bss_end;
  1148. if (mem_start != mem_end) {
  1149. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1150. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1151. }
  1152. mem_start = (intptr_t)&_nimble_data_start;
  1153. mem_end = (intptr_t)&_nimble_data_end;
  1154. if (mem_start != mem_end) {
  1155. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1156. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1157. }
  1158. }
  1159. return ESP_OK;
  1160. }
  1161. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  1162. {
  1163. esp_err_t err;
  1164. uint32_t btdm_cfg_mask = 0;
  1165. //if all the bt available memory was already released, cannot initialize bluetooth controller
  1166. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  1167. return ESP_ERR_INVALID_STATE;
  1168. }
  1169. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1170. if (osi_funcs_p == NULL) {
  1171. return ESP_ERR_NO_MEM;
  1172. }
  1173. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1174. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1175. return ESP_ERR_INVALID_ARG;
  1176. }
  1177. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1178. return ESP_ERR_INVALID_STATE;
  1179. }
  1180. if (cfg == NULL) {
  1181. return ESP_ERR_INVALID_ARG;
  1182. }
  1183. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  1184. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  1185. return ESP_ERR_INVALID_ARG;
  1186. }
  1187. //overwrite some parameters
  1188. cfg->bt_max_sync_conn = CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF;
  1189. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  1190. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  1191. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  1192. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  1193. return ESP_ERR_INVALID_ARG;
  1194. }
  1195. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1196. #if CONFIG_SPIRAM_USE_MALLOC
  1197. btdm_queue_table_mux = xSemaphoreCreateMutex();
  1198. if (btdm_queue_table_mux == NULL) {
  1199. return ESP_ERR_NO_MEM;
  1200. }
  1201. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1202. #endif
  1203. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1204. if (s_wakeup_req_sem == NULL) {
  1205. err = ESP_ERR_NO_MEM;
  1206. goto error;
  1207. }
  1208. btdm_controller_mem_init();
  1209. periph_module_enable(PERIPH_BT_MODULE);
  1210. #ifdef CONFIG_PM_ENABLE
  1211. s_btdm_allow_light_sleep = false;
  1212. #endif
  1213. // set default sleep clock cycle and its fractional bits
  1214. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1215. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1216. #if CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG
  1217. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1218. #if CONFIG_BTDM_CTRL_LPCLK_SEL_EXT_32K_XTAL
  1219. // check whether or not EXT_CRYS is working
  1220. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  1221. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
  1222. #ifdef CONFIG_PM_ENABLE
  1223. s_btdm_allow_light_sleep = true;
  1224. #endif
  1225. } else {
  1226. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  1227. "light sleep mode will not be able to apply when bluetooth is enabled");
  1228. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1229. }
  1230. #else
  1231. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1232. #endif
  1233. bool select_src_ret __attribute__((unused));
  1234. bool set_div_ret __attribute__((unused));
  1235. if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1236. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1237. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1238. assert(select_src_ret && set_div_ret);
  1239. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1240. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1241. } else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
  1242. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1243. set_div_ret = btdm_lpclk_set_div(0);
  1244. assert(select_src_ret && set_div_ret);
  1245. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1246. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1247. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1248. assert(btdm_lpcycle_us != 0);
  1249. }
  1250. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1251. #elif CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED
  1252. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1253. #else
  1254. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1255. #endif
  1256. #ifdef CONFIG_PM_ENABLE
  1257. if (!s_btdm_allow_light_sleep) {
  1258. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1259. goto error;
  1260. }
  1261. }
  1262. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1263. goto error;
  1264. }
  1265. esp_timer_create_args_t create_args = {
  1266. .callback = btdm_slp_tmr_callback,
  1267. .arg = NULL,
  1268. .name = "btSlp"
  1269. };
  1270. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1271. goto error;
  1272. }
  1273. s_pm_lock_acquired = true;
  1274. #endif
  1275. #if CONFIG_SW_COEXIST_ENABLE
  1276. coex_init();
  1277. #endif
  1278. btdm_cfg_mask = btdm_config_mask_load();
  1279. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1280. err = ESP_ERR_NO_MEM;
  1281. goto error;
  1282. }
  1283. #ifdef CONFIG_BTDM_COEX_BLE_ADV_HIGH_PRIORITY
  1284. coex_ble_adv_priority_high_set(true);
  1285. #else
  1286. coex_ble_adv_priority_high_set(false);
  1287. #endif
  1288. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1289. return ESP_OK;
  1290. error:
  1291. #ifdef CONFIG_PM_ENABLE
  1292. if (!s_btdm_allow_light_sleep) {
  1293. if (s_light_sleep_pm_lock != NULL) {
  1294. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1295. s_light_sleep_pm_lock = NULL;
  1296. }
  1297. }
  1298. if (s_pm_lock != NULL) {
  1299. esp_pm_lock_delete(s_pm_lock);
  1300. s_pm_lock = NULL;
  1301. }
  1302. if (s_btdm_slp_tmr != NULL) {
  1303. esp_timer_delete(s_btdm_slp_tmr);
  1304. s_btdm_slp_tmr = NULL;
  1305. }
  1306. #endif
  1307. if (s_wakeup_req_sem) {
  1308. semphr_delete_wrapper(s_wakeup_req_sem);
  1309. s_wakeup_req_sem = NULL;
  1310. }
  1311. return err;
  1312. }
  1313. esp_err_t esp_bt_controller_deinit(void)
  1314. {
  1315. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1316. return ESP_ERR_INVALID_STATE;
  1317. }
  1318. btdm_controller_deinit();
  1319. periph_module_disable(PERIPH_BT_MODULE);
  1320. #ifdef CONFIG_PM_ENABLE
  1321. if (!s_btdm_allow_light_sleep) {
  1322. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1323. s_light_sleep_pm_lock = NULL;
  1324. }
  1325. esp_timer_stop(s_btdm_slp_tmr);
  1326. esp_timer_delete(s_btdm_slp_tmr);
  1327. s_btdm_slp_tmr = NULL;
  1328. s_pm_lock_acquired = false;
  1329. #endif
  1330. semphr_delete_wrapper(s_wakeup_req_sem);
  1331. s_wakeup_req_sem = NULL;
  1332. #if CONFIG_SPIRAM_USE_MALLOC
  1333. vSemaphoreDelete(btdm_queue_table_mux);
  1334. btdm_queue_table_mux = NULL;
  1335. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1336. #endif
  1337. free(osi_funcs_p);
  1338. osi_funcs_p = NULL;
  1339. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1340. btdm_lpcycle_us = 0;
  1341. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1342. return ESP_OK;
  1343. }
  1344. static void bt_shutdown(void)
  1345. {
  1346. esp_err_t ret = ESP_OK;
  1347. ESP_LOGD(BTDM_LOG_TAG, "stop Bluetooth");
  1348. ret = esp_bt_controller_disable();
  1349. if (ESP_OK != ret) {
  1350. ESP_LOGW(BTDM_LOG_TAG, "controller disable ret=%d", ret);
  1351. }
  1352. return;
  1353. }
  1354. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1355. {
  1356. int ret;
  1357. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1358. return ESP_ERR_INVALID_STATE;
  1359. }
  1360. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1361. if (mode != btdm_controller_get_mode()) {
  1362. return ESP_ERR_INVALID_ARG;
  1363. }
  1364. #ifdef CONFIG_PM_ENABLE
  1365. if (!s_btdm_allow_light_sleep) {
  1366. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1367. }
  1368. esp_pm_lock_acquire(s_pm_lock);
  1369. #endif
  1370. esp_phy_enable();
  1371. #if CONFIG_SW_COEXIST_ENABLE
  1372. coex_enable();
  1373. #endif
  1374. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1375. btdm_controller_enable_sleep(true);
  1376. }
  1377. // inititalize bluetooth baseband
  1378. btdm_check_and_init_bb();
  1379. ret = btdm_controller_enable(mode);
  1380. if (ret != 0) {
  1381. #if CONFIG_SW_COEXIST_ENABLE
  1382. coex_disable();
  1383. #endif
  1384. esp_phy_disable();
  1385. #ifdef CONFIG_PM_ENABLE
  1386. if (!s_btdm_allow_light_sleep) {
  1387. esp_pm_lock_release(s_light_sleep_pm_lock);
  1388. }
  1389. esp_pm_lock_release(s_pm_lock);
  1390. #endif
  1391. return ESP_ERR_INVALID_STATE;
  1392. }
  1393. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1394. ret = esp_register_shutdown_handler(bt_shutdown);
  1395. if (ret != ESP_OK) {
  1396. ESP_LOGW(BTDM_LOG_TAG, "Register shutdown handler failed, ret = 0x%x", ret);
  1397. }
  1398. return ESP_OK;
  1399. }
  1400. esp_err_t esp_bt_controller_disable(void)
  1401. {
  1402. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1403. return ESP_ERR_INVALID_STATE;
  1404. }
  1405. // disable modem sleep and wake up from sleep mode
  1406. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1407. btdm_controller_enable_sleep(false);
  1408. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
  1409. while (!btdm_power_state_active()) {
  1410. esp_rom_delay_us(1000);
  1411. }
  1412. }
  1413. btdm_controller_disable();
  1414. #if CONFIG_SW_COEXIST_ENABLE
  1415. coex_disable();
  1416. #endif
  1417. esp_phy_disable();
  1418. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1419. esp_unregister_shutdown_handler(bt_shutdown);
  1420. #ifdef CONFIG_PM_ENABLE
  1421. if (!s_btdm_allow_light_sleep) {
  1422. esp_pm_lock_release(s_light_sleep_pm_lock);
  1423. }
  1424. esp_pm_lock_release(s_pm_lock);
  1425. #endif
  1426. return ESP_OK;
  1427. }
  1428. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1429. {
  1430. return btdm_controller_status;
  1431. }
  1432. /* extra functions */
  1433. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1434. {
  1435. if (ble_txpwr_set(power_type, power_level) != 0) {
  1436. return ESP_ERR_INVALID_ARG;
  1437. }
  1438. return ESP_OK;
  1439. }
  1440. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1441. {
  1442. return (esp_power_level_t)ble_txpwr_get(power_type);
  1443. }
  1444. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1445. {
  1446. esp_err_t err;
  1447. int ret;
  1448. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1449. if (ret == 0) {
  1450. err = ESP_OK;
  1451. } else if (ret == -1) {
  1452. err = ESP_ERR_INVALID_ARG;
  1453. } else {
  1454. err = ESP_ERR_INVALID_STATE;
  1455. }
  1456. return err;
  1457. }
  1458. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1459. {
  1460. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1461. return ESP_ERR_INVALID_ARG;
  1462. }
  1463. return ESP_OK;
  1464. }
  1465. esp_err_t esp_bt_sleep_enable (void)
  1466. {
  1467. esp_err_t status;
  1468. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1469. return ESP_ERR_INVALID_STATE;
  1470. }
  1471. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1472. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1473. btdm_controller_enable_sleep (true);
  1474. status = ESP_OK;
  1475. } else {
  1476. status = ESP_ERR_NOT_SUPPORTED;
  1477. }
  1478. return status;
  1479. }
  1480. esp_err_t esp_bt_sleep_disable (void)
  1481. {
  1482. esp_err_t status;
  1483. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1484. return ESP_ERR_INVALID_STATE;
  1485. }
  1486. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1487. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1488. btdm_controller_enable_sleep (false);
  1489. status = ESP_OK;
  1490. } else {
  1491. status = ESP_ERR_NOT_SUPPORTED;
  1492. }
  1493. return status;
  1494. }
  1495. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1496. {
  1497. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1498. return ESP_ERR_INVALID_STATE;
  1499. }
  1500. bredr_sco_datapath_set(data_path);
  1501. return ESP_OK;
  1502. }
  1503. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1504. {
  1505. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1506. return ESP_ERR_INVALID_STATE;
  1507. }
  1508. btdm_controller_scan_duplicate_list_clear();
  1509. return ESP_OK;
  1510. }
  1511. #endif /* CONFIG_BT_ENABLED */