gdma.c 31 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. // #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  7. #include <stdlib.h>
  8. #include <sys/cdefs.h>
  9. #include "sdkconfig.h"
  10. #include "freertos/FreeRTOS.h"
  11. #include "freertos/task.h"
  12. #include "soc/soc_caps.h"
  13. #include "soc/periph_defs.h"
  14. #include "esp_intr_alloc.h"
  15. #include "esp_log.h"
  16. #include "esp_check.h"
  17. #include "esp_heap_caps.h"
  18. #include "hal/gdma_hal.h"
  19. #include "hal/gdma_ll.h"
  20. #include "soc/gdma_periph.h"
  21. #include "soc/soc_memory_types.h"
  22. #include "esp_private/periph_ctrl.h"
  23. #include "esp_private/gdma.h"
  24. static const char *TAG = "gdma";
  25. #if CONFIG_GDMA_ISR_IRAM_SAFE
  26. #define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED)
  27. #define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
  28. #else
  29. #define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED
  30. #define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
  31. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  32. #if CONFIG_GDMA_CTRL_FUNC_IN_IRAM
  33. #define GDMA_CTRL_FUNC_ATTR IRAM_ATTR
  34. #else
  35. #define GDMA_CTRL_FUNC_ATTR
  36. #endif // CONFIG_GDMA_CTRL_FUNC_IN_IRAM
  37. #define GDMA_INVALID_PERIPH_TRIG (0x3F)
  38. #define SEARCH_REQUEST_RX_CHANNEL (1 << 0)
  39. #define SEARCH_REQUEST_TX_CHANNEL (1 << 1)
  40. typedef struct gdma_platform_t gdma_platform_t;
  41. typedef struct gdma_group_t gdma_group_t;
  42. typedef struct gdma_pair_t gdma_pair_t;
  43. typedef struct gdma_channel_t gdma_channel_t;
  44. typedef struct gdma_tx_channel_t gdma_tx_channel_t;
  45. typedef struct gdma_rx_channel_t gdma_rx_channel_t;
  46. /**
  47. * GDMA driver consists of there object class, namely: Group, Pair and Channel.
  48. * Channel is allocated when user calls `gdma_new_channel`, its lifecycle is maintained by user.
  49. * Pair and Group are all lazy allocated, their life cycles are maintained by this driver.
  50. * We use reference count to track their life cycles, i.e. the driver will free their memory only when their reference count reached to 0.
  51. *
  52. * We don't use an all-in-one spin lock in this driver, instead, we created different spin locks at different level.
  53. * For platform, it has a spinlock, which is used to protect the group handle slots and reference count of each group.
  54. * For group, it has a spinlock, which is used to protect group level stuffs, e.g. hal object, pair handle slots and reference count of each pair.
  55. * For pair, it has a spinlock, which is used to protect pair level stuffs, e.g. channel handle slots, occupy code.
  56. */
  57. struct gdma_platform_t {
  58. portMUX_TYPE spinlock; // platform level spinlock
  59. gdma_group_t *groups[SOC_GDMA_GROUPS]; // array of GDMA group instances
  60. int group_ref_counts[SOC_GDMA_GROUPS]; // reference count used to protect group install/uninstall
  61. };
  62. struct gdma_group_t {
  63. int group_id; // Group ID, index from 0
  64. gdma_hal_context_t hal; // HAL instance is at group level
  65. portMUX_TYPE spinlock; // group level spinlock
  66. gdma_pair_t *pairs[SOC_GDMA_PAIRS_PER_GROUP]; // handles of GDMA pairs
  67. int pair_ref_counts[SOC_GDMA_PAIRS_PER_GROUP]; // reference count used to protect pair install/uninstall
  68. };
  69. struct gdma_pair_t {
  70. gdma_group_t *group; // which group the pair belongs to
  71. int pair_id; // Pair ID, index from 0
  72. gdma_tx_channel_t *tx_chan; // pointer of tx channel in the pair
  73. gdma_rx_channel_t *rx_chan; // pointer of rx channel in the pair
  74. int occupy_code; // each bit indicates which channel has been occupied (an occupied channel will be skipped during channel search)
  75. portMUX_TYPE spinlock; // pair level spinlock
  76. };
  77. struct gdma_channel_t {
  78. gdma_pair_t *pair; // which pair the channel belongs to
  79. intr_handle_t intr; // per-channel interrupt handle
  80. gdma_channel_direction_t direction; // channel direction
  81. int periph_id; // Peripheral instance ID, indicates which peripheral is connected to this GDMA channel
  82. size_t sram_alignment; // alignment for memory in SRAM
  83. size_t psram_alignment; // alignment for memory in PSRAM
  84. esp_err_t (*del)(gdma_channel_t *channel); // channel deletion function, it's polymorphic, see `gdma_del_tx_channel` or `gdma_del_rx_channel`
  85. };
  86. struct gdma_tx_channel_t {
  87. gdma_channel_t base; // GDMA channel, base class
  88. void *user_data; // user registered DMA event data
  89. gdma_event_callback_t on_trans_eof; // TX EOF callback
  90. };
  91. struct gdma_rx_channel_t {
  92. gdma_channel_t base; // GDMA channel, base class
  93. void *user_data; // user registered DMA event data
  94. gdma_event_callback_t on_recv_eof; // RX EOF callback
  95. };
  96. static gdma_group_t *gdma_acquire_group_handle(int group_id);
  97. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id);
  98. static void gdma_release_group_handle(gdma_group_t *group);
  99. static void gdma_release_pair_handle(gdma_pair_t *pair);
  100. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel);
  101. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel);
  102. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan);
  103. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan);
  104. // gdma driver platform
  105. static gdma_platform_t s_platform = {
  106. .spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED,
  107. .groups = {} // groups will be lazy installed
  108. };
  109. esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_channel_handle_t *ret_chan)
  110. {
  111. esp_err_t ret = ESP_OK;
  112. gdma_tx_channel_t *alloc_tx_channel = NULL;
  113. gdma_rx_channel_t *alloc_rx_channel = NULL;
  114. int search_code = 0;
  115. gdma_pair_t *pair = NULL;
  116. gdma_group_t *group = NULL;
  117. ESP_GOTO_ON_FALSE(config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  118. if (config->flags.reserve_sibling) {
  119. search_code = SEARCH_REQUEST_RX_CHANNEL | SEARCH_REQUEST_TX_CHANNEL; // search for a pair of channels
  120. }
  121. if (config->direction == GDMA_CHANNEL_DIRECTION_TX) {
  122. search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only
  123. alloc_tx_channel = heap_caps_calloc(1, sizeof(gdma_tx_channel_t), GDMA_MEM_ALLOC_CAPS);
  124. ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel");
  125. } else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) {
  126. search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only
  127. alloc_rx_channel = heap_caps_calloc(1, sizeof(gdma_rx_channel_t), GDMA_MEM_ALLOC_CAPS);
  128. ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel");
  129. }
  130. if (config->sibling_chan) {
  131. pair = config->sibling_chan->pair;
  132. ESP_GOTO_ON_FALSE(pair, ESP_ERR_INVALID_ARG, err, TAG, "invalid sibling channel");
  133. ESP_GOTO_ON_FALSE(config->sibling_chan->direction != config->direction, ESP_ERR_INVALID_ARG, err, TAG, "sibling channel should have a different direction");
  134. group = pair->group;
  135. portENTER_CRITICAL(&group->spinlock);
  136. group->pair_ref_counts[pair->pair_id]++; // channel obtains a reference to pair
  137. portEXIT_CRITICAL(&group->spinlock);
  138. goto search_done; // skip the search path below if user has specify a sibling channel
  139. }
  140. for (int i = 0; i < SOC_GDMA_GROUPS && search_code; i++) { // loop to search group
  141. group = gdma_acquire_group_handle(i);
  142. ESP_GOTO_ON_FALSE(group, ESP_ERR_NO_MEM, err, TAG, "no mem for group(%d)", i);
  143. for (int j = 0; j < SOC_GDMA_PAIRS_PER_GROUP && search_code; j++) { // loop to search pair
  144. pair = gdma_acquire_pair_handle(group, j);
  145. ESP_GOTO_ON_FALSE(pair, ESP_ERR_NO_MEM, err, TAG, "no mem for pair(%d,%d)", i, j);
  146. portENTER_CRITICAL(&pair->spinlock);
  147. if (!(search_code & pair->occupy_code)) { // pair has suitable position for acquired channel(s)
  148. pair->occupy_code |= search_code;
  149. search_code = 0; // exit search loop
  150. }
  151. portEXIT_CRITICAL(&pair->spinlock);
  152. if (search_code) {
  153. gdma_release_pair_handle(pair);
  154. pair = NULL;
  155. }
  156. } // loop used to search pair
  157. if (search_code) {
  158. gdma_release_group_handle(group);
  159. group = NULL;
  160. }
  161. } // loop used to search group
  162. ESP_GOTO_ON_FALSE(search_code == 0, ESP_ERR_NOT_FOUND, err, TAG, "no free gdma channel, search code=%d", search_code);
  163. assert(pair && group); // pair and group handle shouldn't be NULL
  164. search_done:
  165. // register TX channel
  166. if (alloc_tx_channel) {
  167. pair->tx_chan = alloc_tx_channel;
  168. alloc_tx_channel->base.pair = pair;
  169. alloc_tx_channel->base.direction = GDMA_CHANNEL_DIRECTION_TX;
  170. alloc_tx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  171. alloc_tx_channel->base.del = gdma_del_tx_channel; // set channel deletion function
  172. *ret_chan = &alloc_tx_channel->base; // return the installed channel
  173. }
  174. // register RX channel
  175. if (alloc_rx_channel) {
  176. pair->rx_chan = alloc_rx_channel;
  177. alloc_rx_channel->base.pair = pair;
  178. alloc_rx_channel->base.direction = GDMA_CHANNEL_DIRECTION_RX;
  179. alloc_rx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  180. alloc_rx_channel->base.del = gdma_del_rx_channel; // set channel deletion function
  181. *ret_chan = &alloc_rx_channel->base; // return the installed channel
  182. }
  183. ESP_LOGD(TAG, "new %s channel (%d,%d) at %p", (config->direction == GDMA_CHANNEL_DIRECTION_TX) ? "tx" : "rx",
  184. group->group_id, pair->pair_id, *ret_chan);
  185. return ESP_OK;
  186. err:
  187. if (alloc_tx_channel) {
  188. free(alloc_tx_channel);
  189. }
  190. if (alloc_rx_channel) {
  191. free(alloc_rx_channel);
  192. }
  193. if (pair) {
  194. gdma_release_pair_handle(pair);
  195. }
  196. if (group) {
  197. gdma_release_group_handle(group);
  198. }
  199. return ret;
  200. }
  201. esp_err_t gdma_del_channel(gdma_channel_handle_t dma_chan)
  202. {
  203. esp_err_t ret = ESP_OK;
  204. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  205. ret = dma_chan->del(dma_chan); // call `gdma_del_tx_channel` or `gdma_del_rx_channel`
  206. err:
  207. return ret;
  208. }
  209. esp_err_t gdma_get_channel_id(gdma_channel_handle_t dma_chan, int *channel_id)
  210. {
  211. esp_err_t ret = ESP_OK;
  212. gdma_pair_t *pair = NULL;
  213. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  214. pair = dma_chan->pair;
  215. *channel_id = pair->pair_id;
  216. err:
  217. return ret;
  218. }
  219. esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_periph)
  220. {
  221. esp_err_t ret = ESP_OK;
  222. gdma_pair_t *pair = NULL;
  223. gdma_group_t *group = NULL;
  224. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  225. ESP_GOTO_ON_FALSE(dma_chan->periph_id == GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "channel is using by peripheral: %d", dma_chan->periph_id);
  226. pair = dma_chan->pair;
  227. group = pair->group;
  228. dma_chan->periph_id = trig_periph.instance_id;
  229. // enable/disable m2m mode
  230. gdma_ll_enable_m2m_mode(group->hal.dev, pair->pair_id, trig_periph.periph == GDMA_TRIG_PERIPH_M2M);
  231. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  232. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  233. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  234. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  235. }
  236. } else {
  237. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  238. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  239. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  240. }
  241. }
  242. err:
  243. return ret;
  244. }
  245. esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan)
  246. {
  247. esp_err_t ret = ESP_OK;
  248. gdma_pair_t *pair = NULL;
  249. gdma_group_t *group = NULL;
  250. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  251. ESP_GOTO_ON_FALSE(dma_chan->periph_id != GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "no peripheral is connected to the channel");
  252. pair = dma_chan->pair;
  253. group = pair->group;
  254. dma_chan->periph_id = GDMA_INVALID_PERIPH_TRIG;
  255. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  256. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  257. } else {
  258. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  259. }
  260. err:
  261. return ret;
  262. }
  263. esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability)
  264. {
  265. esp_err_t ret = ESP_OK;
  266. gdma_pair_t *pair = NULL;
  267. gdma_group_t *group = NULL;
  268. bool en_burst = true;
  269. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  270. pair = dma_chan->pair;
  271. group = pair->group;
  272. size_t sram_alignment = ability->sram_trans_align;
  273. size_t psram_alignment = ability->psram_trans_align;
  274. // alignment should be 2^n
  275. ESP_GOTO_ON_FALSE((sram_alignment & (sram_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, err, TAG, "invalid sram alignment: %zu", sram_alignment);
  276. #if SOC_GDMA_SUPPORT_PSRAM
  277. int block_size_index = 0;
  278. switch (psram_alignment) {
  279. case 64: // 64 Bytes alignment
  280. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_64B;
  281. break;
  282. case 32: // 32 Bytes alignment
  283. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_32B;
  284. break;
  285. case 16: // 16 Bytes alignment
  286. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  287. break;
  288. case 0: // no alignment is requirement
  289. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  290. psram_alignment = SOC_GDMA_PSRAM_MIN_ALIGN; // fall back to minimal alignment
  291. break;
  292. default:
  293. ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid psram alignment: %zu", psram_alignment);
  294. break;
  295. }
  296. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  297. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  298. // TX channel can always enable burst mode, no matter data alignment
  299. gdma_ll_tx_enable_data_burst(group->hal.dev, pair->pair_id, true);
  300. gdma_ll_tx_enable_descriptor_burst(group->hal.dev, pair->pair_id, true);
  301. #if SOC_GDMA_SUPPORT_PSRAM
  302. gdma_ll_tx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  303. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  304. } else {
  305. // RX channel burst mode depends on specific data alignment
  306. en_burst = sram_alignment >= 4;
  307. gdma_ll_rx_enable_data_burst(group->hal.dev, pair->pair_id, en_burst);
  308. gdma_ll_rx_enable_descriptor_burst(group->hal.dev, pair->pair_id, en_burst);
  309. #if SOC_GDMA_SUPPORT_PSRAM
  310. gdma_ll_rx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  311. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  312. }
  313. dma_chan->sram_alignment = sram_alignment;
  314. dma_chan->psram_alignment = psram_alignment;
  315. ESP_LOGD(TAG, "%s channel (%d,%d), (%zu:%zu) bytes aligned, burst %s", dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX ? "tx" : "rx",
  316. group->group_id, pair->pair_id, sram_alignment, psram_alignment, en_burst ? "enabled" : "disabled");
  317. err:
  318. return ret;
  319. }
  320. esp_err_t gdma_apply_strategy(gdma_channel_handle_t dma_chan, const gdma_strategy_config_t *config)
  321. {
  322. esp_err_t ret = ESP_OK;
  323. gdma_pair_t *pair = NULL;
  324. gdma_group_t *group = NULL;
  325. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  326. pair = dma_chan->pair;
  327. group = pair->group;
  328. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  329. gdma_ll_tx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  330. gdma_ll_tx_enable_auto_write_back(group->hal.dev, pair->pair_id, config->auto_update_desc);
  331. } else {
  332. gdma_ll_rx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  333. }
  334. err:
  335. return ret;
  336. }
  337. esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_tx_event_callbacks_t *cbs, void *user_data)
  338. {
  339. esp_err_t ret = ESP_OK;
  340. gdma_pair_t *pair = NULL;
  341. gdma_group_t *group = NULL;
  342. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  343. pair = dma_chan->pair;
  344. group = pair->group;
  345. gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base);
  346. #if CONFIG_GDMA_ISR_IRAM_SAFE
  347. if (cbs->on_trans_eof) {
  348. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_trans_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_trans_eof not in IRAM");
  349. }
  350. if (user_data) {
  351. ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
  352. esp_ptr_in_diram_dram(user_data) ||
  353. esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
  354. }
  355. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  356. // lazy install interrupt service
  357. ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed");
  358. // enable/disable GDMA interrupt events for TX channel
  359. portENTER_CRITICAL(&pair->spinlock);
  360. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_TX_EOF, cbs->on_trans_eof != NULL);
  361. portEXIT_CRITICAL(&pair->spinlock);
  362. tx_chan->on_trans_eof = cbs->on_trans_eof;
  363. tx_chan->user_data = user_data;
  364. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  365. err:
  366. return ret;
  367. }
  368. esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_rx_event_callbacks_t *cbs, void *user_data)
  369. {
  370. esp_err_t ret = ESP_OK;
  371. gdma_pair_t *pair = NULL;
  372. gdma_group_t *group = NULL;
  373. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  374. pair = dma_chan->pair;
  375. group = pair->group;
  376. gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base);
  377. #if CONFIG_GDMA_ISR_IRAM_SAFE
  378. if (cbs->on_recv_eof) {
  379. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_recv_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_recv_eof not in IRAM");
  380. }
  381. if (user_data) {
  382. ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
  383. esp_ptr_in_diram_dram(user_data) ||
  384. esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
  385. }
  386. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  387. // lazy install interrupt service
  388. ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed");
  389. // enable/disable GDMA interrupt events for RX channel
  390. portENTER_CRITICAL(&pair->spinlock);
  391. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_RX_SUC_EOF, cbs->on_recv_eof != NULL);
  392. portEXIT_CRITICAL(&pair->spinlock);
  393. rx_chan->on_recv_eof = cbs->on_recv_eof;
  394. rx_chan->user_data = user_data;
  395. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  396. err:
  397. return ret;
  398. }
  399. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
  400. {
  401. esp_err_t ret = ESP_OK;
  402. gdma_pair_t *pair = NULL;
  403. gdma_group_t *group = NULL;
  404. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  405. pair = dma_chan->pair;
  406. group = pair->group;
  407. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  408. gdma_ll_rx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  409. gdma_ll_rx_start(group->hal.dev, pair->pair_id);
  410. } else {
  411. gdma_ll_tx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  412. gdma_ll_tx_start(group->hal.dev, pair->pair_id);
  413. }
  414. err:
  415. return ret;
  416. }
  417. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
  418. {
  419. esp_err_t ret = ESP_OK;
  420. gdma_pair_t *pair = NULL;
  421. gdma_group_t *group = NULL;
  422. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  423. pair = dma_chan->pair;
  424. group = pair->group;
  425. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  426. gdma_ll_rx_stop(group->hal.dev, pair->pair_id);
  427. } else {
  428. gdma_ll_tx_stop(group->hal.dev, pair->pair_id);
  429. }
  430. err:
  431. return ret;
  432. }
  433. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
  434. {
  435. esp_err_t ret = ESP_OK;
  436. gdma_pair_t *pair = NULL;
  437. gdma_group_t *group = NULL;
  438. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  439. pair = dma_chan->pair;
  440. group = pair->group;
  441. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  442. gdma_ll_rx_restart(group->hal.dev, pair->pair_id);
  443. } else {
  444. gdma_ll_tx_restart(group->hal.dev, pair->pair_id);
  445. }
  446. err:
  447. return ret;
  448. }
  449. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
  450. {
  451. esp_err_t ret = ESP_OK;
  452. gdma_pair_t *pair = NULL;
  453. gdma_group_t *group = NULL;
  454. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  455. pair = dma_chan->pair;
  456. group = pair->group;
  457. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  458. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id);
  459. } else {
  460. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id);
  461. }
  462. err:
  463. return ret;
  464. }
  465. static void gdma_release_group_handle(gdma_group_t *group)
  466. {
  467. int group_id = group->group_id;
  468. bool do_deinitialize = false;
  469. portENTER_CRITICAL(&s_platform.spinlock);
  470. s_platform.group_ref_counts[group_id]--;
  471. if (s_platform.group_ref_counts[group_id] == 0) {
  472. assert(s_platform.groups[group_id]);
  473. do_deinitialize = true;
  474. s_platform.groups[group_id] = NULL; // deregister from platfrom
  475. gdma_ll_enable_clock(group->hal.dev, false);
  476. periph_module_disable(gdma_periph_signals.groups[group_id].module);
  477. }
  478. portEXIT_CRITICAL(&s_platform.spinlock);
  479. if (do_deinitialize) {
  480. free(group);
  481. ESP_LOGD(TAG, "del group %d", group_id);
  482. }
  483. }
  484. static gdma_group_t *gdma_acquire_group_handle(int group_id)
  485. {
  486. bool new_group = false;
  487. gdma_group_t *group = NULL;
  488. gdma_group_t *pre_alloc_group = heap_caps_calloc(1, sizeof(gdma_group_t), GDMA_MEM_ALLOC_CAPS);
  489. if (!pre_alloc_group) {
  490. goto out;
  491. }
  492. portENTER_CRITICAL(&s_platform.spinlock);
  493. if (!s_platform.groups[group_id]) {
  494. new_group = true;
  495. group = pre_alloc_group;
  496. s_platform.groups[group_id] = group; // register to platform
  497. group->group_id = group_id;
  498. group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  499. periph_module_enable(gdma_periph_signals.groups[group_id].module); // enable APB to access GDMA registers
  500. gdma_hal_init(&group->hal, group_id); // initialize HAL context
  501. gdma_ll_enable_clock(group->hal.dev, true); // enable gdma clock
  502. } else {
  503. group = s_platform.groups[group_id];
  504. }
  505. // someone acquired the group handle means we have a new object that refer to this group
  506. s_platform.group_ref_counts[group_id]++;
  507. portEXIT_CRITICAL(&s_platform.spinlock);
  508. if (new_group) {
  509. ESP_LOGD(TAG, "new group (%d) at %p", group->group_id, group);
  510. } else {
  511. free(pre_alloc_group);
  512. }
  513. out:
  514. return group;
  515. }
  516. static void gdma_release_pair_handle(gdma_pair_t *pair)
  517. {
  518. gdma_group_t *group = pair->group;
  519. int pair_id = pair->pair_id;
  520. bool do_deinitialize = false;
  521. portENTER_CRITICAL(&group->spinlock);
  522. group->pair_ref_counts[pair_id]--;
  523. if (group->pair_ref_counts[pair_id] == 0) {
  524. assert(group->pairs[pair_id]);
  525. do_deinitialize = true;
  526. group->pairs[pair_id] = NULL; // deregister from pair
  527. }
  528. portEXIT_CRITICAL(&group->spinlock);
  529. if (do_deinitialize) {
  530. free(pair);
  531. ESP_LOGD(TAG, "del pair (%d,%d)", group->group_id, pair_id);
  532. gdma_release_group_handle(group);
  533. }
  534. }
  535. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id)
  536. {
  537. bool new_pair = false;
  538. gdma_pair_t *pair = NULL;
  539. gdma_pair_t *pre_alloc_pair = heap_caps_calloc(1, sizeof(gdma_pair_t), GDMA_MEM_ALLOC_CAPS);
  540. if (!pre_alloc_pair) {
  541. goto out;
  542. }
  543. portENTER_CRITICAL(&group->spinlock);
  544. if (!group->pairs[pair_id]) {
  545. new_pair = true;
  546. pair = pre_alloc_pair;
  547. group->pairs[pair_id] = pair; // register to group
  548. pair->group = group;
  549. pair->pair_id = pair_id;
  550. pair->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  551. } else {
  552. pair = group->pairs[pair_id];
  553. }
  554. // someone acquired the pair handle means we have a new object that refer to this pair
  555. group->pair_ref_counts[pair_id]++;
  556. portEXIT_CRITICAL(&group->spinlock);
  557. if (new_pair) {
  558. portENTER_CRITICAL(&s_platform.spinlock);
  559. s_platform.group_ref_counts[group->group_id]++; // pair obtains a reference to group
  560. portEXIT_CRITICAL(&s_platform.spinlock);
  561. ESP_LOGD(TAG, "new pair (%d,%d) at %p", group->group_id, pair->pair_id, pair);
  562. } else {
  563. free(pre_alloc_pair);
  564. }
  565. out:
  566. return pair;
  567. }
  568. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel)
  569. {
  570. gdma_pair_t *pair = dma_channel->pair;
  571. gdma_group_t *group = pair->group;
  572. int pair_id = pair->pair_id;
  573. int group_id = group->group_id;
  574. gdma_tx_channel_t *tx_chan = __containerof(dma_channel, gdma_tx_channel_t, base);
  575. portENTER_CRITICAL(&pair->spinlock);
  576. pair->tx_chan = NULL;
  577. pair->occupy_code &= ~SEARCH_REQUEST_TX_CHANNEL;
  578. portEXIT_CRITICAL(&pair->spinlock);
  579. if (dma_channel->intr) {
  580. esp_intr_free(dma_channel->intr);
  581. portENTER_CRITICAL(&pair->spinlock);
  582. gdma_ll_tx_enable_interrupt(group->hal.dev, pair_id, UINT32_MAX, false); // disable all interupt events
  583. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair_id, UINT32_MAX); // clear all pending events
  584. portEXIT_CRITICAL(&pair->spinlock);
  585. ESP_LOGD(TAG, "uninstall interrupt service for tx channel (%d,%d)", group_id, pair_id);
  586. }
  587. free(tx_chan);
  588. ESP_LOGD(TAG, "del tx channel (%d,%d)", group_id, pair_id);
  589. // channel has a reference on pair, release it now
  590. gdma_release_pair_handle(pair);
  591. return ESP_OK;
  592. }
  593. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel)
  594. {
  595. gdma_pair_t *pair = dma_channel->pair;
  596. gdma_group_t *group = pair->group;
  597. int pair_id = pair->pair_id;
  598. int group_id = group->group_id;
  599. gdma_rx_channel_t *rx_chan = __containerof(dma_channel, gdma_rx_channel_t, base);
  600. portENTER_CRITICAL(&pair->spinlock);
  601. pair->rx_chan = NULL;
  602. pair->occupy_code &= ~SEARCH_REQUEST_RX_CHANNEL;
  603. portEXIT_CRITICAL(&pair->spinlock);
  604. if (dma_channel->intr) {
  605. esp_intr_free(dma_channel->intr);
  606. portENTER_CRITICAL(&pair->spinlock);
  607. gdma_ll_rx_enable_interrupt(group->hal.dev, pair_id, UINT32_MAX, false); // disable all interupt events
  608. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair_id, UINT32_MAX); // clear all pending events
  609. portEXIT_CRITICAL(&pair->spinlock);
  610. ESP_LOGD(TAG, "uninstall interrupt service for rx channel (%d,%d)", group_id, pair_id);
  611. }
  612. free(rx_chan);
  613. ESP_LOGD(TAG, "del rx channel (%d,%d)", group_id, pair_id);
  614. gdma_release_pair_handle(pair);
  615. return ESP_OK;
  616. }
  617. static void IRAM_ATTR gdma_default_rx_isr(void *args)
  618. {
  619. gdma_rx_channel_t *rx_chan = (gdma_rx_channel_t *)args;
  620. gdma_pair_t *pair = rx_chan->base.pair;
  621. gdma_group_t *group = pair->group;
  622. bool need_yield = false;
  623. // clear pending interrupt event
  624. uint32_t intr_status = gdma_ll_rx_get_interrupt_status(group->hal.dev, pair->pair_id);
  625. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  626. if (intr_status & GDMA_LL_EVENT_RX_SUC_EOF) {
  627. if (rx_chan && rx_chan->on_recv_eof) {
  628. uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id);
  629. gdma_event_data_t edata = {
  630. .rx_eof_desc_addr = eof_addr
  631. };
  632. if (rx_chan->on_recv_eof(&rx_chan->base, &edata, rx_chan->user_data)) {
  633. need_yield = true;
  634. }
  635. }
  636. }
  637. if (need_yield) {
  638. portYIELD_FROM_ISR();
  639. }
  640. }
  641. static void IRAM_ATTR gdma_default_tx_isr(void *args)
  642. {
  643. gdma_tx_channel_t *tx_chan = (gdma_tx_channel_t *)args;
  644. gdma_pair_t *pair = tx_chan->base.pair;
  645. gdma_group_t *group = pair->group;
  646. bool need_yield = false;
  647. // clear pending interrupt event
  648. uint32_t intr_status = gdma_ll_tx_get_interrupt_status(group->hal.dev, pair->pair_id);
  649. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  650. if (intr_status & GDMA_LL_EVENT_TX_EOF) {
  651. if (tx_chan && tx_chan->on_trans_eof) {
  652. uint32_t eof_addr = gdma_ll_tx_get_eof_desc_addr(group->hal.dev, pair->pair_id);
  653. gdma_event_data_t edata = {
  654. .tx_eof_desc_addr = eof_addr
  655. };
  656. if (tx_chan->on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data)) {
  657. need_yield = true;
  658. }
  659. }
  660. }
  661. if (need_yield) {
  662. portYIELD_FROM_ISR();
  663. }
  664. }
  665. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan)
  666. {
  667. esp_err_t ret = ESP_OK;
  668. gdma_pair_t *pair = rx_chan->base.pair;
  669. gdma_group_t *group = pair->group;
  670. // pre-alloc a interrupt handle, with handler disabled
  671. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  672. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  673. isr_flags |= ESP_INTR_FLAG_SHARED;
  674. #endif
  675. intr_handle_t intr = NULL;
  676. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].rx_irq_id, isr_flags,
  677. (uint32_t)gdma_ll_rx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_RX_EVENT_MASK,
  678. gdma_default_rx_isr, rx_chan, &intr);
  679. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  680. rx_chan->base.intr = intr;
  681. portENTER_CRITICAL(&pair->spinlock);
  682. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  683. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  684. portEXIT_CRITICAL(&pair->spinlock);
  685. ESP_LOGD(TAG, "install interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  686. err:
  687. return ret;
  688. }
  689. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan)
  690. {
  691. esp_err_t ret = ESP_OK;
  692. gdma_pair_t *pair = tx_chan->base.pair;
  693. gdma_group_t *group = pair->group;
  694. // pre-alloc a interrupt handle, with handler disabled
  695. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  696. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  697. isr_flags |= ESP_INTR_FLAG_SHARED;
  698. #endif
  699. intr_handle_t intr = NULL;
  700. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].tx_irq_id, isr_flags,
  701. (uint32_t)gdma_ll_tx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_TX_EVENT_MASK,
  702. gdma_default_tx_isr, tx_chan, &intr);
  703. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  704. tx_chan->base.intr = intr;
  705. portENTER_CRITICAL(&pair->spinlock);
  706. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  707. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  708. portEXIT_CRITICAL(&pair->spinlock);
  709. ESP_LOGD(TAG, "install interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  710. err:
  711. return ret;
  712. }