idf_performance_target.h 6.1 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #pragma once
  7. // AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
  8. #define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 8.2
  9. // SHA256 hardware throughput at 240MHz, threshold set lower than worst case
  10. #define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC 8.0
  11. // esp_sha() time to process 32KB of input data from RAM
  12. #define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB 5000
  13. #define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB 4500
  14. #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 19000
  15. #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 190000
  16. #define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 33000
  17. #define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 360000
  18. #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
  19. #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 870000
  20. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 15
  21. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 15
  22. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 30
  23. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 27
  24. /*
  25. * Flash Performance value
  26. * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
  27. * These thresholds are set to about 70% of the average test data, under certain condition.
  28. * Contact Espressif for details.
  29. */
  30. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
  31. //The single_core config is much faster than other configs. Use the value of other configs
  32. //Collect data and correct it later
  33. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B 0
  34. #endif
  35. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
  36. //The single_core config is much faster than other configs. Use the value of other configs
  37. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B 35300
  38. #endif
  39. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
  40. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB (697*1000)
  41. #endif
  42. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
  43. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB (6780*1000)
  44. #endif
  45. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
  46. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  47. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE 11200
  48. #endif
  49. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
  50. //The single_core config is much faster than other configs. Use the value of other configs
  51. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 20100
  52. #endif
  53. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
  54. //The single_core config is much faster than other configs. Use the value of other configs
  55. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 35200
  56. #endif
  57. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
  58. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB (754*1000)
  59. #endif
  60. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
  61. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB (6650*1000)
  62. #endif
  63. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
  64. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  65. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE 45300
  66. #endif
  67. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
  68. //The single_core config is much faster than other configs. Use the value of other configs
  69. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B 16200
  70. #endif
  71. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
  72. //The single_core config is much faster than other configs. Use the value of other configs
  73. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B 33600
  74. #endif
  75. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
  76. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB (484*1000)
  77. #endif
  78. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
  79. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB (1512*1000)
  80. #endif
  81. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
  82. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  83. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE 49600
  84. #endif
  85. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
  86. //Collect data and correct it later
  87. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 0
  88. #endif
  89. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
  90. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (261*1000)
  91. #endif
  92. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
  93. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB (470*1000)
  94. #endif
  95. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
  96. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB (261*1000)
  97. #endif
  98. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
  99. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  100. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE 30900
  101. #endif
  102. // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
  103. #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
  104. #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140