bt.c 55 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "sdkconfig.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/task.h"
  15. #include "freertos/queue.h"
  16. #include "freertos/semphr.h"
  17. #include "freertos/portmacro.h"
  18. #include "esp_types.h"
  19. #include "esp_mac.h"
  20. #include "esp_random.h"
  21. #include "esp_task.h"
  22. #include "esp_attr.h"
  23. #include "esp_phy_init.h"
  24. #include "esp_bt.h"
  25. #include "esp_err.h"
  26. #include "esp_log.h"
  27. #include "esp_pm.h"
  28. #include "esp_ipc.h"
  29. #include "esp_private/periph_ctrl.h"
  30. #include "esp_private/esp_clk.h"
  31. #include "soc/soc_caps.h"
  32. #include "soc/rtc.h"
  33. #include "soc/rtc_cntl_reg.h"
  34. #include "soc/soc_memory_layout.h"
  35. #include "private/esp_coexist_internal.h"
  36. #include "esp_timer.h"
  37. #include "esp_sleep.h"
  38. #include "esp_rom_sys.h"
  39. #include "esp_private/phy.h"
  40. #if CONFIG_IDF_TARGET_ESP32C3
  41. #include "riscv/interrupt.h"
  42. #include "esp32c3/rom/rom_layout.h"
  43. #else //CONFIG_IDF_TARGET_ESP32S3
  44. #include "freertos/xtensa_api.h"
  45. #include "xtensa/core-macros.h"
  46. #include "esp32s3/rom/rom_layout.h"
  47. #endif
  48. #if CONFIG_BT_ENABLED
  49. /* Macro definition
  50. ************************************************************************
  51. */
  52. #define BT_LOG_TAG "BLE_INIT"
  53. #define BTDM_INIT_PERIOD (5000) /* ms */
  54. /* Low Power Clock Selection */
  55. #define BTDM_LPCLK_SEL_XTAL (0)
  56. #define BTDM_LPCLK_SEL_XTAL32K (1)
  57. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  58. #define BTDM_LPCLK_SEL_8M (3)
  59. // wakeup request sources
  60. enum {
  61. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  62. BTDM_ASYNC_WAKEUP_SRC_DISA,
  63. BTDM_ASYNC_WAKEUP_SRC_TMR,
  64. BTDM_ASYNC_WAKEUP_SRC_MAX,
  65. };
  66. // low power control struct
  67. typedef union {
  68. struct {
  69. uint32_t enable : 1; // whether low power mode is required
  70. uint32_t lpclk_sel : 2; // low power clock source
  71. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  72. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  73. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  74. uint32_t main_xtal_pu : 1; // power up main XTAL
  75. uint32_t reserved : 25; // reserved
  76. };
  77. uint32_t val;
  78. } btdm_lpcntl_t;
  79. // low power control status
  80. typedef union {
  81. struct {
  82. uint32_t pm_lock_released : 1; // whether power management lock is released
  83. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  84. uint32_t phy_enabled : 1; // whether phy is switched on
  85. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  86. uint32_t reserved : 28; // reserved
  87. };
  88. uint32_t val;
  89. } btdm_lpstat_t;
  90. /* Sleep and wakeup interval control */
  91. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  92. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  93. #define BT_DEBUG(...)
  94. #define BT_API_CALL_CHECK(info, api_call, ret) \
  95. do{\
  96. esp_err_t __err = (api_call);\
  97. if ((ret) != __err) {\
  98. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  99. return __err;\
  100. }\
  101. } while(0)
  102. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  103. #define OSI_VERSION 0x00010007
  104. #define OSI_MAGIC_VALUE 0xFADEBEAD
  105. /* Types definition
  106. ************************************************************************
  107. */
  108. /* vendor dependent signals to be posted to controller task */
  109. typedef enum {
  110. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  111. BTDM_VND_OL_SIG_NUM,
  112. } btdm_vnd_ol_sig_t;
  113. /* prototype of function to handle vendor dependent signals */
  114. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  115. /* VHCI function interface */
  116. typedef struct vhci_host_callback {
  117. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  118. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  119. } vhci_host_callback_t;
  120. typedef struct {
  121. void *handle;
  122. } btdm_queue_item_t;
  123. typedef void (* osi_intr_handler)(void);
  124. /* OSI function */
  125. struct osi_funcs_t {
  126. uint32_t _magic;
  127. uint32_t _version;
  128. void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
  129. void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
  130. void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
  131. void (*_interrupt_disable)(void);
  132. void (*_interrupt_restore)(void);
  133. void (*_task_yield)(void);
  134. void (*_task_yield_from_isr)(void);
  135. void *(*_semphr_create)(uint32_t max, uint32_t init);
  136. void (*_semphr_delete)(void *semphr);
  137. int (*_semphr_take_from_isr)(void *semphr, void *hptw);
  138. int (*_semphr_give_from_isr)(void *semphr, void *hptw);
  139. int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  140. int (*_semphr_give)(void *semphr);
  141. void *(*_mutex_create)(void);
  142. void (*_mutex_delete)(void *mutex);
  143. int (*_mutex_lock)(void *mutex);
  144. int (*_mutex_unlock)(void *mutex);
  145. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  146. void (* _queue_delete)(void *queue);
  147. int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  148. int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  149. int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  150. int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  151. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  152. void (* _task_delete)(void *task_handle);
  153. bool (* _is_in_isr)(void);
  154. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  155. void *(* _malloc)(size_t size);
  156. void *(* _malloc_internal)(size_t size);
  157. void (* _free)(void *p);
  158. int (* _read_efuse_mac)(uint8_t mac[6]);
  159. void (* _srand)(unsigned int seed);
  160. int (* _rand)(void);
  161. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  162. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  163. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  164. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  165. void (* _btdm_sleep_enter_phase2)(void);
  166. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  167. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  168. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  169. void (* _coex_wifi_sleep_set)(bool sleep);
  170. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  171. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  172. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  173. void (* _interrupt_on)(int intr_num);
  174. void (* _interrupt_off)(int intr_num);
  175. void (* _esp_hw_power_down)(void);
  176. void (* _esp_hw_power_up)(void);
  177. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  178. void (* _ets_delay_us)(uint32_t us);
  179. void (* _btdm_rom_table_ready)(void);
  180. };
  181. /* External functions or values
  182. ************************************************************************
  183. */
  184. /* not for user call, so don't put to include file */
  185. /* OSI */
  186. extern int btdm_osi_funcs_register(void *osi_funcs);
  187. /* Initialise and De-initialise */
  188. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  189. extern void btdm_controller_deinit(void);
  190. extern int btdm_controller_enable(esp_bt_mode_t mode);
  191. extern void btdm_controller_disable(void);
  192. extern uint8_t btdm_controller_get_mode(void);
  193. extern const char *btdm_controller_get_compile_version(void);
  194. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  195. /* Sleep */
  196. extern void btdm_controller_enable_sleep(bool enable);
  197. extern uint8_t btdm_controller_get_sleep_mode(void);
  198. extern bool btdm_power_state_active(void);
  199. extern void btdm_wakeup_request(void);
  200. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  201. /* vendor dependent tasks to be posted and handled by controller task*/
  202. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  203. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  204. extern int r_btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  205. extern int r_btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  206. /* Low Power Clock */
  207. extern bool btdm_lpclk_select_src(uint32_t sel);
  208. extern bool btdm_lpclk_set_div(uint32_t div);
  209. extern int btdm_hci_tl_io_event_post(int event);
  210. /* VHCI */
  211. extern bool API_vhci_host_check_send_available(void);
  212. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  213. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  214. /* TX power */
  215. extern int ble_txpwr_set(int power_type, int power_level);
  216. extern int ble_txpwr_get(int power_type);
  217. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  218. extern void coex_pti_v2(void);
  219. extern bool btdm_deep_sleep_mem_init(void);
  220. extern void btdm_deep_sleep_mem_deinit(void);
  221. extern void btdm_ble_power_down_dma_copy(bool copy);
  222. extern uint8_t btdm_sleep_clock_sync(void);
  223. extern void sdk_config_extend_set_pll_track(bool enable);
  224. #if CONFIG_MAC_BB_PD
  225. extern void esp_mac_bb_power_down(void);
  226. extern void esp_mac_bb_power_up(void);
  227. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  228. #endif
  229. extern void btdm_cca_feature_enable(void);
  230. extern uint32_t _bt_bss_start;
  231. extern uint32_t _bt_bss_end;
  232. extern uint32_t _btdm_bss_start;
  233. extern uint32_t _btdm_bss_end;
  234. extern uint32_t _nimble_bss_start;
  235. extern uint32_t _nimble_bss_end;
  236. extern uint32_t _bt_data_start;
  237. extern uint32_t _bt_data_end;
  238. extern uint32_t _btdm_data_start;
  239. extern uint32_t _btdm_data_end;
  240. extern uint32_t _nimble_data_start;
  241. extern uint32_t _nimble_data_end;
  242. /* Local Function Declare
  243. *********************************************************************
  244. */
  245. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
  246. static void interrupt_clear_wrapper(int intr_source, int intr_num);
  247. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
  248. static void interrupt_disable(void);
  249. static void interrupt_restore(void);
  250. static void task_yield_from_isr(void);
  251. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  252. static void semphr_delete_wrapper(void *semphr);
  253. static int semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  254. static int semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  255. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  256. static int semphr_give_wrapper(void *semphr);
  257. static void *mutex_create_wrapper(void);
  258. static void mutex_delete_wrapper(void *mutex);
  259. static int mutex_lock_wrapper(void *mutex);
  260. static int mutex_unlock_wrapper(void *mutex);
  261. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  262. static void queue_delete_wrapper(void *queue);
  263. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  264. static int queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  265. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  266. static int queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  267. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  268. static void task_delete_wrapper(void *task_handle);
  269. static bool is_in_isr_wrapper(void);
  270. static void *malloc_internal_wrapper(size_t size);
  271. static int read_mac_wrapper(uint8_t mac[6]);
  272. static void srand_wrapper(unsigned int seed);
  273. static int rand_wrapper(void);
  274. static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  275. static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
  276. static bool btdm_sleep_check_duration(int32_t *slot_cnt);
  277. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  278. static void btdm_sleep_enter_phase2_wrapper(void);
  279. static void btdm_sleep_exit_phase3_wrapper(void);
  280. static void coex_wifi_sleep_set_hook(bool sleep);
  281. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  282. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  283. static void interrupt_on_wrapper(int intr_num);
  284. static void interrupt_off_wrapper(int intr_num);
  285. static void btdm_hw_mac_power_up_wrapper(void);
  286. static void btdm_hw_mac_power_down_wrapper(void);
  287. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  288. static void btdm_funcs_table_ready_wrapper(void);
  289. static void btdm_slp_tmr_callback(void *arg);
  290. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end);
  291. static void bt_controller_deinit_internal(void);
  292. /* Local variable definition
  293. ***************************************************************************
  294. */
  295. /* OSI funcs */
  296. static const struct osi_funcs_t osi_funcs_ro = {
  297. ._magic = OSI_MAGIC_VALUE,
  298. ._version = OSI_VERSION,
  299. ._interrupt_set = interrupt_set_wrapper,
  300. ._interrupt_clear = interrupt_clear_wrapper,
  301. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  302. ._interrupt_disable = interrupt_disable,
  303. ._interrupt_restore = interrupt_restore,
  304. ._task_yield = vPortYield,
  305. ._task_yield_from_isr = task_yield_from_isr,
  306. ._semphr_create = semphr_create_wrapper,
  307. ._semphr_delete = semphr_delete_wrapper,
  308. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  309. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  310. ._semphr_take = semphr_take_wrapper,
  311. ._semphr_give = semphr_give_wrapper,
  312. ._mutex_create = mutex_create_wrapper,
  313. ._mutex_delete = mutex_delete_wrapper,
  314. ._mutex_lock = mutex_lock_wrapper,
  315. ._mutex_unlock = mutex_unlock_wrapper,
  316. ._queue_create = queue_create_wrapper,
  317. ._queue_delete = queue_delete_wrapper,
  318. ._queue_send = queue_send_wrapper,
  319. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  320. ._queue_recv = queue_recv_wrapper,
  321. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  322. ._task_create = task_create_wrapper,
  323. ._task_delete = task_delete_wrapper,
  324. ._is_in_isr = is_in_isr_wrapper,
  325. ._cause_sw_intr_to_core = NULL,
  326. ._malloc = malloc,
  327. ._malloc_internal = malloc_internal_wrapper,
  328. ._free = free,
  329. ._read_efuse_mac = read_mac_wrapper,
  330. ._srand = srand_wrapper,
  331. ._rand = rand_wrapper,
  332. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  333. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  334. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  335. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  336. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  337. ._btdm_sleep_exit_phase1 = NULL,
  338. ._btdm_sleep_exit_phase2 = NULL,
  339. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  340. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  341. ._coex_core_ble_conn_dyn_prio_get = NULL,
  342. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  343. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  344. ._interrupt_on = interrupt_on_wrapper,
  345. ._interrupt_off = interrupt_off_wrapper,
  346. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  347. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  348. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  349. ._ets_delay_us = esp_rom_delay_us,
  350. ._btdm_rom_table_ready = btdm_funcs_table_ready_wrapper,
  351. };
  352. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  353. /* Static variable declare */
  354. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  355. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  356. // low power control struct
  357. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  358. // low power status struct
  359. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  360. // measured average low power clock period in micro seconds
  361. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  362. // number of fractional bit for btdm_lpcycle_us
  363. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  364. // semaphore used for blocking VHCI API to wait for controller to wake up
  365. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  366. // wakeup timer
  367. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  368. #ifdef CONFIG_PM_ENABLE
  369. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  370. // pm_lock to prevent light sleep due to incompatibility currently
  371. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  372. #endif
  373. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  374. {
  375. #if CONFIG_MAC_BB_PD
  376. #if SOC_PM_SUPPORT_BT_PD
  377. // Bluetooth module power down
  378. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  379. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  380. #endif
  381. esp_mac_bb_power_down();
  382. #endif
  383. }
  384. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  385. {
  386. #if CONFIG_MAC_BB_PD
  387. #if SOC_PM_SUPPORT_BT_PD
  388. // Bluetooth module power up
  389. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  390. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  391. #endif
  392. esp_mac_bb_power_up();
  393. #endif
  394. }
  395. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  396. {
  397. #if CONFIG_MAC_BB_PD
  398. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  399. #endif
  400. }
  401. static inline void esp_bt_power_domain_on(void)
  402. {
  403. // Bluetooth module power up
  404. #if SOC_PM_SUPPORT_BT_PD
  405. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  406. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  407. #endif
  408. esp_wifi_bt_power_domain_on();
  409. }
  410. static inline void esp_bt_power_domain_off(void)
  411. {
  412. // Bluetooth module power down
  413. #if SOC_PM_SUPPORT_BT_PD
  414. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  415. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  416. #endif
  417. esp_wifi_bt_power_domain_off();
  418. }
  419. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
  420. {
  421. esp_rom_route_intr_matrix(cpu_no, intr_source, intr_num);
  422. #if __riscv
  423. esprv_intc_int_set_priority(intr_num, intr_prio);
  424. //esprv_intc_int_enable_level(1 << intr_num);
  425. esprv_intc_int_set_type(intr_num, 0);
  426. #endif
  427. }
  428. static void interrupt_clear_wrapper(int intr_source, int intr_num)
  429. {
  430. }
  431. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
  432. {
  433. esp_cpu_intr_set_handler(n, fn, arg);
  434. }
  435. static void interrupt_on_wrapper(int intr_num)
  436. {
  437. esp_cpu_intr_enable(1 << intr_num);
  438. }
  439. static void interrupt_off_wrapper(int intr_num)
  440. {
  441. esp_cpu_intr_disable(1<<intr_num);
  442. }
  443. static void IRAM_ATTR interrupt_disable(void)
  444. {
  445. if (xPortInIsrContext()) {
  446. portENTER_CRITICAL_ISR(&global_int_mux);
  447. } else {
  448. portENTER_CRITICAL(&global_int_mux);
  449. }
  450. }
  451. static void IRAM_ATTR interrupt_restore(void)
  452. {
  453. if (xPortInIsrContext()) {
  454. portEXIT_CRITICAL_ISR(&global_int_mux);
  455. } else {
  456. portEXIT_CRITICAL(&global_int_mux);
  457. }
  458. }
  459. static void IRAM_ATTR task_yield_from_isr(void)
  460. {
  461. portYIELD_FROM_ISR();
  462. }
  463. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  464. {
  465. btdm_queue_item_t *semphr = heap_caps_calloc(1, sizeof(btdm_queue_item_t), MALLOC_CAP_8BIT|MALLOC_CAP_INTERNAL);
  466. assert(semphr);
  467. /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
  468. semphr->handle = (void *)xSemaphoreCreateCounting(max, init);
  469. assert(semphr->handle);
  470. return semphr;
  471. }
  472. static void semphr_delete_wrapper(void *semphr)
  473. {
  474. if (semphr == NULL) {
  475. return;
  476. }
  477. btdm_queue_item_t *semphr_item = (btdm_queue_item_t *)semphr;
  478. if (semphr_item->handle) {
  479. vSemaphoreDelete(semphr_item->handle);
  480. }
  481. free(semphr);
  482. }
  483. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  484. {
  485. return (int)xSemaphoreTakeFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
  486. }
  487. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  488. {
  489. return (int)xSemaphoreGiveFromISR(((btdm_queue_item_t *)semphr)->handle, hptw);
  490. }
  491. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  492. {
  493. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  494. return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, portMAX_DELAY);
  495. } else {
  496. return (int)xSemaphoreTake(((btdm_queue_item_t *)semphr)->handle, block_time_ms / portTICK_PERIOD_MS);
  497. }
  498. }
  499. static int semphr_give_wrapper(void *semphr)
  500. {
  501. return (int)xSemaphoreGive(((btdm_queue_item_t *)semphr)->handle);
  502. }
  503. static void *mutex_create_wrapper(void)
  504. {
  505. return (void *)xSemaphoreCreateMutex();
  506. }
  507. static void mutex_delete_wrapper(void *mutex)
  508. {
  509. vSemaphoreDelete(mutex);
  510. }
  511. static int mutex_lock_wrapper(void *mutex)
  512. {
  513. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  514. }
  515. static int mutex_unlock_wrapper(void *mutex)
  516. {
  517. return (int)xSemaphoreGive(mutex);
  518. }
  519. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  520. {
  521. btdm_queue_item_t *queue = NULL;
  522. queue = (btdm_queue_item_t*)heap_caps_malloc(sizeof(btdm_queue_item_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  523. assert(queue);
  524. /* IDF FreeRTOS guarantees that all dynamic memory allocation goes to internal RAM. */
  525. queue->handle = xQueueCreate( queue_len, item_size);
  526. assert(queue->handle);
  527. return queue;
  528. }
  529. static void queue_delete_wrapper(void *queue)
  530. {
  531. btdm_queue_item_t *queue_item = (btdm_queue_item_t *)queue;
  532. if (queue_item) {
  533. if(queue_item->handle){
  534. vQueueDelete(queue_item->handle);
  535. }
  536. free(queue_item);
  537. }
  538. }
  539. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  540. {
  541. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  542. return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
  543. } else {
  544. return (int)xQueueSend(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
  545. }
  546. }
  547. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  548. {
  549. return (int)xQueueSendFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
  550. }
  551. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  552. {
  553. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  554. return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, portMAX_DELAY);
  555. } else {
  556. return (int)xQueueReceive(((btdm_queue_item_t*)queue)->handle, item, block_time_ms / portTICK_PERIOD_MS);
  557. }
  558. }
  559. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  560. {
  561. return (int)xQueueReceiveFromISR(((btdm_queue_item_t*)queue)->handle, item, hptw);
  562. }
  563. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  564. {
  565. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  566. }
  567. static void task_delete_wrapper(void *task_handle)
  568. {
  569. vTaskDelete(task_handle);
  570. }
  571. static bool IRAM_ATTR is_in_isr_wrapper(void)
  572. {
  573. return (bool)xPortInIsrContext();
  574. }
  575. static void *malloc_internal_wrapper(size_t size)
  576. {
  577. void *p = heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  578. if(p == NULL) {
  579. ESP_LOGE(BT_LOG_TAG, "Malloc failed");
  580. }
  581. return p;
  582. }
  583. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  584. {
  585. int ret = esp_read_mac(mac, ESP_MAC_BT);
  586. ESP_LOGI(BT_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x",
  587. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  588. return ret;
  589. }
  590. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  591. {
  592. /* empty function */
  593. }
  594. static int IRAM_ATTR rand_wrapper(void)
  595. {
  596. return (int)esp_random();
  597. }
  598. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  599. {
  600. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  601. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  602. local_error_corr += res;
  603. res = (local_error_corr >> btdm_lpcycle_us_frac);
  604. local_error_corr -= (res << btdm_lpcycle_us_frac);
  605. if (error_corr) {
  606. *error_corr = (uint32_t) local_error_corr;
  607. }
  608. return (uint32_t)res;
  609. }
  610. /*
  611. * @brief Converts a duration in half us into a number of low power clock cycles.
  612. */
  613. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  614. {
  615. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  616. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  617. // clock measurement is conducted
  618. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  619. cycles >>= 1;
  620. return (uint32_t)cycles;
  621. }
  622. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  623. {
  624. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  625. return false;
  626. }
  627. /* wake up in advance considering the delay in enabling PHY/RF */
  628. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  629. return true;
  630. }
  631. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  632. {
  633. if (s_lp_cntl.wakeup_timer_required == 0) {
  634. return;
  635. }
  636. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  637. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  638. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  639. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  640. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  641. // and set the timer in advance
  642. uint32_t uncertainty = (us_to_sleep >> 11);
  643. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  644. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  645. }
  646. assert (s_lp_stat.wakeup_timer_started == 0);
  647. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  648. s_lp_stat.wakeup_timer_started = 1;
  649. } else {
  650. ESP_LOGE(BT_LOG_TAG, "timer start failed");
  651. assert(0);
  652. }
  653. }
  654. static void btdm_sleep_enter_phase2_wrapper(void)
  655. {
  656. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  657. if (s_lp_stat.phy_enabled) {
  658. esp_phy_disable(PHY_MODEM_BT);
  659. s_lp_stat.phy_enabled = 0;
  660. } else {
  661. assert(0);
  662. }
  663. if (s_lp_stat.pm_lock_released == 0) {
  664. #ifdef CONFIG_PM_ENABLE
  665. esp_pm_lock_release(s_pm_lock);
  666. #endif
  667. s_lp_stat.pm_lock_released = 1;
  668. }
  669. }
  670. }
  671. static void btdm_sleep_exit_phase3_wrapper(void)
  672. {
  673. #ifdef CONFIG_PM_ENABLE
  674. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  675. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  676. // Do it again here to fix this issue.
  677. if (s_lp_stat.pm_lock_released) {
  678. esp_pm_lock_acquire(s_pm_lock);
  679. s_lp_stat.pm_lock_released = 0;
  680. }
  681. #endif
  682. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  683. if (s_lp_stat.phy_enabled == 0) {
  684. esp_phy_enable(PHY_MODEM_BT);
  685. s_lp_stat.phy_enabled = 1;
  686. }
  687. }
  688. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  689. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  690. // Do it again here to fix this issue.
  691. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  692. esp_timer_stop(s_btdm_slp_tmr);
  693. s_lp_stat.wakeup_timer_started = 0;
  694. }
  695. // wait for the sleep state to change
  696. // the procedure duration is at micro-second level or less
  697. while (btdm_sleep_clock_sync()) {
  698. ;
  699. }
  700. }
  701. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  702. {
  703. assert(s_lp_cntl.enable == 1);
  704. #ifdef CONFIG_PM_ENABLE
  705. if (s_lp_stat.pm_lock_released) {
  706. esp_pm_lock_acquire(s_pm_lock);
  707. s_lp_stat.pm_lock_released = 0;
  708. }
  709. #endif
  710. int event = (int) param;
  711. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  712. btdm_wakeup_request();
  713. }
  714. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  715. esp_timer_stop(s_btdm_slp_tmr);
  716. s_lp_stat.wakeup_timer_started = 0;
  717. }
  718. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  719. semphr_give_wrapper(s_wakeup_req_sem);
  720. }
  721. }
  722. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  723. {
  724. #ifdef CONFIG_PM_ENABLE
  725. r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  726. #endif
  727. }
  728. static bool async_wakeup_request(int event)
  729. {
  730. if (s_lp_cntl.enable == 0) {
  731. return false;
  732. }
  733. bool do_wakeup_request = false;
  734. switch (event) {
  735. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  736. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  737. btdm_in_wakeup_requesting_set(true);
  738. if (!btdm_power_state_active()) {
  739. r_btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  740. do_wakeup_request = true;
  741. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  742. }
  743. break;
  744. default:
  745. break;
  746. }
  747. return do_wakeup_request;
  748. }
  749. static void async_wakeup_request_end(int event)
  750. {
  751. if (s_lp_cntl.enable == 0) {
  752. return;
  753. }
  754. bool allow_to_sleep;
  755. switch (event) {
  756. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  757. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  758. allow_to_sleep = true;
  759. break;
  760. default:
  761. allow_to_sleep = true;
  762. break;
  763. }
  764. if (allow_to_sleep) {
  765. btdm_in_wakeup_requesting_set(false);
  766. }
  767. return;
  768. }
  769. static void btdm_funcs_table_ready_wrapper(void)
  770. {
  771. #if BT_BLE_CCA_MODE == 2
  772. btdm_cca_feature_enable();
  773. #endif
  774. }
  775. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  776. {
  777. #if CONFIG_SW_COEXIST_ENABLE
  778. coex_schm_status_bit_set(type, status);
  779. #endif
  780. }
  781. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  782. {
  783. #if CONFIG_SW_COEXIST_ENABLE
  784. coex_schm_status_bit_clear(type, status);
  785. #endif
  786. }
  787. bool esp_vhci_host_check_send_available(void)
  788. {
  789. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  790. return false;
  791. }
  792. return API_vhci_host_check_send_available();
  793. }
  794. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  795. {
  796. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  797. return;
  798. }
  799. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  800. API_vhci_host_send_packet(data, len);
  801. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  802. }
  803. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  804. {
  805. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  806. return ESP_FAIL;
  807. }
  808. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  809. }
  810. static void btdm_controller_mem_init(void)
  811. {
  812. extern void btdm_controller_rom_data_init(void );
  813. btdm_controller_rom_data_init();
  814. }
  815. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  816. {
  817. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  818. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  819. return ESP_ERR_INVALID_STATE;
  820. }
  821. if (mode & ESP_BT_MODE_BLE) {
  822. /* if the addresses of rom btdm .data and .bss are consecutive,
  823. they are registered in the system heap as a piece of memory
  824. */
  825. if(ets_rom_layout_p->data_end_btdm == ets_rom_layout_p->bss_start_btdm) {
  826. mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
  827. mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
  828. if (mem_start != mem_end) {
  829. ESP_LOGD(BT_LOG_TAG, "Release rom btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  830. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  831. }
  832. } else {
  833. mem_start = (intptr_t)ets_rom_layout_p->bss_start_btdm;
  834. mem_end = (intptr_t)ets_rom_layout_p->bss_end_btdm;
  835. if (mem_start != mem_end) {
  836. ESP_LOGD(BT_LOG_TAG, "Release rom btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  837. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  838. }
  839. mem_start = (intptr_t)ets_rom_layout_p->data_start_btdm;
  840. mem_end = (intptr_t)ets_rom_layout_p->data_end_btdm;
  841. if (mem_start != mem_end) {
  842. ESP_LOGD(BT_LOG_TAG, "Release rom btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  843. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  844. }
  845. }
  846. /* if the addresses of rom interface btdm .data and .bss are consecutive,
  847. they are registered in the system heap as a piece of memory
  848. */
  849. if(ets_rom_layout_p->data_end_interface_btdm == ets_rom_layout_p->bss_start_interface_btdm) {
  850. mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
  851. mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
  852. if (mem_start != mem_end) {
  853. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  854. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  855. }
  856. } else {
  857. mem_start = (intptr_t)ets_rom_layout_p->data_start_interface_btdm;
  858. mem_end = (intptr_t)ets_rom_layout_p->data_end_interface_btdm;
  859. if (mem_start != mem_end) {
  860. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  861. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  862. }
  863. mem_start = (intptr_t)ets_rom_layout_p->bss_start_interface_btdm;
  864. mem_end = (intptr_t)ets_rom_layout_p->bss_end_interface_btdm;
  865. if (mem_start != mem_end) {
  866. ESP_LOGD(BT_LOG_TAG, "Release rom interface btdm BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  867. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  868. }
  869. }
  870. }
  871. return ESP_OK;
  872. }
  873. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  874. {
  875. int ret;
  876. intptr_t mem_start, mem_end;
  877. ret = esp_bt_controller_mem_release(mode);
  878. if (ret != ESP_OK) {
  879. return ret;
  880. }
  881. if (mode & ESP_BT_MODE_BLE) {
  882. /* if the addresses of btdm .bss and bt .bss are consecutive,
  883. they are registered in the system heap as a piece of memory
  884. */
  885. if(_bt_bss_end == _btdm_bss_start) {
  886. mem_start = (intptr_t)&_bt_bss_start;
  887. mem_end = (intptr_t)&_btdm_bss_end;
  888. if (mem_start != mem_end) {
  889. ESP_LOGD(BT_LOG_TAG, "Release BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  890. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  891. }
  892. } else {
  893. mem_start = (intptr_t)&_bt_bss_start;
  894. mem_end = (intptr_t)&_bt_bss_end;
  895. if (mem_start != mem_end) {
  896. ESP_LOGD(BT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  897. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  898. }
  899. mem_start = (intptr_t)&_btdm_bss_start;
  900. mem_end = (intptr_t)&_btdm_bss_end;
  901. if (mem_start != mem_end) {
  902. ESP_LOGD(BT_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  903. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  904. }
  905. }
  906. /* if the addresses of btdm .data and bt .data are consecutive,
  907. they are registered in the system heap as a piece of memory
  908. */
  909. if(_bt_data_end == _btdm_data_start) {
  910. mem_start = (intptr_t)&_bt_data_start;
  911. mem_end = (intptr_t)&_btdm_data_end;
  912. if (mem_start != mem_end) {
  913. ESP_LOGD(BT_LOG_TAG, "Release data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  914. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  915. }
  916. } else {
  917. mem_start = (intptr_t)&_bt_data_start;
  918. mem_end = (intptr_t)&_bt_data_end;
  919. if (mem_start != mem_end) {
  920. ESP_LOGD(BT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  921. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  922. }
  923. mem_start = (intptr_t)&_btdm_data_start;
  924. mem_end = (intptr_t)&_btdm_data_end;
  925. if (mem_start != mem_end) {
  926. ESP_LOGD(BT_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  927. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  928. }
  929. }
  930. mem_start = (intptr_t)&_nimble_bss_start;
  931. mem_end = (intptr_t)&_nimble_bss_end;
  932. if (mem_start != mem_end) {
  933. ESP_LOGD(BT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  934. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  935. }
  936. mem_start = (intptr_t)&_nimble_data_start;
  937. mem_end = (intptr_t)&_nimble_data_end;
  938. if (mem_start != mem_end) {
  939. ESP_LOGD(BT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x], len %d", mem_start, mem_end, mem_end - mem_start);
  940. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  941. }
  942. }
  943. return ESP_OK;
  944. }
  945. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  946. {
  947. int ret = heap_caps_add_region(start, end);
  948. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  949. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  950. * we replace it by ESP_OK
  951. */
  952. if (ret == ESP_ERR_INVALID_SIZE) {
  953. return ESP_OK;
  954. }
  955. return ret;
  956. }
  957. #if CONFIG_MAC_BB_PD
  958. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  959. {
  960. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  961. btdm_ble_power_down_dma_copy(true);
  962. s_lp_stat.mac_bb_pd = 1;
  963. }
  964. }
  965. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  966. {
  967. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  968. btdm_ble_power_down_dma_copy(false);
  969. s_lp_stat.mac_bb_pd = 0;
  970. }
  971. }
  972. #endif
  973. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  974. {
  975. esp_err_t err = ESP_FAIL;
  976. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  977. return ESP_ERR_INVALID_STATE;
  978. }
  979. if (cfg == NULL) {
  980. return ESP_ERR_INVALID_ARG;
  981. }
  982. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  983. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  984. ESP_LOGE(BT_LOG_TAG, "Invalid controller task prioriy or stack size");
  985. return ESP_ERR_INVALID_ARG;
  986. }
  987. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  988. ESP_LOGE(BT_LOG_TAG, "%s controller only support BLE only mode", __func__);
  989. return ESP_ERR_NOT_SUPPORTED;
  990. }
  991. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  992. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  993. ESP_LOGE(BT_LOG_TAG, "Invalid value of ble_max_act");
  994. return ESP_ERR_INVALID_ARG;
  995. }
  996. }
  997. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  998. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  999. ESP_LOGE(BT_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  1000. return ESP_ERR_INVALID_ARG;
  1001. }
  1002. }
  1003. // overwrite some parameters
  1004. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  1005. #if CONFIG_MAC_BB_PD
  1006. esp_mac_bb_pd_mem_init();
  1007. #endif
  1008. esp_phy_modem_init();
  1009. esp_bt_power_domain_on();
  1010. btdm_controller_mem_init();
  1011. #if CONFIG_MAC_BB_PD
  1012. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  1013. err = ESP_ERR_INVALID_ARG;
  1014. goto error;
  1015. }
  1016. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  1017. err = ESP_ERR_INVALID_ARG;
  1018. goto error;
  1019. }
  1020. #endif
  1021. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1022. if (osi_funcs_p == NULL) {
  1023. return ESP_ERR_NO_MEM;
  1024. }
  1025. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1026. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1027. return ESP_ERR_INVALID_ARG;
  1028. }
  1029. ESP_LOGI(BT_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1030. // init low-power control resources
  1031. do {
  1032. // set default values for global states or resources
  1033. s_lp_stat.val = 0;
  1034. s_lp_cntl.val = 0;
  1035. s_lp_cntl.main_xtal_pu = 0;
  1036. s_wakeup_req_sem = NULL;
  1037. s_btdm_slp_tmr = NULL;
  1038. // configure and initialize resources
  1039. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  1040. s_lp_cntl.no_light_sleep = 0;
  1041. if (s_lp_cntl.enable) {
  1042. #if CONFIG_MAC_BB_PD
  1043. if (!btdm_deep_sleep_mem_init()) {
  1044. err = ESP_ERR_NO_MEM;
  1045. goto error;
  1046. }
  1047. s_lp_cntl.mac_bb_pd = 1;
  1048. #endif
  1049. #ifdef CONFIG_PM_ENABLE
  1050. s_lp_cntl.wakeup_timer_required = 1;
  1051. #endif
  1052. // async wakeup semaphore for VHCI
  1053. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1054. if (s_wakeup_req_sem == NULL) {
  1055. err = ESP_ERR_NO_MEM;
  1056. goto error;
  1057. }
  1058. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  1059. }
  1060. if (s_lp_cntl.wakeup_timer_required) {
  1061. esp_timer_create_args_t create_args = {
  1062. .callback = btdm_slp_tmr_callback,
  1063. .arg = NULL,
  1064. .name = "btSlp",
  1065. };
  1066. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1067. goto error;
  1068. }
  1069. }
  1070. // set default bluetooth sleep clock cycle and its fractional bits
  1071. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1072. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1073. // set default bluetooth sleep clock source
  1074. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1075. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  1076. // check whether or not EXT_CRYS is working
  1077. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
  1078. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
  1079. } else {
  1080. ESP_LOGW(BT_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock");
  1081. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1082. s_lp_cntl.no_light_sleep = 1;
  1083. #endif
  1084. }
  1085. #elif (CONFIG_BT_CTRL_LPCLK_SEL_MAIN_XTAL)
  1086. ESP_LOGI(BT_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
  1087. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1088. s_lp_cntl.no_light_sleep = 1;
  1089. #endif
  1090. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  1091. // check whether or not internal 150 kHz RC oscillator is working
  1092. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
  1093. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
  1094. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
  1095. "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
  1096. } else {
  1097. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
  1098. assert(0);
  1099. }
  1100. #endif
  1101. bool select_src_ret __attribute__((unused));
  1102. bool set_div_ret __attribute__((unused));
  1103. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1104. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1105. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
  1106. s_lp_cntl.main_xtal_pu = 1;
  1107. #endif
  1108. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1109. set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() / MHZ);
  1110. assert(select_src_ret && set_div_ret);
  1111. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1112. btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
  1113. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  1114. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1115. set_div_ret = btdm_lpclk_set_div(0);
  1116. assert(select_src_ret && set_div_ret);
  1117. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1118. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1119. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1120. assert(btdm_lpcycle_us != 0);
  1121. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  1122. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1123. set_div_ret = btdm_lpclk_set_div(0);
  1124. assert(select_src_ret && set_div_ret);
  1125. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1126. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  1127. } else {
  1128. err = ESP_ERR_INVALID_ARG;
  1129. goto error;
  1130. }
  1131. #if CONFIG_SW_COEXIST_ENABLE
  1132. coex_update_lpclk_interval();
  1133. #endif
  1134. #ifdef CONFIG_PM_ENABLE
  1135. if (s_lp_cntl.no_light_sleep) {
  1136. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1137. err = ESP_ERR_NO_MEM;
  1138. goto error;
  1139. }
  1140. ESP_LOGW(BT_LOG_TAG, "light sleep mode will not be able to apply when bluetooth is enabled.");
  1141. }
  1142. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1143. err = ESP_ERR_NO_MEM;
  1144. goto error;
  1145. } else {
  1146. s_lp_stat.pm_lock_released = 1;
  1147. }
  1148. #endif
  1149. } while (0);
  1150. #if CONFIG_SW_COEXIST_ENABLE
  1151. coex_init();
  1152. #endif
  1153. periph_module_enable(PERIPH_BT_MODULE);
  1154. periph_module_reset(PERIPH_BT_MODULE);
  1155. if (btdm_controller_init(cfg) != 0) {
  1156. err = ESP_ERR_NO_MEM;
  1157. goto error;
  1158. }
  1159. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1160. return ESP_OK;
  1161. error:
  1162. bt_controller_deinit_internal();
  1163. return err;
  1164. }
  1165. esp_err_t esp_bt_controller_deinit(void)
  1166. {
  1167. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1168. return ESP_ERR_INVALID_STATE;
  1169. }
  1170. btdm_controller_deinit();
  1171. bt_controller_deinit_internal();
  1172. return ESP_OK;
  1173. }
  1174. static void bt_controller_deinit_internal(void)
  1175. {
  1176. periph_module_disable(PERIPH_BT_MODULE);
  1177. // deinit low power control resources
  1178. do {
  1179. #if CONFIG_MAC_BB_PD
  1180. if (s_lp_cntl.mac_bb_pd) {
  1181. btdm_deep_sleep_mem_deinit();
  1182. s_lp_cntl.mac_bb_pd = 0;
  1183. }
  1184. #endif
  1185. #ifdef CONFIG_PM_ENABLE
  1186. if (s_lp_cntl.no_light_sleep) {
  1187. if (s_light_sleep_pm_lock != NULL) {
  1188. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1189. s_light_sleep_pm_lock = NULL;
  1190. }
  1191. }
  1192. if (s_pm_lock != NULL) {
  1193. esp_pm_lock_delete(s_pm_lock);
  1194. s_pm_lock = NULL;
  1195. s_lp_stat.pm_lock_released = 0;
  1196. }
  1197. #endif
  1198. if (s_lp_cntl.wakeup_timer_required) {
  1199. if (s_lp_stat.wakeup_timer_started) {
  1200. esp_timer_stop(s_btdm_slp_tmr);
  1201. }
  1202. s_lp_stat.wakeup_timer_started = 0;
  1203. esp_timer_delete(s_btdm_slp_tmr);
  1204. s_btdm_slp_tmr = NULL;
  1205. }
  1206. if (s_lp_cntl.enable) {
  1207. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1208. if (s_wakeup_req_sem != NULL) {
  1209. semphr_delete_wrapper(s_wakeup_req_sem);
  1210. s_wakeup_req_sem = NULL;
  1211. }
  1212. }
  1213. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1214. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1215. if (s_lp_cntl.main_xtal_pu) {
  1216. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
  1217. s_lp_cntl.main_xtal_pu = 0;
  1218. }
  1219. #endif
  1220. btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1221. btdm_lpclk_set_div(0);
  1222. #if CONFIG_SW_COEXIST_ENABLE
  1223. coex_update_lpclk_interval();
  1224. #endif
  1225. }
  1226. btdm_lpcycle_us = 0;
  1227. } while (0);
  1228. #if CONFIG_MAC_BB_PD
  1229. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1230. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1231. #endif
  1232. esp_bt_power_domain_off();
  1233. #if CONFIG_MAC_BB_PD
  1234. esp_mac_bb_pd_mem_deinit();
  1235. #endif
  1236. esp_phy_modem_deinit();
  1237. if (osi_funcs_p != NULL) {
  1238. free(osi_funcs_p);
  1239. osi_funcs_p = NULL;
  1240. }
  1241. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1242. }
  1243. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1244. {
  1245. esp_err_t ret = ESP_OK;
  1246. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1247. return ESP_ERR_INVALID_STATE;
  1248. }
  1249. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1250. if (mode != btdm_controller_get_mode()) {
  1251. ESP_LOGE(BT_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1252. return ESP_ERR_INVALID_ARG;
  1253. }
  1254. /* Enable PHY when enabling controller to reduce power dissipation after controller init
  1255. * Notice the init order: esp_phy_enable() -> bt_bb_v2_init_cmplx() -> coex_pti_v2()
  1256. */
  1257. esp_phy_enable(PHY_MODEM_BT);
  1258. s_lp_stat.phy_enabled = 1;
  1259. #if CONFIG_SW_COEXIST_ENABLE
  1260. coex_enable();
  1261. #endif
  1262. // enable low power mode
  1263. do {
  1264. #ifdef CONFIG_PM_ENABLE
  1265. if (s_lp_cntl.no_light_sleep) {
  1266. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1267. }
  1268. esp_pm_lock_acquire(s_pm_lock);
  1269. s_lp_stat.pm_lock_released = 0;
  1270. #endif
  1271. if (s_lp_cntl.enable) {
  1272. btdm_controller_enable_sleep(true);
  1273. }
  1274. } while (0);
  1275. // Disable pll track by default in BLE controller on ESP32-C3 and ESP32-S3
  1276. sdk_config_extend_set_pll_track(false);
  1277. if (btdm_controller_enable(mode) != 0) {
  1278. ret = ESP_ERR_INVALID_STATE;
  1279. goto error;
  1280. }
  1281. coex_pti_v2();
  1282. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1283. return ret;
  1284. error:
  1285. // disable low power mode
  1286. do {
  1287. btdm_controller_enable_sleep(false);
  1288. #ifdef CONFIG_PM_ENABLE
  1289. if (s_lp_cntl.no_light_sleep) {
  1290. esp_pm_lock_release(s_light_sleep_pm_lock);
  1291. }
  1292. if (s_lp_stat.pm_lock_released == 0) {
  1293. esp_pm_lock_release(s_pm_lock);
  1294. s_lp_stat.pm_lock_released = 1;
  1295. }
  1296. #endif
  1297. } while (0);
  1298. #if CONFIG_SW_COEXIST_ENABLE
  1299. coex_disable();
  1300. #endif
  1301. if (s_lp_stat.phy_enabled) {
  1302. esp_phy_disable(PHY_MODEM_BT);
  1303. s_lp_stat.phy_enabled = 0;
  1304. }
  1305. return ret;
  1306. }
  1307. esp_err_t esp_bt_controller_disable(void)
  1308. {
  1309. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1310. return ESP_ERR_INVALID_STATE;
  1311. }
  1312. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1313. while (!btdm_power_state_active()){}
  1314. btdm_controller_disable();
  1315. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1316. #if CONFIG_SW_COEXIST_ENABLE
  1317. coex_disable();
  1318. #endif
  1319. if (s_lp_stat.phy_enabled) {
  1320. esp_phy_disable(PHY_MODEM_BT);
  1321. s_lp_stat.phy_enabled = 0;
  1322. }
  1323. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1324. // disable low power mode
  1325. do {
  1326. #ifdef CONFIG_PM_ENABLE
  1327. if (s_lp_cntl.no_light_sleep) {
  1328. esp_pm_lock_release(s_light_sleep_pm_lock);
  1329. }
  1330. if (s_lp_stat.pm_lock_released == 0) {
  1331. esp_pm_lock_release(s_pm_lock);
  1332. s_lp_stat.pm_lock_released = 1;
  1333. } else {
  1334. assert(0);
  1335. }
  1336. #endif
  1337. } while (0);
  1338. return ESP_OK;
  1339. }
  1340. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1341. {
  1342. return btdm_controller_status;
  1343. }
  1344. /* extra functions */
  1345. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1346. {
  1347. esp_err_t stat = ESP_FAIL;
  1348. switch (power_type) {
  1349. case ESP_BLE_PWR_TYPE_ADV:
  1350. case ESP_BLE_PWR_TYPE_SCAN:
  1351. case ESP_BLE_PWR_TYPE_DEFAULT:
  1352. if (ble_txpwr_set(power_type, power_level) == 0) {
  1353. stat = ESP_OK;
  1354. }
  1355. break;
  1356. default:
  1357. stat = ESP_ERR_NOT_SUPPORTED;
  1358. break;
  1359. }
  1360. return stat;
  1361. }
  1362. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1363. {
  1364. esp_power_level_t lvl;
  1365. switch (power_type) {
  1366. case ESP_BLE_PWR_TYPE_ADV:
  1367. case ESP_BLE_PWR_TYPE_SCAN:
  1368. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1369. break;
  1370. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1371. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1372. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1373. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1374. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1375. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1376. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1377. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1378. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1379. case ESP_BLE_PWR_TYPE_DEFAULT:
  1380. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1381. break;
  1382. default:
  1383. lvl = ESP_PWR_LVL_INVALID;
  1384. break;
  1385. }
  1386. return lvl;
  1387. }
  1388. esp_err_t esp_bt_sleep_enable (void)
  1389. {
  1390. esp_err_t status;
  1391. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1392. return ESP_ERR_INVALID_STATE;
  1393. }
  1394. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1395. btdm_controller_enable_sleep (true);
  1396. status = ESP_OK;
  1397. } else {
  1398. status = ESP_ERR_NOT_SUPPORTED;
  1399. }
  1400. return status;
  1401. }
  1402. esp_err_t esp_bt_sleep_disable (void)
  1403. {
  1404. esp_err_t status;
  1405. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1406. return ESP_ERR_INVALID_STATE;
  1407. }
  1408. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1409. btdm_controller_enable_sleep (false);
  1410. status = ESP_OK;
  1411. } else {
  1412. status = ESP_ERR_NOT_SUPPORTED;
  1413. }
  1414. return status;
  1415. }
  1416. bool esp_bt_controller_is_sleeping(void)
  1417. {
  1418. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1419. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1420. return false;
  1421. }
  1422. return !btdm_power_state_active();
  1423. }
  1424. void esp_bt_controller_wakeup_request(void)
  1425. {
  1426. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1427. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1428. return;
  1429. }
  1430. btdm_wakeup_request();
  1431. }
  1432. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1433. {
  1434. return btdm_hci_tl_io_event_post(event);
  1435. }
  1436. uint16_t esp_bt_get_tx_buf_num(void)
  1437. {
  1438. return l2c_ble_link_get_tx_buf_num();
  1439. }
  1440. static void coex_wifi_sleep_set_hook(bool sleep)
  1441. {
  1442. }
  1443. #endif /* CONFIG_BT_ENABLED */