ana_cmpr.c 15 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stdlib.h>
  7. #include <inttypes.h>
  8. #include "sdkconfig.h"
  9. #if CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG
  10. // The local log level must be defined before including esp_log.h
  11. // Set the maximum log level for this source file
  12. #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  13. #endif
  14. #include "freertos/FreeRTOS.h"
  15. #include "esp_clk_tree.h"
  16. #include "esp_types.h"
  17. #include "esp_attr.h"
  18. #include "esp_check.h"
  19. #include "esp_pm.h"
  20. #include "esp_heap_caps.h"
  21. #include "esp_intr_alloc.h"
  22. #include "esp_memory_utils.h"
  23. #include "soc/periph_defs.h"
  24. #include "soc/ana_cmpr_periph.h"
  25. #include "hal/ana_cmpr_ll.h"
  26. #include "driver/ana_cmpr.h"
  27. #include "driver/gpio.h"
  28. #include "esp_private/io_mux.h"
  29. #include "esp_private/esp_clk.h"
  30. struct ana_cmpr_t {
  31. ana_cmpr_unit_t unit; /*!< Analog comparator unit id */
  32. analog_cmpr_dev_t *dev; /*!< Analog comparator unit device address */
  33. ana_cmpr_ref_source_t ref_src; /*!< Analog comparator reference source, internal or external */
  34. bool is_enabled; /*!< Whether the Analog comparator unit is enabled */
  35. ana_cmpr_event_callbacks_t cbs; /*!< The callback group that set by user */
  36. intr_handle_t intr_handle; /*!< Interrupt handle */
  37. uint32_t intr_mask; /*!< Interrupt mask */
  38. int intr_priority; /*!< Interrupt priority */
  39. void *user_data; /*!< User data that passed to the callbacks */
  40. uint32_t src_clk_freq_hz; /*!< Source clock frequency of the Analog Comparator unit */
  41. esp_pm_lock_handle_t pm_lock; /*!< The Power Management lock that used to avoid unexpected power down of the clock domain */
  42. };
  43. /* Helper macros */
  44. #define ANA_CMPR_NULL_POINTER_CHECK(p) ESP_RETURN_ON_FALSE((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
  45. #define ANA_CMPR_NULL_POINTER_CHECK_ISR(p) ESP_RETURN_ON_FALSE_ISR((p), ESP_ERR_INVALID_ARG, TAG, "input parameter '"#p"' is NULL")
  46. #define ANA_CMPR_UNIT_CHECK(unit) ESP_RETURN_ON_FALSE((unit) >= 0 && (unit) < SOC_ANA_CMPR_NUM, \
  47. ESP_ERR_INVALID_ARG, TAG, "invalid uint number");
  48. /* Memory allocation caps which decide the section that memory supposed to allocate */
  49. #if CONFIG_ANA_CMPR_ISR_IRAM_SAFE
  50. #define ANA_CMPR_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
  51. #define ANA_CMPR_INTR_FLAG (ESP_INTR_FLAG_IRAM)
  52. #else
  53. #define ANA_CMPR_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
  54. #define ANA_CMPR_INTR_FLAG (0)
  55. #endif
  56. /* Driver tag */
  57. static const char *TAG = "ana_cmpr";
  58. /* Global static object of the Analog Comparator unit */
  59. static ana_cmpr_handle_t s_ana_cmpr[SOC_ANA_CMPR_NUM] = {
  60. [0 ... (SOC_ANA_CMPR_NUM - 1)] = NULL,
  61. };
  62. /* Global spin lock */
  63. static portMUX_TYPE s_spinlock = portMUX_INITIALIZER_UNLOCKED;
  64. static void IRAM_ATTR s_ana_cmpr_default_intr_handler(void *usr_data)
  65. {
  66. ana_cmpr_handle_t cmpr_handle = (ana_cmpr_handle_t)usr_data;
  67. bool need_yield = false;
  68. ana_cmpr_cross_event_data_t evt_data = {.cross_type = ANA_CMPR_CROSS_ANY};
  69. /* Get and clear the interrupt status */
  70. uint32_t status = analog_cmpr_ll_get_intr_status(cmpr_handle->dev);
  71. analog_cmpr_ll_clear_intr(cmpr_handle->dev, status);
  72. /* Call the user callback function if it is specified and the corresponding event triggers*/
  73. if (cmpr_handle->cbs.on_cross && (status & cmpr_handle->intr_mask)) {
  74. #if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  75. if (status & ANALOG_CMPR_LL_POS_CROSS_MASK(cmpr_handle->unit)) {
  76. evt_data.cross_type = ANA_CMPR_CROSS_POS;
  77. } else if (status & ANALOG_CMPR_LL_NEG_CROSS_MASK(cmpr_handle->unit)) {
  78. evt_data.cross_type = ANA_CMPR_CROSS_NEG;
  79. }
  80. #endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  81. need_yield = cmpr_handle->cbs.on_cross(cmpr_handle, &evt_data, cmpr_handle->user_data);
  82. }
  83. if (need_yield) {
  84. portYIELD_FROM_ISR();
  85. }
  86. }
  87. static esp_err_t s_ana_cmpr_init_gpio(ana_cmpr_handle_t cmpr, bool is_external_ref)
  88. {
  89. uint64_t pin_mask = BIT64(ana_cmpr_periph[cmpr->unit].src_gpio);
  90. if (is_external_ref) {
  91. pin_mask |= BIT64(ana_cmpr_periph[cmpr->unit].ext_ref_gpio);
  92. }
  93. gpio_config_t ana_cmpr_gpio_cfg = {
  94. .pin_bit_mask = pin_mask,
  95. .mode = GPIO_MODE_DISABLE,
  96. .pull_up_en = GPIO_PULLUP_DISABLE,
  97. .pull_down_en = GPIO_PULLDOWN_DISABLE,
  98. .intr_type = GPIO_INTR_DISABLE,
  99. };
  100. return gpio_config(&ana_cmpr_gpio_cfg);
  101. }
  102. esp_err_t ana_cmpr_new_unit(const ana_cmpr_config_t *config, ana_cmpr_handle_t *ret_cmpr)
  103. {
  104. #if CONFIG_ANA_CMPR_ENABLE_DEBUG_LOG
  105. esp_log_level_set(TAG, ESP_LOG_DEBUG);
  106. #endif
  107. ANA_CMPR_NULL_POINTER_CHECK(config);
  108. ANA_CMPR_NULL_POINTER_CHECK(ret_cmpr);
  109. ana_cmpr_unit_t unit = config->unit;
  110. ANA_CMPR_UNIT_CHECK(unit);
  111. ESP_RETURN_ON_FALSE(config->intr_priority >= 0 && config->intr_priority <= 7, ESP_ERR_INVALID_ARG, TAG, "interrupt priority should be within 0~7");
  112. ESP_RETURN_ON_FALSE(!s_ana_cmpr[unit], ESP_ERR_INVALID_STATE, TAG,
  113. "unit has been allocated already");
  114. esp_err_t ret = ESP_OK;
  115. /* Allocate analog comparator unit */
  116. s_ana_cmpr[unit] = (ana_cmpr_handle_t)heap_caps_calloc(1, sizeof(struct ana_cmpr_t), ANA_CMPR_MEM_ALLOC_CAPS);
  117. ESP_RETURN_ON_FALSE(s_ana_cmpr[unit], ESP_ERR_NO_MEM, TAG, "no memory for analog comparator struct");
  118. /* Assign analog comparator unit */
  119. s_ana_cmpr[unit]->dev = ANALOG_CMPR_LL_GET_HW(unit);
  120. s_ana_cmpr[unit]->ref_src = config->ref_src;
  121. s_ana_cmpr[unit]->intr_priority = config->intr_priority;
  122. s_ana_cmpr[unit]->is_enabled = false;
  123. s_ana_cmpr[unit]->pm_lock = NULL;
  124. #if CONFIG_PM_ENABLE
  125. /* Create PM lock */
  126. char lock_name[10] = "ana_cmpr\0";
  127. lock_name[8] = '0' + unit;
  128. ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, lock_name, &s_ana_cmpr[unit]->pm_lock);
  129. ESP_GOTO_ON_ERROR(ret, err, TAG, "create NO_LIGHT_SLEEP, lock failed");
  130. #endif
  131. if (!config->flags.io_loop_back) {
  132. ESP_GOTO_ON_ERROR(s_ana_cmpr_init_gpio(s_ana_cmpr[unit], config->ref_src == ANA_CMPR_REF_SRC_EXTERNAL), err, TAG, "failed to initialize GPIO");
  133. }
  134. /* Analog clock comes from IO MUX, but IO MUX clock might be shared with other submodules as well */
  135. ESP_GOTO_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)config->clk_src,
  136. ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
  137. &s_ana_cmpr[unit]->src_clk_freq_hz),
  138. err, TAG, "get source clock frequency failed");
  139. ESP_GOTO_ON_ERROR(io_mux_set_clock_source((soc_module_clk_t)(config->clk_src)), err, TAG,
  140. "potential clock source conflicts from other IOMUX peripherals");
  141. /* Configure the register */
  142. portENTER_CRITICAL(&s_spinlock);
  143. analog_cmpr_ll_set_ref_source(s_ana_cmpr[unit]->dev, config->ref_src);
  144. #if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  145. analog_cmpr_ll_set_cross_type(s_ana_cmpr[unit]->dev, config->cross_type);
  146. #endif // SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  147. /* Record the interrupt mask, the interrupt will be lazy installed when register the callbacks */
  148. s_ana_cmpr[unit]->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(s_ana_cmpr[unit]->dev, config->cross_type);
  149. portEXIT_CRITICAL(&s_spinlock);
  150. if (config->ref_src == ANA_CMPR_REF_SRC_INTERNAL) {
  151. ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: internal",
  152. (int)unit, ana_cmpr_periph[unit].src_gpio);
  153. } else {
  154. ESP_LOGD(TAG, "unit %d allocated, source signal: GPIO %d, reference signal: GPIO %d",
  155. (int)unit, ana_cmpr_periph[unit].src_gpio, ana_cmpr_periph[unit].ext_ref_gpio);
  156. }
  157. *ret_cmpr = s_ana_cmpr[unit];
  158. return ESP_OK;
  159. err:
  160. /* Delete the unit if allocation failed */
  161. ana_cmpr_del_unit(s_ana_cmpr[unit]);
  162. return ret;
  163. }
  164. esp_err_t ana_cmpr_del_unit(ana_cmpr_handle_t cmpr)
  165. {
  166. ANA_CMPR_NULL_POINTER_CHECK(cmpr);
  167. /* Search the global object array to check if the input handle is valid */
  168. int unit = -1;
  169. for (int i = 0; i < SOC_ANA_CMPR_NUM; i++) {
  170. if (s_ana_cmpr[i] == cmpr) {
  171. unit = i;
  172. break;
  173. }
  174. }
  175. ESP_RETURN_ON_FALSE(unit != -1, ESP_ERR_INVALID_ARG, TAG, "wrong analog comparator handle");
  176. ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG, "this analog comparator unit not disabled yet");
  177. /* Delete the pm lock if the unit has */
  178. if (cmpr->pm_lock) {
  179. ESP_RETURN_ON_ERROR(esp_pm_lock_delete(cmpr->pm_lock), TAG, "delete pm lock failed");
  180. }
  181. /* Free interrupt and other resources */
  182. if (cmpr->intr_handle) {
  183. esp_intr_free(cmpr->intr_handle);
  184. }
  185. free(s_ana_cmpr[unit]);
  186. s_ana_cmpr[unit] = NULL;
  187. ESP_LOGD(TAG, "unit %d deleted", (int)unit);
  188. return ESP_OK;
  189. }
  190. esp_err_t ana_cmpr_set_internal_reference(ana_cmpr_handle_t cmpr, const ana_cmpr_internal_ref_config_t *ref_cfg)
  191. {
  192. ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
  193. ANA_CMPR_NULL_POINTER_CHECK_ISR(ref_cfg);
  194. ESP_RETURN_ON_FALSE_ISR(cmpr->ref_src == ANA_CMPR_REF_SRC_INTERNAL, ESP_ERR_INVALID_STATE,
  195. TAG, "the reference channel is not internal, no need to configure internal reference");
  196. /* Set internal reference voltage */
  197. portENTER_CRITICAL_SAFE(&s_spinlock);
  198. analog_cmpr_ll_set_internal_ref_voltage(cmpr->dev, ref_cfg->ref_volt);
  199. portEXIT_CRITICAL_SAFE(&s_spinlock);
  200. ESP_EARLY_LOGD(TAG, "unit %d internal voltage level %"PRIu32, (int)cmpr->unit, ref_cfg->ref_volt);
  201. return ESP_OK;
  202. }
  203. esp_err_t ana_cmpr_set_debounce(ana_cmpr_handle_t cmpr, const ana_cmpr_debounce_config_t *dbc_cfg)
  204. {
  205. ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
  206. ANA_CMPR_NULL_POINTER_CHECK_ISR(dbc_cfg);
  207. /* Transfer the time to clock cycles */
  208. uint32_t wait_cycle = (uint32_t)(dbc_cfg->wait_us * (cmpr->src_clk_freq_hz / 1000000));
  209. /* Set the waiting clock cycles */
  210. portENTER_CRITICAL_SAFE(&s_spinlock);
  211. analog_cmpr_ll_set_debounce_cycle(cmpr->dev, wait_cycle);
  212. portEXIT_CRITICAL_SAFE(&s_spinlock);
  213. ESP_EARLY_LOGD(TAG, "unit %d debounce wait cycle %"PRIu32, (int)cmpr->unit, wait_cycle);
  214. return ESP_OK;
  215. }
  216. esp_err_t ana_cmpr_set_cross_type(ana_cmpr_handle_t cmpr, ana_cmpr_cross_type_t cross_type)
  217. {
  218. #if SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  219. /* Not support to set the cross type after initialized, because it relies on the interrupt types to distinguish the edge,
  220. * i.e. have to re-allocate the interrupt to change the cross type */
  221. (void)cmpr;
  222. (void)cross_type;
  223. return ESP_ERR_NOT_SUPPORTED;
  224. #else
  225. ANA_CMPR_NULL_POINTER_CHECK_ISR(cmpr);
  226. ESP_RETURN_ON_FALSE_ISR(cross_type >= ANA_CMPR_CROSS_DISABLE && cross_type <= ANA_CMPR_CROSS_ANY,
  227. ESP_ERR_INVALID_ARG, TAG, "invalid cross type");
  228. portENTER_CRITICAL_SAFE(&s_spinlock);
  229. #if !SOC_ANA_CMPR_CAN_DISTINGUISH_EDGE
  230. analog_cmpr_ll_set_cross_type(cmpr->dev, cross_type);
  231. #endif
  232. cmpr->intr_mask = analog_cmpr_ll_get_intr_mask_by_type(cmpr->dev, cross_type);
  233. portEXIT_CRITICAL_SAFE(&s_spinlock);
  234. ESP_EARLY_LOGD(TAG, "unit %d cross type updated to %d", (int)cmpr->unit, cross_type);
  235. return ESP_OK;
  236. #endif
  237. }
  238. esp_err_t ana_cmpr_register_event_callbacks(ana_cmpr_handle_t cmpr, const ana_cmpr_event_callbacks_t *cbs, void *user_data)
  239. {
  240. ANA_CMPR_NULL_POINTER_CHECK(cmpr);
  241. ANA_CMPR_NULL_POINTER_CHECK(cbs);
  242. ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
  243. "please disable the analog comparator before registering the callbacks");
  244. #if CONFIG_ANA_CMPR_ISR_IRAM_SAFE
  245. if (cbs->on_cross) {
  246. ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_cross), ESP_ERR_INVALID_ARG, TAG,
  247. "ANA_CMPR_ISR_IRAM_SAFE enabled but the callback function is not in IRAM");
  248. }
  249. if (user_data) {
  250. ESP_RETURN_ON_FALSE(esp_ptr_in_iram(user_data), ESP_ERR_INVALID_ARG, TAG,
  251. "ANA_CMPR_ISR_IRAM_SAFE enabled but the user_data is not in IRAM");
  252. }
  253. #endif
  254. /* Allocate the interrupt, the interrupt source of Analog Comparator is shared with GPIO interrupt source on ESP32H2 */
  255. if (!cmpr->intr_handle) {
  256. int intr_flags = ANA_CMPR_INTR_FLAG | (cmpr->intr_priority ? BIT(cmpr->intr_priority) : ESP_INTR_FLAG_LOWMED);
  257. #if SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
  258. intr_flags |= ESP_INTR_FLAG_SHARED;
  259. #endif // SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO
  260. ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(ana_cmpr_periph[cmpr->unit].intr_src, intr_flags, (uint32_t)analog_cmpr_ll_get_intr_status_reg(cmpr->dev),
  261. cmpr->intr_mask, s_ana_cmpr_default_intr_handler, cmpr, &cmpr->intr_handle), TAG, "allocate interrupt failed");
  262. }
  263. /* Save the callback group */
  264. memcpy(&(cmpr->cbs), cbs, sizeof(ana_cmpr_event_callbacks_t));
  265. cmpr->user_data = user_data;
  266. ESP_LOGD(TAG, "unit %d event callback registered", (int)cmpr->unit);
  267. return ESP_OK;
  268. }
  269. esp_err_t ana_cmpr_enable(ana_cmpr_handle_t cmpr)
  270. {
  271. ANA_CMPR_NULL_POINTER_CHECK(cmpr);
  272. ESP_RETURN_ON_FALSE(!cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
  273. "the analog comparator has enabled already");
  274. /* Update the driver status */
  275. cmpr->is_enabled = true;
  276. /* Acquire the pm lock if the unit has, to avoid the system start light sleep while Analog comparator still working */
  277. if (cmpr->pm_lock) {
  278. ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(cmpr->pm_lock), TAG, "acquire pm_lock failed");
  279. }
  280. /* Enable the Analog Comparator */
  281. portENTER_CRITICAL(&s_spinlock);
  282. analog_cmpr_ll_enable_intr(cmpr->dev, cmpr->intr_mask, true);
  283. analog_cmpr_ll_enable(cmpr->dev, true);
  284. portEXIT_CRITICAL(&s_spinlock);
  285. ESP_LOGD(TAG, "unit %d enabled", (int)cmpr->unit);
  286. return ESP_OK;
  287. }
  288. esp_err_t ana_cmpr_disable(ana_cmpr_handle_t cmpr)
  289. {
  290. ANA_CMPR_NULL_POINTER_CHECK(cmpr);
  291. ESP_RETURN_ON_FALSE(cmpr->is_enabled, ESP_ERR_INVALID_STATE, TAG,
  292. "the analog comparator not enabled yet");
  293. /* Disable the Analog Comparator */
  294. portENTER_CRITICAL(&s_spinlock);
  295. analog_cmpr_ll_enable_intr(cmpr->dev, cmpr->intr_mask, false);
  296. analog_cmpr_ll_enable(cmpr->dev, false);
  297. portEXIT_CRITICAL(&s_spinlock);
  298. /* Release the pm lock, allow light sleep then */
  299. if (cmpr->pm_lock) {
  300. ESP_RETURN_ON_ERROR(esp_pm_lock_release(cmpr->pm_lock), TAG, "release pm_lock failed");
  301. }
  302. /* Update the driver status */
  303. cmpr->is_enabled = false;
  304. ESP_LOGD(TAG, "unit %d disabled", (int)cmpr->unit);
  305. return ESP_OK;
  306. }
  307. esp_err_t ana_cmpr_get_gpio(ana_cmpr_unit_t unit, ana_cmpr_channel_type_t chan_type, int *gpio_num)
  308. {
  309. ANA_CMPR_NULL_POINTER_CHECK(gpio_num);
  310. ANA_CMPR_UNIT_CHECK(unit);
  311. /* Get the gpio number according to the channel type */
  312. switch (chan_type) {
  313. case ANA_CMPR_SOURCE_CHAN:
  314. *gpio_num = ana_cmpr_periph[unit].src_gpio;
  315. break;
  316. case ANA_CMPR_EXT_REF_CHAN:
  317. *gpio_num = ana_cmpr_periph[unit].ext_ref_gpio;
  318. break;
  319. default:
  320. ESP_LOGE(TAG, "invalid channel type");
  321. return ESP_ERR_INVALID_ARG;
  322. }
  323. return ESP_OK;
  324. }
  325. ana_cmpr_unit_t ana_cmpr_priv_get_unit_by_handle(ana_cmpr_handle_t cmpr)
  326. {
  327. if (!cmpr) {
  328. return -1;
  329. }
  330. return cmpr->unit;
  331. }