test_uart.c 16 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include <sys/param.h>
  8. #include "unity.h"
  9. #include "driver/uart.h" // for the uart driver access
  10. #include "esp_log.h"
  11. #include "esp_system.h" // for uint32_t esp_random()
  12. #include "esp_rom_gpio.h"
  13. #include "soc/uart_periph.h"
  14. #define UART_TAG "Uart"
  15. #define UART_NUM1 (UART_NUM_1)
  16. #define BUF_SIZE (100)
  17. #define UART1_RX_PIN (5)
  18. #define UART1_TX_PIN (4)
  19. #define UART_BAUD_11520 (11520)
  20. #define UART_BAUD_115200 (115200)
  21. #define TOLERANCE (0.02) //baud rate error tolerance 2%.
  22. #define UART1_CTS_PIN (13)
  23. static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
  24. {
  25. uart_config_t uart_config = {
  26. .baud_rate = baud_rate,
  27. .source_clk = source_clk,
  28. .data_bits = UART_DATA_8_BITS,
  29. .parity = UART_PARITY_DISABLE,
  30. .stop_bits = UART_STOP_BITS_1,
  31. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  32. };
  33. uart_driver_install(UART_NUM1, BUF_SIZE * 2, BUF_SIZE * 2, 20, NULL, 0);
  34. uart_param_config(UART_NUM1, &uart_config);
  35. TEST_ESP_OK(uart_set_loop_back(UART_NUM1, true));
  36. }
  37. static volatile bool exit_flag, case_end;
  38. static void test_task1(void *pvParameters)
  39. {
  40. SemaphoreHandle_t *sema = (SemaphoreHandle_t *) pvParameters;
  41. char* data = (char *) malloc(256);
  42. while (exit_flag == false) {
  43. uart_tx_chars(UART_NUM1, data, 256);
  44. // The uart_wait_tx_done() function does not block anything if ticks_to_wait = 0.
  45. uart_wait_tx_done(UART_NUM1, 0);
  46. }
  47. free(data);
  48. xSemaphoreGive(*sema);
  49. vTaskDelete(NULL);
  50. }
  51. static void test_task2(void *pvParameters)
  52. {
  53. while (exit_flag == false) {
  54. // This task obstruct a setting tx_done_sem semaphore in the UART interrupt.
  55. // It leads to waiting the ticks_to_wait time in uart_wait_tx_done() function.
  56. uart_disable_tx_intr(UART_NUM1);
  57. }
  58. vTaskDelete(NULL);
  59. }
  60. static void test_task3(void *pvParameters)
  61. {
  62. uart_config(UART_BAUD_11520, UART_SCLK_DEFAULT);
  63. SemaphoreHandle_t exit_sema = xSemaphoreCreateBinary();
  64. exit_flag = false;
  65. case_end = false;
  66. xTaskCreate(test_task1, "tsk1", 2048, &exit_sema, 5, NULL);
  67. xTaskCreate(test_task2, "tsk2", 2048, NULL, 5, NULL);
  68. printf("Waiting for 5 sec\n");
  69. vTaskDelay(pdMS_TO_TICKS(5000));
  70. exit_flag = true;
  71. if (xSemaphoreTake(exit_sema, pdMS_TO_TICKS(1000)) == pdTRUE) {
  72. vSemaphoreDelete(exit_sema);
  73. } else {
  74. TEST_FAIL_MESSAGE("uart_wait_tx_done is blocked");
  75. }
  76. TEST_ESP_OK(uart_driver_delete(UART_NUM1));
  77. vTaskDelay(2); // wait for test_task1 to exit
  78. case_end = true;
  79. vTaskDelete(NULL);
  80. }
  81. TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
  82. {
  83. xTaskCreate(test_task3, "tsk3", 4096, NULL, 5, NULL);
  84. while(!case_end);
  85. vTaskDelay(2); // wait for test_task3 to exit
  86. }
  87. TEST_CASE("test uart get baud-rate", "[uart]")
  88. {
  89. #if SOC_UART_SUPPORT_REF_TICK
  90. uint32_t baud_rate1 = 0;
  91. printf("init uart%d, use reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_11520);
  92. uart_config(UART_BAUD_11520, UART_SCLK_REF_TICK);
  93. uart_get_baudrate(UART_NUM1, &baud_rate1);
  94. printf("get baud rate when use reftick: %d\n", (int)baud_rate1);
  95. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_11520 * TOLERANCE, UART_BAUD_11520, baud_rate1);
  96. #endif
  97. uint32_t baud_rate2 = 0;
  98. printf("init uart%d, unuse reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_115200);
  99. uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT);
  100. uart_get_baudrate(UART_NUM1, &baud_rate2);
  101. printf("get baud rate when don't use reftick: %d\n", (int)baud_rate2);
  102. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_115200 * TOLERANCE, UART_BAUD_115200, baud_rate2);
  103. uart_driver_delete(UART_NUM1);
  104. ESP_LOGI(UART_TAG, "get baud-rate test passed ....");
  105. }
  106. TEST_CASE("test uart tx data with break", "[uart]")
  107. {
  108. const int buf_len = 200;
  109. const int send_len = 128;
  110. const int brk_len = 10;
  111. char *psend = (char *)malloc(buf_len);
  112. TEST_ASSERT_NOT_NULL(psend);
  113. memset(psend, '0', buf_len);
  114. uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT);
  115. printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
  116. uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
  117. uart_wait_tx_done(UART_NUM1, portMAX_DELAY);
  118. //If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
  119. printf("Send data with break test passed\n");
  120. free(psend);
  121. uart_driver_delete(UART_NUM1);
  122. }
  123. static void uart_word_len_set_get_test(int uart_num)
  124. {
  125. printf("uart word len set and get test\n");
  126. uart_word_length_t word_length_set = 0;
  127. uart_word_length_t word_length_get = 0;
  128. for (int i = 0; i < UART_DATA_BITS_MAX; i++) {
  129. word_length_set = UART_DATA_5_BITS + i;
  130. TEST_ESP_OK(uart_set_word_length(uart_num, word_length_set));
  131. TEST_ESP_OK(uart_get_word_length(uart_num, &word_length_get));
  132. TEST_ASSERT_EQUAL(word_length_set, word_length_get);
  133. }
  134. }
  135. static void uart_stop_bit_set_get_test(int uart_num)
  136. {
  137. printf("uart stop bit set and get test\n");
  138. uart_stop_bits_t stop_bit_set = 0;
  139. uart_stop_bits_t stop_bit_get = 0;
  140. for (int i = UART_STOP_BITS_1; i < UART_STOP_BITS_MAX; i++) {
  141. stop_bit_set = i;
  142. TEST_ESP_OK(uart_set_stop_bits(uart_num, stop_bit_set));
  143. TEST_ESP_OK(uart_get_stop_bits(uart_num, &stop_bit_get));
  144. TEST_ASSERT_EQUAL(stop_bit_set, stop_bit_get);
  145. }
  146. }
  147. static void uart_parity_set_get_test(int uart_num)
  148. {
  149. printf("uart parity set and get test\n");
  150. uart_parity_t parity_set[3] = {
  151. UART_PARITY_DISABLE,
  152. UART_PARITY_EVEN,
  153. UART_PARITY_ODD,
  154. };
  155. uart_parity_t parity_get = 0;
  156. for (int i = 0; i < 3; i++) {
  157. TEST_ESP_OK(uart_set_parity(uart_num, parity_set[i]));
  158. TEST_ESP_OK(uart_get_parity(uart_num, &parity_get));
  159. TEST_ASSERT_EQUAL(parity_set[i], parity_get);
  160. }
  161. }
  162. static void uart_hw_flow_set_get_test(int uart_num)
  163. {
  164. printf("uart hw flow control set and get test\n");
  165. uart_hw_flowcontrol_t flowcontrol_set = 0;
  166. uart_hw_flowcontrol_t flowcontrol_get = 0;
  167. for (int i = 0; i < UART_HW_FLOWCTRL_DISABLE; i++) {
  168. TEST_ESP_OK(uart_set_hw_flow_ctrl(uart_num, flowcontrol_set, 20));
  169. TEST_ESP_OK(uart_get_hw_flow_ctrl(uart_num, &flowcontrol_get));
  170. TEST_ASSERT_EQUAL(flowcontrol_set, flowcontrol_get);
  171. }
  172. }
  173. static void uart_wakeup_set_get_test(int uart_num)
  174. {
  175. printf("uart wake up set and get test\n");
  176. int wake_up_set = 0;
  177. int wake_up_get = 0;
  178. for (int i = 3; i < 0x3ff; i++) {
  179. wake_up_set = i;
  180. TEST_ESP_OK(uart_set_wakeup_threshold(uart_num, wake_up_set));
  181. TEST_ESP_OK(uart_get_wakeup_threshold(uart_num, &wake_up_get));
  182. TEST_ASSERT_EQUAL(wake_up_set, wake_up_get);
  183. }
  184. }
  185. TEST_CASE("uart general API test", "[uart]")
  186. {
  187. const int uart_num = UART_NUM1;
  188. uart_config_t uart_config = {
  189. .baud_rate = 115200,
  190. .data_bits = UART_DATA_8_BITS,
  191. .parity = UART_PARITY_DISABLE,
  192. .stop_bits = UART_STOP_BITS_1,
  193. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  194. .source_clk = UART_SCLK_DEFAULT,
  195. };
  196. uart_param_config(uart_num, &uart_config);
  197. uart_word_len_set_get_test(uart_num);
  198. uart_stop_bit_set_get_test(uart_num);
  199. uart_parity_set_get_test(uart_num);
  200. uart_hw_flow_set_get_test(uart_num);
  201. uart_wakeup_set_get_test(uart_num);
  202. }
  203. static void uart_write_task(void *param)
  204. {
  205. int uart_num = (int)param;
  206. uint8_t *tx_buf = (uint8_t *)malloc(1024);
  207. if(tx_buf == NULL) {
  208. TEST_FAIL_MESSAGE("tx buffer malloc fail");
  209. }
  210. for(int i = 1; i < 1023; i++) {
  211. tx_buf[i] = (i & 0xff);
  212. }
  213. for(int i = 0; i < 1024; i++) {
  214. //d[0] and d[1023] are header
  215. tx_buf[0] = (i & 0xff);
  216. tx_buf[1023] = ((~i) & 0xff);
  217. uart_write_bytes(uart_num, (const char*)tx_buf, 1024);
  218. uart_wait_tx_done(uart_num, portMAX_DELAY);
  219. }
  220. free(tx_buf);
  221. vTaskDelete(NULL);
  222. }
  223. /**
  224. * The following tests use loop back
  225. *
  226. * NOTE: In the following tests, because the internal loopback is enabled, the CTS signal is connected to
  227. * the RTS signal internally. However, On ESP32S3, they are not, and the CTS keeps the default level (which
  228. * is a high level). So the workaround is to map the CTS in_signal to a GPIO pin (here IO13 is used) and connect
  229. * the RTS output_signal to this IO.
  230. */
  231. TEST_CASE("uart read write test", "[uart]")
  232. {
  233. const int uart_num = UART_NUM1;
  234. uint8_t *rd_data = (uint8_t *)malloc(1024);
  235. if(rd_data == NULL) {
  236. TEST_FAIL_MESSAGE("rx buffer malloc fail");
  237. }
  238. uart_config_t uart_config = {
  239. .baud_rate = 2000000,
  240. .data_bits = UART_DATA_8_BITS,
  241. .parity = UART_PARITY_DISABLE,
  242. .stop_bits = UART_STOP_BITS_1,
  243. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  244. .source_clk = UART_SCLK_DEFAULT,
  245. .rx_flow_ctrl_thresh = 120
  246. };
  247. TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0));
  248. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  249. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  250. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  251. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  252. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  253. TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
  254. vTaskDelay(pdMS_TO_TICKS(20)); // make sure last byte has flushed from TX FIFO
  255. TEST_ESP_OK(uart_flush_input(uart_num));
  256. xTaskCreate(uart_write_task, "uart_write_task", 8192, (void *)uart_num, 5, NULL);
  257. for (int i = 0; i < 1024; i++) {
  258. int bytes_remaining = 1024;
  259. memset(rd_data, 0, 1024);
  260. while (bytes_remaining) {
  261. int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, pdMS_TO_TICKS(100));
  262. if (bytes_received < 0) {
  263. TEST_FAIL_MESSAGE("read timeout, uart read write test fail");
  264. }
  265. bytes_remaining -= bytes_received;
  266. }
  267. int check_fail_cnt = 0;
  268. if (rd_data[0] != (i & 0xff)) {
  269. printf("packet %d index check error at offset 0, expected 0x%02x\n", i, i);
  270. ++check_fail_cnt;
  271. }
  272. if (rd_data[1023] != ((~i) & 0xff)) {
  273. printf("packet %d index check error at offset 1023, expected 0x%02x\n", i, ((~i) & 0xff));
  274. ++check_fail_cnt;
  275. }
  276. for (int j = 1; j < 1023; j++) {
  277. if (rd_data[j] != (j & 0xff)) {
  278. printf("data mismatch in packet %d offset %d, expected 0x%02x got 0x%02x\n", i, j, (j & 0xff), rd_data[j]);
  279. ++check_fail_cnt;
  280. }
  281. if (check_fail_cnt > 10) {
  282. printf("(further checks skipped)\n");
  283. break;
  284. }
  285. }
  286. if (check_fail_cnt > 0) {
  287. ESP_LOG_BUFFER_HEX("rd_data", rd_data, 1024);
  288. TEST_FAIL();
  289. }
  290. }
  291. uart_wait_tx_done(uart_num, portMAX_DELAY);
  292. uart_driver_delete(uart_num);
  293. free(rd_data);
  294. vTaskDelay(pdMS_TO_TICKS(100)); // wait for uart_write_task to exit
  295. }
  296. TEST_CASE("uart tx with ringbuffer test", "[uart]")
  297. {
  298. const int uart_num = UART_NUM1;
  299. uint8_t *rd_data = (uint8_t *)malloc(1024);
  300. uint8_t *wr_data = (uint8_t *)malloc(1024);
  301. if(rd_data == NULL || wr_data == NULL) {
  302. TEST_FAIL_MESSAGE("buffer malloc fail");
  303. }
  304. uart_config_t uart_config = {
  305. .baud_rate = 2000000,
  306. .data_bits = UART_DATA_8_BITS,
  307. .parity = UART_PARITY_DISABLE,
  308. .stop_bits = UART_STOP_BITS_1,
  309. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  310. .rx_flow_ctrl_thresh = 120,
  311. .source_clk = UART_SCLK_DEFAULT,
  312. };
  313. uart_wait_tx_idle_polling(uart_num);
  314. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  315. TEST_ESP_OK(uart_driver_install(uart_num, 1024 * 2, 1024 *2, 20, NULL, 0));
  316. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  317. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  318. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  319. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  320. for (int i = 0; i < 1024; i++) {
  321. wr_data[i] = i;
  322. rd_data[i] = 0;
  323. }
  324. size_t tx_buffer_free_space;
  325. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  326. TEST_ASSERT_EQUAL_INT(2048, tx_buffer_free_space); // full tx buffer space is free
  327. uart_write_bytes(uart_num, (const char*)wr_data, 1024);
  328. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  329. TEST_ASSERT_LESS_THAN(2048, tx_buffer_free_space); // tx transmit in progress: tx buffer has content
  330. TEST_ASSERT_GREATER_OR_EQUAL(1024, tx_buffer_free_space);
  331. uart_wait_tx_done(uart_num, portMAX_DELAY);
  332. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  333. TEST_ASSERT_EQUAL_INT(2048, tx_buffer_free_space); // tx done: tx buffer back to empty
  334. uart_read_bytes(uart_num, rd_data, 1024, pdMS_TO_TICKS(1000));
  335. TEST_ASSERT_EQUAL_HEX8_ARRAY(wr_data, rd_data, 1024);
  336. TEST_ESP_OK(uart_driver_delete(uart_num));
  337. free(rd_data);
  338. free(wr_data);
  339. }
  340. TEST_CASE("uart int state restored after flush", "[uart]")
  341. {
  342. /**
  343. * The first goal of this test is to make sure that when our RX FIFO is full,
  344. * we can continue receiving back data after flushing
  345. * For more details, check IDF-4374
  346. */
  347. uart_config_t uart_config = {
  348. .baud_rate = 115200,
  349. .data_bits = UART_DATA_8_BITS,
  350. .parity = UART_PARITY_DISABLE,
  351. .stop_bits = UART_STOP_BITS_1,
  352. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  353. .source_clk = UART_SCLK_DEFAULT,
  354. };
  355. const uart_port_t uart_echo = UART_NUM_1;
  356. const int uart_tx_signal = uart_periph_signal[uart_echo].pins[SOC_UART_TX_PIN_IDX].signal;
  357. const int uart_tx = UART1_TX_PIN;
  358. const int uart_rx = UART1_RX_PIN;
  359. const int buf_size = 256;
  360. const int intr_alloc_flags = 0;
  361. TEST_ESP_OK(uart_driver_install(uart_echo, buf_size * 2, 0, 0, NULL, intr_alloc_flags));
  362. TEST_ESP_OK(uart_param_config(uart_echo, &uart_config));
  363. TEST_ESP_OK(uart_set_pin(uart_echo, uart_tx, uart_rx, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
  364. /* Make sure UART2's RX signal is connected to TX pin
  365. * This creates a loop that lets us receive anything we send on the UART */
  366. esp_rom_gpio_connect_out_signal(uart_rx, uart_tx_signal, false, false);
  367. uint8_t *data = (uint8_t *) malloc(buf_size);
  368. TEST_ASSERT_NOT_NULL(data);
  369. uart_write_bytes(uart_echo, (const char *) data, buf_size);
  370. /* As we set up a loopback, we can read them back on RX */
  371. int len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(1000));
  372. TEST_ASSERT_EQUAL(len, buf_size);
  373. /* Fill the RX buffer, this should disable the RX interrupts */
  374. int written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  375. TEST_ASSERT_NOT_EQUAL(-1, written);
  376. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  377. TEST_ASSERT_NOT_EQUAL(-1, written);
  378. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  379. TEST_ASSERT_NOT_EQUAL(-1, written);
  380. /* Flush the input buffer, RX interrupts should be re-enabled */
  381. uart_flush_input(uart_echo);
  382. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  383. TEST_ASSERT_NOT_EQUAL(-1, written);
  384. len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(1000));
  385. /* len equals buf_size bytes if interrupts were indeed re-enabled */
  386. TEST_ASSERT_EQUAL(len, buf_size);
  387. /**
  388. * Second test, make sure that if we explicitly disable the RX interrupts,
  389. * they are NOT re-enabled after flushing
  390. * To do so, start by cleaning the RX FIFO, disable the RX interrupts,
  391. * flush again, send data to the UART and check that we haven't received
  392. * any of the bytes */
  393. uart_flush_input(uart_echo);
  394. uart_disable_rx_intr(uart_echo);
  395. uart_flush_input(uart_echo);
  396. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  397. TEST_ASSERT_NOT_EQUAL(-1, written);
  398. len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(250));
  399. TEST_ASSERT_EQUAL(len, 0);
  400. TEST_ESP_OK(uart_driver_delete(uart_echo));
  401. free(data);
  402. }