esp_efuse_table.c 50 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_efuse.h"
  8. #include <assert.h>
  9. #include "esp_efuse_table.h"
  10. // md5_digest_table fd5a35cea89bfad954e834bc92bed385
  11. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
  12. // If you want to change some fields, you need to change esp_efuse_table.csv file
  13. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
  14. // To show efuse_table run the command 'show_efuse_table'.
  15. static const esp_efuse_desc_t WR_DIS[] = {
  16. {EFUSE_BLK0, 0, 32}, // [] Disable programming of individual eFuses,
  17. };
  18. static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
  19. {EFUSE_BLK0, 0, 1}, // [] wr_dis of RD_DIS,
  20. };
  21. static const esp_efuse_desc_t WR_DIS_CRYPT_DPA_ENABLE[] = {
  22. {EFUSE_BLK0, 1, 1}, // [] wr_dis of CRYPT_DPA_ENABLE,
  23. };
  24. static const esp_efuse_desc_t WR_DIS_SWAP_UART_SDIO_EN[] = {
  25. {EFUSE_BLK0, 2, 1}, // [] wr_dis of SWAP_UART_SDIO_EN,
  26. };
  27. static const esp_efuse_desc_t WR_DIS_DIS_ICACHE[] = {
  28. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_ICACHE,
  29. };
  30. static const esp_efuse_desc_t WR_DIS_DIS_USB_JTAG[] = {
  31. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_USB_JTAG,
  32. };
  33. static const esp_efuse_desc_t WR_DIS_DIS_DOWNLOAD_ICACHE[] = {
  34. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_ICACHE,
  35. };
  36. static const esp_efuse_desc_t WR_DIS_DIS_USB_SERIAL_JTAG[] = {
  37. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_USB_SERIAL_JTAG,
  38. };
  39. static const esp_efuse_desc_t WR_DIS_DIS_FORCE_DOWNLOAD[] = {
  40. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_FORCE_DOWNLOAD,
  41. };
  42. static const esp_efuse_desc_t WR_DIS_DIS_TWAI[] = {
  43. {EFUSE_BLK0, 2, 1}, // [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI,
  44. };
  45. static const esp_efuse_desc_t WR_DIS_JTAG_SEL_ENABLE[] = {
  46. {EFUSE_BLK0, 2, 1}, // [] wr_dis of JTAG_SEL_ENABLE,
  47. };
  48. static const esp_efuse_desc_t WR_DIS_DIS_PAD_JTAG[] = {
  49. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_PAD_JTAG,
  50. };
  51. static const esp_efuse_desc_t WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  52. {EFUSE_BLK0, 2, 1}, // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT,
  53. };
  54. static const esp_efuse_desc_t WR_DIS_WDT_DELAY_SEL[] = {
  55. {EFUSE_BLK0, 3, 1}, // [] wr_dis of WDT_DELAY_SEL,
  56. };
  57. static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  58. {EFUSE_BLK0, 4, 1}, // [] wr_dis of SPI_BOOT_CRYPT_CNT,
  59. };
  60. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  61. {EFUSE_BLK0, 5, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE0,
  62. };
  63. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  64. {EFUSE_BLK0, 6, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE1,
  65. };
  66. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  67. {EFUSE_BLK0, 7, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE2,
  68. };
  69. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_0[] = {
  70. {EFUSE_BLK0, 8, 1}, // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0,
  71. };
  72. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_1[] = {
  73. {EFUSE_BLK0, 9, 1}, // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1,
  74. };
  75. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_2[] = {
  76. {EFUSE_BLK0, 10, 1}, // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2,
  77. };
  78. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_3[] = {
  79. {EFUSE_BLK0, 11, 1}, // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3,
  80. };
  81. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_4[] = {
  82. {EFUSE_BLK0, 12, 1}, // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4,
  83. };
  84. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_5[] = {
  85. {EFUSE_BLK0, 13, 1}, // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5,
  86. };
  87. static const esp_efuse_desc_t WR_DIS_SEC_DPA_LEVEL[] = {
  88. {EFUSE_BLK0, 14, 1}, // [WR_DIS.DPA_SEC_LEVEL] wr_dis of SEC_DPA_LEVEL,
  89. };
  90. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
  91. {EFUSE_BLK0, 15, 1}, // [] wr_dis of SECURE_BOOT_EN,
  92. };
  93. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  94. {EFUSE_BLK0, 16, 1}, // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE,
  95. };
  96. static const esp_efuse_desc_t WR_DIS_SPI_DOWNLOAD_MSPI_DIS[] = {
  97. {EFUSE_BLK0, 17, 1}, // [] wr_dis of SPI_DOWNLOAD_MSPI_DIS,
  98. };
  99. static const esp_efuse_desc_t WR_DIS_FLASH_TPUW[] = {
  100. {EFUSE_BLK0, 18, 1}, // [] wr_dis of FLASH_TPUW,
  101. };
  102. static const esp_efuse_desc_t WR_DIS_DIS_DOWNLOAD_MODE[] = {
  103. {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DOWNLOAD_MODE,
  104. };
  105. static const esp_efuse_desc_t WR_DIS_DIS_DIRECT_BOOT[] = {
  106. {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_DIRECT_BOOT,
  107. };
  108. static const esp_efuse_desc_t WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  109. {EFUSE_BLK0, 18, 1}, // [WR_DIS.DIS_USB_PRINT] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT,
  110. };
  111. static const esp_efuse_desc_t WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  112. {EFUSE_BLK0, 18, 1}, // [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE,
  113. };
  114. static const esp_efuse_desc_t WR_DIS_ENABLE_SECURITY_DOWNLOAD[] = {
  115. {EFUSE_BLK0, 18, 1}, // [] wr_dis of ENABLE_SECURITY_DOWNLOAD,
  116. };
  117. static const esp_efuse_desc_t WR_DIS_UART_PRINT_CONTROL[] = {
  118. {EFUSE_BLK0, 18, 1}, // [] wr_dis of UART_PRINT_CONTROL,
  119. };
  120. static const esp_efuse_desc_t WR_DIS_FORCE_SEND_RESUME[] = {
  121. {EFUSE_BLK0, 18, 1}, // [] wr_dis of FORCE_SEND_RESUME,
  122. };
  123. static const esp_efuse_desc_t WR_DIS_SECURE_VERSION[] = {
  124. {EFUSE_BLK0, 18, 1}, // [] wr_dis of SECURE_VERSION,
  125. };
  126. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  127. {EFUSE_BLK0, 19, 1}, // [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE,
  128. };
  129. static const esp_efuse_desc_t WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = {
  130. {EFUSE_BLK0, 19, 1}, // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR,
  131. };
  132. static const esp_efuse_desc_t WR_DIS_DISABLE_BLK_VERSION_MAJOR[] = {
  133. {EFUSE_BLK0, 19, 1}, // [] wr_dis of DISABLE_BLK_VERSION_MAJOR,
  134. };
  135. static const esp_efuse_desc_t WR_DIS_BLK1[] = {
  136. {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1,
  137. };
  138. static const esp_efuse_desc_t WR_DIS_MAC[] = {
  139. {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
  140. };
  141. static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
  142. {EFUSE_BLK0, 20, 1}, // [] wr_dis of MAC_EXT,
  143. };
  144. static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MINOR[] = {
  145. {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MINOR,
  146. };
  147. static const esp_efuse_desc_t WR_DIS_WAFER_VERSION_MAJOR[] = {
  148. {EFUSE_BLK0, 20, 1}, // [] wr_dis of WAFER_VERSION_MAJOR,
  149. };
  150. static const esp_efuse_desc_t WR_DIS_PKG_VERSION[] = {
  151. {EFUSE_BLK0, 20, 1}, // [] wr_dis of PKG_VERSION,
  152. };
  153. static const esp_efuse_desc_t WR_DIS_BLK_VERSION_MINOR[] = {
  154. {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MINOR,
  155. };
  156. static const esp_efuse_desc_t WR_DIS_BLK_VERSION_MAJOR[] = {
  157. {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLK_VERSION_MAJOR,
  158. };
  159. static const esp_efuse_desc_t WR_DIS_FLASH_CAP[] = {
  160. {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_CAP,
  161. };
  162. static const esp_efuse_desc_t WR_DIS_FLASH_TEMP[] = {
  163. {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_TEMP,
  164. };
  165. static const esp_efuse_desc_t WR_DIS_FLASH_VENDOR[] = {
  166. {EFUSE_BLK0, 20, 1}, // [] wr_dis of FLASH_VENDOR,
  167. };
  168. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
  169. {EFUSE_BLK0, 21, 1}, // [] wr_dis of BLOCK2,
  170. };
  171. static const esp_efuse_desc_t WR_DIS_OPTIONAL_UNIQUE_ID[] = {
  172. {EFUSE_BLK0, 21, 1}, // [] wr_dis of OPTIONAL_UNIQUE_ID,
  173. };
  174. static const esp_efuse_desc_t WR_DIS_TEMP_CALIB[] = {
  175. {EFUSE_BLK0, 21, 1}, // [] wr_dis of TEMP_CALIB,
  176. };
  177. static const esp_efuse_desc_t WR_DIS_OCODE[] = {
  178. {EFUSE_BLK0, 21, 1}, // [] wr_dis of OCODE,
  179. };
  180. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0[] = {
  181. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0,
  182. };
  183. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN1[] = {
  184. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN1,
  185. };
  186. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN2[] = {
  187. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN2,
  188. };
  189. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN3[] = {
  190. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN3,
  191. };
  192. static const esp_efuse_desc_t WR_DIS_ADC1_CAL_VOL_ATTEN0[] = {
  193. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN0,
  194. };
  195. static const esp_efuse_desc_t WR_DIS_ADC1_CAL_VOL_ATTEN1[] = {
  196. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN1,
  197. };
  198. static const esp_efuse_desc_t WR_DIS_ADC1_CAL_VOL_ATTEN2[] = {
  199. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN2,
  200. };
  201. static const esp_efuse_desc_t WR_DIS_ADC1_CAL_VOL_ATTEN3[] = {
  202. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_CAL_VOL_ATTEN3,
  203. };
  204. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH0[] = {
  205. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH0,
  206. };
  207. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH1[] = {
  208. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH1,
  209. };
  210. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH2[] = {
  211. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH2,
  212. };
  213. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH3[] = {
  214. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH3,
  215. };
  216. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH4[] = {
  217. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH4,
  218. };
  219. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH5[] = {
  220. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH5,
  221. };
  222. static const esp_efuse_desc_t WR_DIS_ADC1_INIT_CODE_ATTEN0_CH6[] = {
  223. {EFUSE_BLK0, 21, 1}, // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH6,
  224. };
  225. static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = {
  226. {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
  227. };
  228. static const esp_efuse_desc_t WR_DIS_CUSTOM_MAC[] = {
  229. {EFUSE_BLK0, 22, 1}, // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC,
  230. };
  231. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = {
  232. {EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
  233. };
  234. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY1[] = {
  235. {EFUSE_BLK0, 24, 1}, // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1,
  236. };
  237. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY2[] = {
  238. {EFUSE_BLK0, 25, 1}, // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2,
  239. };
  240. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY3[] = {
  241. {EFUSE_BLK0, 26, 1}, // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3,
  242. };
  243. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY4[] = {
  244. {EFUSE_BLK0, 27, 1}, // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4,
  245. };
  246. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY5[] = {
  247. {EFUSE_BLK0, 28, 1}, // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5,
  248. };
  249. static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA2[] = {
  250. {EFUSE_BLK0, 29, 1}, // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2,
  251. };
  252. static const esp_efuse_desc_t WR_DIS_USB_EXCHG_PINS[] = {
  253. {EFUSE_BLK0, 30, 1}, // [] wr_dis of USB_EXCHG_PINS,
  254. };
  255. static const esp_efuse_desc_t WR_DIS_VDD_SPI_AS_GPIO[] = {
  256. {EFUSE_BLK0, 30, 1}, // [] wr_dis of VDD_SPI_AS_GPIO,
  257. };
  258. static const esp_efuse_desc_t WR_DIS_SOFT_DIS_JTAG[] = {
  259. {EFUSE_BLK0, 31, 1}, // [] wr_dis of SOFT_DIS_JTAG,
  260. };
  261. static const esp_efuse_desc_t RD_DIS[] = {
  262. {EFUSE_BLK0, 32, 7}, // [] Disable reading from BlOCK4-10,
  263. };
  264. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY0[] = {
  265. {EFUSE_BLK0, 32, 1}, // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0,
  266. };
  267. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY1[] = {
  268. {EFUSE_BLK0, 33, 1}, // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1,
  269. };
  270. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY2[] = {
  271. {EFUSE_BLK0, 34, 1}, // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2,
  272. };
  273. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY3[] = {
  274. {EFUSE_BLK0, 35, 1}, // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3,
  275. };
  276. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY4[] = {
  277. {EFUSE_BLK0, 36, 1}, // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4,
  278. };
  279. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY5[] = {
  280. {EFUSE_BLK0, 37, 1}, // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5,
  281. };
  282. static const esp_efuse_desc_t RD_DIS_BLOCK_SYS_DATA2[] = {
  283. {EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2,
  284. };
  285. static const esp_efuse_desc_t SWAP_UART_SDIO_EN[] = {
  286. {EFUSE_BLK0, 39, 1}, // [] Represents whether pad of uart and sdio is swapped or not. 1: swapped. 0: not swapped,
  287. };
  288. static const esp_efuse_desc_t DIS_ICACHE[] = {
  289. {EFUSE_BLK0, 40, 1}, // [] Represents whether icache is disabled or enabled. 1: disabled. 0: enabled,
  290. };
  291. static const esp_efuse_desc_t DIS_USB_JTAG[] = {
  292. {EFUSE_BLK0, 41, 1}, // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled,
  293. };
  294. static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = {
  295. {EFUSE_BLK0, 42, 1}, // [] Represents whether icache is disabled or enabled in Download mode. 1: disabled. 0: enabled,
  296. };
  297. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG[] = {
  298. {EFUSE_BLK0, 43, 1}, // [] Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled,
  299. };
  300. static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
  301. {EFUSE_BLK0, 44, 1}, // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled,
  302. };
  303. static const esp_efuse_desc_t SPI_DOWNLOAD_MSPI_DIS[] = {
  304. {EFUSE_BLK0, 45, 1}, // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled. 0: enabled,
  305. };
  306. static const esp_efuse_desc_t DIS_TWAI[] = {
  307. {EFUSE_BLK0, 46, 1}, // [DIS_CAN] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled,
  308. };
  309. static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
  310. {EFUSE_BLK0, 47, 1}, // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled,
  311. };
  312. static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
  313. {EFUSE_BLK0, 48, 3}, // [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled,
  314. };
  315. static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
  316. {EFUSE_BLK0, 51, 1}, // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled,
  317. };
  318. static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  319. {EFUSE_BLK0, 52, 1}, // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled,
  320. };
  321. static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
  322. {EFUSE_BLK0, 57, 1}, // [] Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not exchanged,
  323. };
  324. static const esp_efuse_desc_t VDD_SPI_AS_GPIO[] = {
  325. {EFUSE_BLK0, 58, 1}, // [] Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not functioned,
  326. };
  327. static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
  328. {EFUSE_BLK0, 80, 2}, // [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected,
  329. };
  330. static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
  331. {EFUSE_BLK0, 82, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"},
  332. };
  333. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
  334. {EFUSE_BLK0, 85, 1}, // [] Revoke 1st secure boot key,
  335. };
  336. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
  337. {EFUSE_BLK0, 86, 1}, // [] Revoke 2nd secure boot key,
  338. };
  339. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
  340. {EFUSE_BLK0, 87, 1}, // [] Revoke 3rd secure boot key,
  341. };
  342. static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
  343. {EFUSE_BLK0, 88, 4}, // [KEY0_PURPOSE] Represents the purpose of Key0,
  344. };
  345. static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
  346. {EFUSE_BLK0, 92, 4}, // [KEY1_PURPOSE] Represents the purpose of Key1,
  347. };
  348. static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
  349. {EFUSE_BLK0, 96, 4}, // [KEY2_PURPOSE] Represents the purpose of Key2,
  350. };
  351. static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
  352. {EFUSE_BLK0, 100, 4}, // [KEY3_PURPOSE] Represents the purpose of Key3,
  353. };
  354. static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
  355. {EFUSE_BLK0, 104, 4}, // [KEY4_PURPOSE] Represents the purpose of Key4,
  356. };
  357. static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
  358. {EFUSE_BLK0, 108, 4}, // [KEY5_PURPOSE] Represents the purpose of Key5,
  359. };
  360. static const esp_efuse_desc_t SEC_DPA_LEVEL[] = {
  361. {EFUSE_BLK0, 112, 2}, // [DPA_SEC_LEVEL] Represents the spa secure level by configuring the clock random divide mode,
  362. };
  363. static const esp_efuse_desc_t CRYPT_DPA_ENABLE[] = {
  364. {EFUSE_BLK0, 114, 1}, // [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled,
  365. };
  366. static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
  367. {EFUSE_BLK0, 116, 1}, // [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled,
  368. };
  369. static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  370. {EFUSE_BLK0, 117, 1}, // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled,
  371. };
  372. static const esp_efuse_desc_t FLASH_TPUW[] = {
  373. {EFUSE_BLK0, 124, 4}, // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value,
  374. };
  375. static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
  376. {EFUSE_BLK0, 128, 1}, // [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled,
  377. };
  378. static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
  379. {EFUSE_BLK0, 129, 1}, // [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled,
  380. };
  381. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  382. {EFUSE_BLK0, 130, 1}, // [DIS_USB_PRINT] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled,
  383. };
  384. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  385. {EFUSE_BLK0, 132, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled,
  386. };
  387. static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
  388. {EFUSE_BLK0, 133, 1}, // [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled,
  389. };
  390. static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
  391. {EFUSE_BLK0, 134, 2}, // [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"},
  392. };
  393. static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
  394. {EFUSE_BLK0, 141, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced,
  395. };
  396. static const esp_efuse_desc_t SECURE_VERSION[] = {
  397. {EFUSE_BLK0, 142, 16}, // [] Represents the version used by ESP-IDF anti-rollback feature,
  398. };
  399. static const esp_efuse_desc_t SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  400. {EFUSE_BLK0, 158, 1}, // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled,
  401. };
  402. static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
  403. {EFUSE_BLK0, 160, 1}, // [] Disables check of wafer version major,
  404. };
  405. static const esp_efuse_desc_t DISABLE_BLK_VERSION_MAJOR[] = {
  406. {EFUSE_BLK0, 161, 1}, // [] Disables check of blk version major,
  407. };
  408. static const esp_efuse_desc_t MAC[] = {
  409. {EFUSE_BLK1, 40, 8}, // [MAC_FACTORY] MAC address,
  410. {EFUSE_BLK1, 32, 8}, // [MAC_FACTORY] MAC address,
  411. {EFUSE_BLK1, 24, 8}, // [MAC_FACTORY] MAC address,
  412. {EFUSE_BLK1, 16, 8}, // [MAC_FACTORY] MAC address,
  413. {EFUSE_BLK1, 8, 8}, // [MAC_FACTORY] MAC address,
  414. {EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address,
  415. };
  416. static const esp_efuse_desc_t MAC_EXT[] = {
  417. {EFUSE_BLK1, 56, 8}, // [] Stores the extended bits of MAC address,
  418. {EFUSE_BLK1, 48, 8}, // [] Stores the extended bits of MAC address,
  419. };
  420. static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
  421. {EFUSE_BLK1, 114, 4}, // [],
  422. };
  423. static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = {
  424. {EFUSE_BLK1, 118, 2}, // [],
  425. };
  426. static const esp_efuse_desc_t PKG_VERSION[] = {
  427. {EFUSE_BLK1, 120, 3}, // [] Package version,
  428. };
  429. static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
  430. {EFUSE_BLK1, 123, 3}, // [] BLK_VERSION_MINOR of BLOCK2,
  431. };
  432. static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
  433. {EFUSE_BLK1, 126, 2}, // [] BLK_VERSION_MAJOR of BLOCK2,
  434. };
  435. static const esp_efuse_desc_t FLASH_CAP[] = {
  436. {EFUSE_BLK1, 128, 3}, // [],
  437. };
  438. static const esp_efuse_desc_t FLASH_TEMP[] = {
  439. {EFUSE_BLK1, 131, 2}, // [],
  440. };
  441. static const esp_efuse_desc_t FLASH_VENDOR[] = {
  442. {EFUSE_BLK1, 133, 3}, // [],
  443. };
  444. static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
  445. {EFUSE_BLK2, 0, 128}, // [] Optional unique 128-bit ID,
  446. };
  447. static const esp_efuse_desc_t TEMP_CALIB[] = {
  448. {EFUSE_BLK2, 128, 9}, // [] Temperature calibration data,
  449. };
  450. static const esp_efuse_desc_t OCODE[] = {
  451. {EFUSE_BLK2, 137, 8}, // [] ADC OCode,
  452. };
  453. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0[] = {
  454. {EFUSE_BLK2, 145, 10}, // [] ADC1 init code at atten0,
  455. };
  456. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN1[] = {
  457. {EFUSE_BLK2, 155, 10}, // [] ADC1 init code at atten1,
  458. };
  459. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN2[] = {
  460. {EFUSE_BLK2, 165, 10}, // [] ADC1 init code at atten2,
  461. };
  462. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN3[] = {
  463. {EFUSE_BLK2, 175, 10}, // [] ADC1 init code at atten3,
  464. };
  465. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN0[] = {
  466. {EFUSE_BLK2, 185, 10}, // [] ADC1 calibration voltage at atten0,
  467. };
  468. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN1[] = {
  469. {EFUSE_BLK2, 195, 10}, // [] ADC1 calibration voltage at atten1,
  470. };
  471. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN2[] = {
  472. {EFUSE_BLK2, 205, 10}, // [] ADC1 calibration voltage at atten2,
  473. };
  474. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN3[] = {
  475. {EFUSE_BLK2, 215, 10}, // [] ADC1 calibration voltage at atten3,
  476. };
  477. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH0[] = {
  478. {EFUSE_BLK2, 225, 4}, // [] ADC1 init code at atten0 ch0,
  479. };
  480. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH1[] = {
  481. {EFUSE_BLK2, 229, 4}, // [] ADC1 init code at atten0 ch1,
  482. };
  483. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH2[] = {
  484. {EFUSE_BLK2, 233, 4}, // [] ADC1 init code at atten0 ch2,
  485. };
  486. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH3[] = {
  487. {EFUSE_BLK2, 237, 4}, // [] ADC1 init code at atten0 ch3,
  488. };
  489. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH4[] = {
  490. {EFUSE_BLK2, 241, 4}, // [] ADC1 init code at atten0 ch4,
  491. };
  492. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH5[] = {
  493. {EFUSE_BLK2, 245, 4}, // [] ADC1 init code at atten0 ch5,
  494. };
  495. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0_CH6[] = {
  496. {EFUSE_BLK2, 249, 4}, // [] ADC1 init code at atten0 ch6,
  497. };
  498. static const esp_efuse_desc_t USER_DATA[] = {
  499. {EFUSE_BLK3, 0, 256}, // [BLOCK_USR_DATA] User data,
  500. };
  501. static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
  502. {EFUSE_BLK3, 200, 48}, // [MAC_CUSTOM CUSTOM_MAC] Custom MAC,
  503. };
  504. static const esp_efuse_desc_t KEY0[] = {
  505. {EFUSE_BLK4, 0, 256}, // [BLOCK_KEY0] Key0 or user data,
  506. };
  507. static const esp_efuse_desc_t KEY1[] = {
  508. {EFUSE_BLK5, 0, 256}, // [BLOCK_KEY1] Key1 or user data,
  509. };
  510. static const esp_efuse_desc_t KEY2[] = {
  511. {EFUSE_BLK6, 0, 256}, // [BLOCK_KEY2] Key2 or user data,
  512. };
  513. static const esp_efuse_desc_t KEY3[] = {
  514. {EFUSE_BLK7, 0, 256}, // [BLOCK_KEY3] Key3 or user data,
  515. };
  516. static const esp_efuse_desc_t KEY4[] = {
  517. {EFUSE_BLK8, 0, 256}, // [BLOCK_KEY4] Key4 or user data,
  518. };
  519. static const esp_efuse_desc_t KEY5[] = {
  520. {EFUSE_BLK9, 0, 256}, // [BLOCK_KEY5] Key5 or user data,
  521. };
  522. static const esp_efuse_desc_t SYS_DATA_PART2[] = {
  523. {EFUSE_BLK10, 0, 256}, // [BLOCK_SYS_DATA2] System data part 2 (reserved),
  524. };
  525. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = {
  526. &WR_DIS[0], // [] Disable programming of individual eFuses
  527. NULL
  528. };
  529. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
  530. &WR_DIS_RD_DIS[0], // [] wr_dis of RD_DIS
  531. NULL
  532. };
  533. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CRYPT_DPA_ENABLE[] = {
  534. &WR_DIS_CRYPT_DPA_ENABLE[0], // [] wr_dis of CRYPT_DPA_ENABLE
  535. NULL
  536. };
  537. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SWAP_UART_SDIO_EN[] = {
  538. &WR_DIS_SWAP_UART_SDIO_EN[0], // [] wr_dis of SWAP_UART_SDIO_EN
  539. NULL
  540. };
  541. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_ICACHE[] = {
  542. &WR_DIS_DIS_ICACHE[0], // [] wr_dis of DIS_ICACHE
  543. NULL
  544. };
  545. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_JTAG[] = {
  546. &WR_DIS_DIS_USB_JTAG[0], // [] wr_dis of DIS_USB_JTAG
  547. NULL
  548. };
  549. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DOWNLOAD_ICACHE[] = {
  550. &WR_DIS_DIS_DOWNLOAD_ICACHE[0], // [] wr_dis of DIS_DOWNLOAD_ICACHE
  551. NULL
  552. };
  553. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_SERIAL_JTAG[] = {
  554. &WR_DIS_DIS_USB_SERIAL_JTAG[0], // [] wr_dis of DIS_USB_SERIAL_JTAG
  555. NULL
  556. };
  557. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_FORCE_DOWNLOAD[] = {
  558. &WR_DIS_DIS_FORCE_DOWNLOAD[0], // [] wr_dis of DIS_FORCE_DOWNLOAD
  559. NULL
  560. };
  561. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_TWAI[] = {
  562. &WR_DIS_DIS_TWAI[0], // [WR_DIS.DIS_CAN] wr_dis of DIS_TWAI
  563. NULL
  564. };
  565. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_JTAG_SEL_ENABLE[] = {
  566. &WR_DIS_JTAG_SEL_ENABLE[0], // [] wr_dis of JTAG_SEL_ENABLE
  567. NULL
  568. };
  569. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_PAD_JTAG[] = {
  570. &WR_DIS_DIS_PAD_JTAG[0], // [] wr_dis of DIS_PAD_JTAG
  571. NULL
  572. };
  573. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  574. &WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
  575. NULL
  576. };
  577. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WDT_DELAY_SEL[] = {
  578. &WR_DIS_WDT_DELAY_SEL[0], // [] wr_dis of WDT_DELAY_SEL
  579. NULL
  580. };
  581. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  582. &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // [] wr_dis of SPI_BOOT_CRYPT_CNT
  583. NULL
  584. };
  585. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  586. &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE0
  587. NULL
  588. };
  589. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  590. &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE1
  591. NULL
  592. };
  593. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  594. &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE2
  595. NULL
  596. };
  597. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_0[] = {
  598. &WR_DIS_KEY_PURPOSE_0[0], // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
  599. NULL
  600. };
  601. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_1[] = {
  602. &WR_DIS_KEY_PURPOSE_1[0], // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
  603. NULL
  604. };
  605. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_2[] = {
  606. &WR_DIS_KEY_PURPOSE_2[0], // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
  607. NULL
  608. };
  609. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_3[] = {
  610. &WR_DIS_KEY_PURPOSE_3[0], // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
  611. NULL
  612. };
  613. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_4[] = {
  614. &WR_DIS_KEY_PURPOSE_4[0], // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
  615. NULL
  616. };
  617. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_5[] = {
  618. &WR_DIS_KEY_PURPOSE_5[0], // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
  619. NULL
  620. };
  621. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SEC_DPA_LEVEL[] = {
  622. &WR_DIS_SEC_DPA_LEVEL[0], // [WR_DIS.DPA_SEC_LEVEL] wr_dis of SEC_DPA_LEVEL
  623. NULL
  624. };
  625. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
  626. &WR_DIS_SECURE_BOOT_EN[0], // [] wr_dis of SECURE_BOOT_EN
  627. NULL
  628. };
  629. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  630. &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
  631. NULL
  632. };
  633. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_DOWNLOAD_MSPI_DIS[] = {
  634. &WR_DIS_SPI_DOWNLOAD_MSPI_DIS[0], // [] wr_dis of SPI_DOWNLOAD_MSPI_DIS
  635. NULL
  636. };
  637. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TPUW[] = {
  638. &WR_DIS_FLASH_TPUW[0], // [] wr_dis of FLASH_TPUW
  639. NULL
  640. };
  641. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DOWNLOAD_MODE[] = {
  642. &WR_DIS_DIS_DOWNLOAD_MODE[0], // [] wr_dis of DIS_DOWNLOAD_MODE
  643. NULL
  644. };
  645. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_DIRECT_BOOT[] = {
  646. &WR_DIS_DIS_DIRECT_BOOT[0], // [] wr_dis of DIS_DIRECT_BOOT
  647. NULL
  648. };
  649. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  650. &WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [WR_DIS.DIS_USB_PRINT] wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
  651. NULL
  652. };
  653. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  654. &WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
  655. NULL
  656. };
  657. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ENABLE_SECURITY_DOWNLOAD[] = {
  658. &WR_DIS_ENABLE_SECURITY_DOWNLOAD[0], // [] wr_dis of ENABLE_SECURITY_DOWNLOAD
  659. NULL
  660. };
  661. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_UART_PRINT_CONTROL[] = {
  662. &WR_DIS_UART_PRINT_CONTROL[0], // [] wr_dis of UART_PRINT_CONTROL
  663. NULL
  664. };
  665. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FORCE_SEND_RESUME[] = {
  666. &WR_DIS_FORCE_SEND_RESUME[0], // [] wr_dis of FORCE_SEND_RESUME
  667. NULL
  668. };
  669. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_VERSION[] = {
  670. &WR_DIS_SECURE_VERSION[0], // [] wr_dis of SECURE_VERSION
  671. NULL
  672. };
  673. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  674. &WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKE[0], // [] wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
  675. NULL
  676. };
  677. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_WAFER_VERSION_MAJOR[] = {
  678. &WR_DIS_DISABLE_WAFER_VERSION_MAJOR[0], // [] wr_dis of DISABLE_WAFER_VERSION_MAJOR
  679. NULL
  680. };
  681. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_DISABLE_BLK_VERSION_MAJOR[] = {
  682. &WR_DIS_DISABLE_BLK_VERSION_MAJOR[0], // [] wr_dis of DISABLE_BLK_VERSION_MAJOR
  683. NULL
  684. };
  685. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
  686. &WR_DIS_BLK1[0], // [] wr_dis of BLOCK1
  687. NULL
  688. };
  689. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = {
  690. &WR_DIS_MAC[0], // [WR_DIS.MAC_FACTORY] wr_dis of MAC
  691. NULL
  692. };
  693. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
  694. &WR_DIS_MAC_EXT[0], // [] wr_dis of MAC_EXT
  695. NULL
  696. };
  697. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MINOR[] = {
  698. &WR_DIS_WAFER_VERSION_MINOR[0], // [] wr_dis of WAFER_VERSION_MINOR
  699. NULL
  700. };
  701. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_WAFER_VERSION_MAJOR[] = {
  702. &WR_DIS_WAFER_VERSION_MAJOR[0], // [] wr_dis of WAFER_VERSION_MAJOR
  703. NULL
  704. };
  705. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_PKG_VERSION[] = {
  706. &WR_DIS_PKG_VERSION[0], // [] wr_dis of PKG_VERSION
  707. NULL
  708. };
  709. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MINOR[] = {
  710. &WR_DIS_BLK_VERSION_MINOR[0], // [] wr_dis of BLK_VERSION_MINOR
  711. NULL
  712. };
  713. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK_VERSION_MAJOR[] = {
  714. &WR_DIS_BLK_VERSION_MAJOR[0], // [] wr_dis of BLK_VERSION_MAJOR
  715. NULL
  716. };
  717. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_CAP[] = {
  718. &WR_DIS_FLASH_CAP[0], // [] wr_dis of FLASH_CAP
  719. NULL
  720. };
  721. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_TEMP[] = {
  722. &WR_DIS_FLASH_TEMP[0], // [] wr_dis of FLASH_TEMP
  723. NULL
  724. };
  725. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_FLASH_VENDOR[] = {
  726. &WR_DIS_FLASH_VENDOR[0], // [] wr_dis of FLASH_VENDOR
  727. NULL
  728. };
  729. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
  730. &WR_DIS_SYS_DATA_PART1[0], // [] wr_dis of BLOCK2
  731. NULL
  732. };
  733. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OPTIONAL_UNIQUE_ID[] = {
  734. &WR_DIS_OPTIONAL_UNIQUE_ID[0], // [] wr_dis of OPTIONAL_UNIQUE_ID
  735. NULL
  736. };
  737. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_TEMP_CALIB[] = {
  738. &WR_DIS_TEMP_CALIB[0], // [] wr_dis of TEMP_CALIB
  739. NULL
  740. };
  741. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_OCODE[] = {
  742. &WR_DIS_OCODE[0], // [] wr_dis of OCODE
  743. NULL
  744. };
  745. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0[] = {
  746. &WR_DIS_ADC1_INIT_CODE_ATTEN0[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0
  747. NULL
  748. };
  749. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN1[] = {
  750. &WR_DIS_ADC1_INIT_CODE_ATTEN1[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN1
  751. NULL
  752. };
  753. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN2[] = {
  754. &WR_DIS_ADC1_INIT_CODE_ATTEN2[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN2
  755. NULL
  756. };
  757. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN3[] = {
  758. &WR_DIS_ADC1_INIT_CODE_ATTEN3[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN3
  759. NULL
  760. };
  761. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CAL_VOL_ATTEN0[] = {
  762. &WR_DIS_ADC1_CAL_VOL_ATTEN0[0], // [] wr_dis of ADC1_CAL_VOL_ATTEN0
  763. NULL
  764. };
  765. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CAL_VOL_ATTEN1[] = {
  766. &WR_DIS_ADC1_CAL_VOL_ATTEN1[0], // [] wr_dis of ADC1_CAL_VOL_ATTEN1
  767. NULL
  768. };
  769. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CAL_VOL_ATTEN2[] = {
  770. &WR_DIS_ADC1_CAL_VOL_ATTEN2[0], // [] wr_dis of ADC1_CAL_VOL_ATTEN2
  771. NULL
  772. };
  773. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_CAL_VOL_ATTEN3[] = {
  774. &WR_DIS_ADC1_CAL_VOL_ATTEN3[0], // [] wr_dis of ADC1_CAL_VOL_ATTEN3
  775. NULL
  776. };
  777. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH0[] = {
  778. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH0[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH0
  779. NULL
  780. };
  781. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH1[] = {
  782. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH1[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH1
  783. NULL
  784. };
  785. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH2[] = {
  786. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH2[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH2
  787. NULL
  788. };
  789. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH3[] = {
  790. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH3[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH3
  791. NULL
  792. };
  793. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH4[] = {
  794. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH4[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH4
  795. NULL
  796. };
  797. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH5[] = {
  798. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH5[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH5
  799. NULL
  800. };
  801. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_ADC1_INIT_CODE_ATTEN0_CH6[] = {
  802. &WR_DIS_ADC1_INIT_CODE_ATTEN0_CH6[0], // [] wr_dis of ADC1_INIT_CODE_ATTEN0_CH6
  803. NULL
  804. };
  805. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = {
  806. &WR_DIS_BLOCK_USR_DATA[0], // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
  807. NULL
  808. };
  809. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_CUSTOM_MAC[] = {
  810. &WR_DIS_CUSTOM_MAC[0], // [WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
  811. NULL
  812. };
  813. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = {
  814. &WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
  815. NULL
  816. };
  817. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY1[] = {
  818. &WR_DIS_BLOCK_KEY1[0], // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
  819. NULL
  820. };
  821. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY2[] = {
  822. &WR_DIS_BLOCK_KEY2[0], // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
  823. NULL
  824. };
  825. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY3[] = {
  826. &WR_DIS_BLOCK_KEY3[0], // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
  827. NULL
  828. };
  829. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY4[] = {
  830. &WR_DIS_BLOCK_KEY4[0], // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
  831. NULL
  832. };
  833. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY5[] = {
  834. &WR_DIS_BLOCK_KEY5[0], // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
  835. NULL
  836. };
  837. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA2[] = {
  838. &WR_DIS_BLOCK_SYS_DATA2[0], // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
  839. NULL
  840. };
  841. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USB_EXCHG_PINS[] = {
  842. &WR_DIS_USB_EXCHG_PINS[0], // [] wr_dis of USB_EXCHG_PINS
  843. NULL
  844. };
  845. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_VDD_SPI_AS_GPIO[] = {
  846. &WR_DIS_VDD_SPI_AS_GPIO[0], // [] wr_dis of VDD_SPI_AS_GPIO
  847. NULL
  848. };
  849. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SOFT_DIS_JTAG[] = {
  850. &WR_DIS_SOFT_DIS_JTAG[0], // [] wr_dis of SOFT_DIS_JTAG
  851. NULL
  852. };
  853. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = {
  854. &RD_DIS[0], // [] Disable reading from BlOCK4-10
  855. NULL
  856. };
  857. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY0[] = {
  858. &RD_DIS_BLOCK_KEY0[0], // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
  859. NULL
  860. };
  861. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY1[] = {
  862. &RD_DIS_BLOCK_KEY1[0], // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
  863. NULL
  864. };
  865. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY2[] = {
  866. &RD_DIS_BLOCK_KEY2[0], // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
  867. NULL
  868. };
  869. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY3[] = {
  870. &RD_DIS_BLOCK_KEY3[0], // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
  871. NULL
  872. };
  873. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY4[] = {
  874. &RD_DIS_BLOCK_KEY4[0], // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
  875. NULL
  876. };
  877. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY5[] = {
  878. &RD_DIS_BLOCK_KEY5[0], // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
  879. NULL
  880. };
  881. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2[] = {
  882. &RD_DIS_BLOCK_SYS_DATA2[0], // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
  883. NULL
  884. };
  885. const esp_efuse_desc_t* ESP_EFUSE_SWAP_UART_SDIO_EN[] = {
  886. &SWAP_UART_SDIO_EN[0], // [] Represents whether pad of uart and sdio is swapped or not. 1: swapped. 0: not swapped
  887. NULL
  888. };
  889. const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
  890. &DIS_ICACHE[0], // [] Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
  891. NULL
  892. };
  893. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
  894. &DIS_USB_JTAG[0], // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled
  895. NULL
  896. };
  897. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = {
  898. &DIS_DOWNLOAD_ICACHE[0], // [] Represents whether icache is disabled or enabled in Download mode. 1: disabled. 0: enabled
  899. NULL
  900. };
  901. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG[] = {
  902. &DIS_USB_SERIAL_JTAG[0], // [] Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
  903. NULL
  904. };
  905. const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
  906. &DIS_FORCE_DOWNLOAD[0], // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled
  907. NULL
  908. };
  909. const esp_efuse_desc_t* ESP_EFUSE_SPI_DOWNLOAD_MSPI_DIS[] = {
  910. &SPI_DOWNLOAD_MSPI_DIS[0], // [] Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled. 0: enabled
  911. NULL
  912. };
  913. const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[] = {
  914. &DIS_TWAI[0], // [DIS_CAN] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled
  915. NULL
  916. };
  917. const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
  918. &JTAG_SEL_ENABLE[0], // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled
  919. NULL
  920. };
  921. const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
  922. &SOFT_DIS_JTAG[0], // [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled
  923. NULL
  924. };
  925. const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
  926. &DIS_PAD_JTAG[0], // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled
  927. NULL
  928. };
  929. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  930. &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled
  931. NULL
  932. };
  933. const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
  934. &USB_EXCHG_PINS[0], // [] Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not exchanged
  935. NULL
  936. };
  937. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[] = {
  938. &VDD_SPI_AS_GPIO[0], // [] Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not functioned
  939. NULL
  940. };
  941. const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
  942. &WDT_DELAY_SEL[0], // [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected
  943. NULL
  944. };
  945. const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
  946. &SPI_BOOT_CRYPT_CNT[0], // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
  947. NULL
  948. };
  949. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
  950. &SECURE_BOOT_KEY_REVOKE0[0], // [] Revoke 1st secure boot key
  951. NULL
  952. };
  953. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
  954. &SECURE_BOOT_KEY_REVOKE1[0], // [] Revoke 2nd secure boot key
  955. NULL
  956. };
  957. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
  958. &SECURE_BOOT_KEY_REVOKE2[0], // [] Revoke 3rd secure boot key
  959. NULL
  960. };
  961. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
  962. &KEY_PURPOSE_0[0], // [KEY0_PURPOSE] Represents the purpose of Key0
  963. NULL
  964. };
  965. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
  966. &KEY_PURPOSE_1[0], // [KEY1_PURPOSE] Represents the purpose of Key1
  967. NULL
  968. };
  969. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
  970. &KEY_PURPOSE_2[0], // [KEY2_PURPOSE] Represents the purpose of Key2
  971. NULL
  972. };
  973. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
  974. &KEY_PURPOSE_3[0], // [KEY3_PURPOSE] Represents the purpose of Key3
  975. NULL
  976. };
  977. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
  978. &KEY_PURPOSE_4[0], // [KEY4_PURPOSE] Represents the purpose of Key4
  979. NULL
  980. };
  981. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
  982. &KEY_PURPOSE_5[0], // [KEY5_PURPOSE] Represents the purpose of Key5
  983. NULL
  984. };
  985. const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[] = {
  986. &SEC_DPA_LEVEL[0], // [DPA_SEC_LEVEL] Represents the spa secure level by configuring the clock random divide mode
  987. NULL
  988. };
  989. const esp_efuse_desc_t* ESP_EFUSE_CRYPT_DPA_ENABLE[] = {
  990. &CRYPT_DPA_ENABLE[0], // [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
  991. NULL
  992. };
  993. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
  994. &SECURE_BOOT_EN[0], // [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled
  995. NULL
  996. };
  997. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  998. &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
  999. NULL
  1000. };
  1001. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
  1002. &FLASH_TPUW[0], // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
  1003. NULL
  1004. };
  1005. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
  1006. &DIS_DOWNLOAD_MODE[0], // [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled
  1007. NULL
  1008. };
  1009. const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
  1010. &DIS_DIRECT_BOOT[0], // [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled
  1011. NULL
  1012. };
  1013. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  1014. &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [DIS_USB_PRINT] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
  1015. NULL
  1016. };
  1017. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  1018. &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled
  1019. NULL
  1020. };
  1021. const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
  1022. &ENABLE_SECURITY_DOWNLOAD[0], // [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled
  1023. NULL
  1024. };
  1025. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
  1026. &UART_PRINT_CONTROL[0], // [] Set the default UARTboot message output mode {0: "Enable"; 1: "Enable when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3: "Disable"}
  1027. NULL
  1028. };
  1029. const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
  1030. &FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced
  1031. NULL
  1032. };
  1033. const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
  1034. &SECURE_VERSION[0], // [] Represents the version used by ESP-IDF anti-rollback feature
  1035. NULL
  1036. };
  1037. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  1038. &SECURE_BOOT_DISABLE_FAST_WAKE[0], // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled
  1039. NULL
  1040. };
  1041. const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
  1042. &DISABLE_WAFER_VERSION_MAJOR[0], // [] Disables check of wafer version major
  1043. NULL
  1044. };
  1045. const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[] = {
  1046. &DISABLE_BLK_VERSION_MAJOR[0], // [] Disables check of blk version major
  1047. NULL
  1048. };
  1049. const esp_efuse_desc_t* ESP_EFUSE_MAC[] = {
  1050. &MAC[0], // [MAC_FACTORY] MAC address
  1051. &MAC[1], // [MAC_FACTORY] MAC address
  1052. &MAC[2], // [MAC_FACTORY] MAC address
  1053. &MAC[3], // [MAC_FACTORY] MAC address
  1054. &MAC[4], // [MAC_FACTORY] MAC address
  1055. &MAC[5], // [MAC_FACTORY] MAC address
  1056. NULL
  1057. };
  1058. const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
  1059. &MAC_EXT[0], // [] Stores the extended bits of MAC address
  1060. &MAC_EXT[1], // [] Stores the extended bits of MAC address
  1061. NULL
  1062. };
  1063. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
  1064. &WAFER_VERSION_MINOR[0], // []
  1065. NULL
  1066. };
  1067. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = {
  1068. &WAFER_VERSION_MAJOR[0], // []
  1069. NULL
  1070. };
  1071. const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
  1072. &PKG_VERSION[0], // [] Package version
  1073. NULL
  1074. };
  1075. const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
  1076. &BLK_VERSION_MINOR[0], // [] BLK_VERSION_MINOR of BLOCK2
  1077. NULL
  1078. };
  1079. const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[] = {
  1080. &BLK_VERSION_MAJOR[0], // [] BLK_VERSION_MAJOR of BLOCK2
  1081. NULL
  1082. };
  1083. const esp_efuse_desc_t* ESP_EFUSE_FLASH_CAP[] = {
  1084. &FLASH_CAP[0], // []
  1085. NULL
  1086. };
  1087. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TEMP[] = {
  1088. &FLASH_TEMP[0], // []
  1089. NULL
  1090. };
  1091. const esp_efuse_desc_t* ESP_EFUSE_FLASH_VENDOR[] = {
  1092. &FLASH_VENDOR[0], // []
  1093. NULL
  1094. };
  1095. const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
  1096. &OPTIONAL_UNIQUE_ID[0], // [] Optional unique 128-bit ID
  1097. NULL
  1098. };
  1099. const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[] = {
  1100. &TEMP_CALIB[0], // [] Temperature calibration data
  1101. NULL
  1102. };
  1103. const esp_efuse_desc_t* ESP_EFUSE_OCODE[] = {
  1104. &OCODE[0], // [] ADC OCode
  1105. NULL
  1106. };
  1107. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[] = {
  1108. &ADC1_INIT_CODE_ATTEN0[0], // [] ADC1 init code at atten0
  1109. NULL
  1110. };
  1111. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN1[] = {
  1112. &ADC1_INIT_CODE_ATTEN1[0], // [] ADC1 init code at atten1
  1113. NULL
  1114. };
  1115. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN2[] = {
  1116. &ADC1_INIT_CODE_ATTEN2[0], // [] ADC1 init code at atten2
  1117. NULL
  1118. };
  1119. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[] = {
  1120. &ADC1_INIT_CODE_ATTEN3[0], // [] ADC1 init code at atten3
  1121. NULL
  1122. };
  1123. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[] = {
  1124. &ADC1_CAL_VOL_ATTEN0[0], // [] ADC1 calibration voltage at atten0
  1125. NULL
  1126. };
  1127. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN1[] = {
  1128. &ADC1_CAL_VOL_ATTEN1[0], // [] ADC1 calibration voltage at atten1
  1129. NULL
  1130. };
  1131. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN2[] = {
  1132. &ADC1_CAL_VOL_ATTEN2[0], // [] ADC1 calibration voltage at atten2
  1133. NULL
  1134. };
  1135. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[] = {
  1136. &ADC1_CAL_VOL_ATTEN3[0], // [] ADC1 calibration voltage at atten3
  1137. NULL
  1138. };
  1139. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH0[] = {
  1140. &ADC1_INIT_CODE_ATTEN0_CH0[0], // [] ADC1 init code at atten0 ch0
  1141. NULL
  1142. };
  1143. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH1[] = {
  1144. &ADC1_INIT_CODE_ATTEN0_CH1[0], // [] ADC1 init code at atten0 ch1
  1145. NULL
  1146. };
  1147. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH2[] = {
  1148. &ADC1_INIT_CODE_ATTEN0_CH2[0], // [] ADC1 init code at atten0 ch2
  1149. NULL
  1150. };
  1151. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH3[] = {
  1152. &ADC1_INIT_CODE_ATTEN0_CH3[0], // [] ADC1 init code at atten0 ch3
  1153. NULL
  1154. };
  1155. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH4[] = {
  1156. &ADC1_INIT_CODE_ATTEN0_CH4[0], // [] ADC1 init code at atten0 ch4
  1157. NULL
  1158. };
  1159. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH5[] = {
  1160. &ADC1_INIT_CODE_ATTEN0_CH5[0], // [] ADC1 init code at atten0 ch5
  1161. NULL
  1162. };
  1163. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0_CH6[] = {
  1164. &ADC1_INIT_CODE_ATTEN0_CH6[0], // [] ADC1 init code at atten0 ch6
  1165. NULL
  1166. };
  1167. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
  1168. &USER_DATA[0], // [BLOCK_USR_DATA] User data
  1169. NULL
  1170. };
  1171. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
  1172. &USER_DATA_MAC_CUSTOM[0], // [MAC_CUSTOM CUSTOM_MAC] Custom MAC
  1173. NULL
  1174. };
  1175. const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
  1176. &KEY0[0], // [BLOCK_KEY0] Key0 or user data
  1177. NULL
  1178. };
  1179. const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
  1180. &KEY1[0], // [BLOCK_KEY1] Key1 or user data
  1181. NULL
  1182. };
  1183. const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
  1184. &KEY2[0], // [BLOCK_KEY2] Key2 or user data
  1185. NULL
  1186. };
  1187. const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
  1188. &KEY3[0], // [BLOCK_KEY3] Key3 or user data
  1189. NULL
  1190. };
  1191. const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
  1192. &KEY4[0], // [BLOCK_KEY4] Key4 or user data
  1193. NULL
  1194. };
  1195. const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
  1196. &KEY5[0], // [BLOCK_KEY5] Key5 or user data
  1197. NULL
  1198. };
  1199. const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
  1200. &SYS_DATA_PART2[0], // [BLOCK_SYS_DATA2] System data part 2 (reserved)
  1201. NULL
  1202. };