esp_efuse_table.c 34 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2017-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_efuse.h"
  8. #include <assert.h>
  9. #include "esp_efuse_table.h"
  10. // md5_digest_table 78dff63df528392f0f37f4880b83c6db
  11. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
  12. // If you want to change some fields, you need to change esp_efuse_table.csv file
  13. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
  14. // To show efuse_table run the command 'show_efuse_table'.
  15. static const esp_efuse_desc_t WR_DIS[] = {
  16. {EFUSE_BLK0, 0, 32}, // [] Disable programming of individual eFuses,
  17. };
  18. static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
  19. {EFUSE_BLK0, 0, 1}, // [] wr_dis of RD_DIS,
  20. };
  21. static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  22. {EFUSE_BLK0, 4, 1}, // [] wr_dis of SPI_BOOT_CRYPT_CNT,
  23. };
  24. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  25. {EFUSE_BLK0, 5, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE0,
  26. };
  27. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  28. {EFUSE_BLK0, 6, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE1,
  29. };
  30. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  31. {EFUSE_BLK0, 7, 1}, // [] wr_dis of SECURE_BOOT_KEY_REVOKE2,
  32. };
  33. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_0[] = {
  34. {EFUSE_BLK0, 8, 1}, // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0,
  35. };
  36. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_1[] = {
  37. {EFUSE_BLK0, 9, 1}, // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1,
  38. };
  39. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_2[] = {
  40. {EFUSE_BLK0, 10, 1}, // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2,
  41. };
  42. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_3[] = {
  43. {EFUSE_BLK0, 11, 1}, // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3,
  44. };
  45. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_4[] = {
  46. {EFUSE_BLK0, 12, 1}, // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4,
  47. };
  48. static const esp_efuse_desc_t WR_DIS_KEY_PURPOSE_5[] = {
  49. {EFUSE_BLK0, 13, 1}, // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5,
  50. };
  51. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
  52. {EFUSE_BLK0, 15, 1}, // [] wr_dis of SECURE_BOOT_EN,
  53. };
  54. static const esp_efuse_desc_t WR_DIS_BLK1[] = {
  55. {EFUSE_BLK0, 20, 1}, // [] wr_dis of BLOCK1,
  56. };
  57. static const esp_efuse_desc_t WR_DIS_MAC[] = {
  58. {EFUSE_BLK0, 20, 1}, // [WR_DIS.MAC_FACTORY] wr_dis of MAC,
  59. };
  60. static const esp_efuse_desc_t WR_DIS_MAC_EXT[] = {
  61. {EFUSE_BLK0, 20, 1}, // [] wr_dis of MAC_EXT,
  62. };
  63. static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA1[] = {
  64. {EFUSE_BLK0, 21, 1}, // [WR_DIS.SYS_DATA_PART1] wr_dis of BLOCK_SYS_DATA1,
  65. };
  66. static const esp_efuse_desc_t WR_DIS_BLOCK_USR_DATA[] = {
  67. {EFUSE_BLK0, 22, 1}, // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA,
  68. };
  69. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY0[] = {
  70. {EFUSE_BLK0, 23, 1}, // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0,
  71. };
  72. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY1[] = {
  73. {EFUSE_BLK0, 24, 1}, // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1,
  74. };
  75. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY2[] = {
  76. {EFUSE_BLK0, 25, 1}, // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2,
  77. };
  78. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY3[] = {
  79. {EFUSE_BLK0, 26, 1}, // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3,
  80. };
  81. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY4[] = {
  82. {EFUSE_BLK0, 27, 1}, // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4,
  83. };
  84. static const esp_efuse_desc_t WR_DIS_BLOCK_KEY5[] = {
  85. {EFUSE_BLK0, 28, 1}, // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5,
  86. };
  87. static const esp_efuse_desc_t WR_DIS_BLOCK_SYS_DATA2[] = {
  88. {EFUSE_BLK0, 29, 1}, // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2,
  89. };
  90. static const esp_efuse_desc_t RD_DIS[] = {
  91. {EFUSE_BLK0, 32, 7}, // [] Disable reading from BlOCK4-10,
  92. };
  93. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY0[] = {
  94. {EFUSE_BLK0, 32, 1}, // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0,
  95. };
  96. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY1[] = {
  97. {EFUSE_BLK0, 33, 1}, // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1,
  98. };
  99. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY2[] = {
  100. {EFUSE_BLK0, 34, 1}, // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2,
  101. };
  102. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY3[] = {
  103. {EFUSE_BLK0, 35, 1}, // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3,
  104. };
  105. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY4[] = {
  106. {EFUSE_BLK0, 36, 1}, // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4,
  107. };
  108. static const esp_efuse_desc_t RD_DIS_BLOCK_KEY5[] = {
  109. {EFUSE_BLK0, 37, 1}, // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5,
  110. };
  111. static const esp_efuse_desc_t RD_DIS_BLOCK_SYS_DATA2[] = {
  112. {EFUSE_BLK0, 38, 1}, // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2,
  113. };
  114. static const esp_efuse_desc_t USB_DEVICE_EXCHG_PINS[] = {
  115. {EFUSE_BLK0, 39, 1}, // [] Enable usb device exchange pins of D+ and D-,
  116. };
  117. static const esp_efuse_desc_t USB_OTG11_EXCHG_PINS[] = {
  118. {EFUSE_BLK0, 40, 1}, // [] Enable usb otg11 exchange pins of D+ and D-,
  119. };
  120. static const esp_efuse_desc_t DIS_USB_JTAG[] = {
  121. {EFUSE_BLK0, 41, 1}, // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled,
  122. };
  123. static const esp_efuse_desc_t POWERGLITCH_EN[] = {
  124. {EFUSE_BLK0, 42, 1}, // [] Represents whether power glitch function is enabled. 1: enabled. 0: disabled,
  125. };
  126. static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
  127. {EFUSE_BLK0, 44, 1}, // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled,
  128. };
  129. static const esp_efuse_desc_t SPI_DOWNLOAD_MSPI_DIS[] = {
  130. {EFUSE_BLK0, 45, 1}, // [] Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download,
  131. };
  132. static const esp_efuse_desc_t DIS_TWAI[] = {
  133. {EFUSE_BLK0, 46, 1}, // [] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled,
  134. };
  135. static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
  136. {EFUSE_BLK0, 47, 1}, // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled,
  137. };
  138. static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
  139. {EFUSE_BLK0, 48, 3}, // [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled,
  140. };
  141. static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
  142. {EFUSE_BLK0, 51, 1}, // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled,
  143. };
  144. static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  145. {EFUSE_BLK0, 52, 1}, // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled,
  146. };
  147. static const esp_efuse_desc_t USB_PHY_SEL[] = {
  148. {EFUSE_BLK0, 57, 1}, // [] TBD,
  149. };
  150. static const esp_efuse_desc_t KM_HUK_GEN_STATE_LOW[] = {
  151. {EFUSE_BLK0, 58, 6}, // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid,
  152. };
  153. static const esp_efuse_desc_t KM_HUK_GEN_STATE_HIGH[] = {
  154. {EFUSE_BLK0, 64, 3}, // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid,
  155. };
  156. static const esp_efuse_desc_t KM_RND_SWITCH_CYCLE[] = {
  157. {EFUSE_BLK0, 67, 2}, // [] Set bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles,
  158. };
  159. static const esp_efuse_desc_t KM_DEPLOY_ONLY_ONCE[] = {
  160. {EFUSE_BLK0, 69, 4}, // [] Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds,
  161. };
  162. static const esp_efuse_desc_t FORCE_USE_KEY_MANAGER_KEY[] = {
  163. {EFUSE_BLK0, 73, 4}, // [] Set each bit to control whether corresponding key must come from key manager.. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds,
  164. };
  165. static const esp_efuse_desc_t FORCE_DISABLE_SW_INIT_KEY[] = {
  166. {EFUSE_BLK0, 77, 1}, // [] Set this bit to disable software written init key; and force use efuse_init_key,
  167. };
  168. static const esp_efuse_desc_t XTS_KEY_LENGTH_256[] = {
  169. {EFUSE_BLK0, 78, 1}, // [] Set this bit to configure flash encryption use xts-128 key; else use xts-256 key,
  170. };
  171. static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
  172. {EFUSE_BLK0, 80, 2}, // [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected,
  173. };
  174. static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
  175. {EFUSE_BLK0, 82, 3}, // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"},
  176. };
  177. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
  178. {EFUSE_BLK0, 85, 1}, // [] Revoke 1st secure boot key,
  179. };
  180. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
  181. {EFUSE_BLK0, 86, 1}, // [] Revoke 2nd secure boot key,
  182. };
  183. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
  184. {EFUSE_BLK0, 87, 1}, // [] Revoke 3rd secure boot key,
  185. };
  186. static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
  187. {EFUSE_BLK0, 88, 4}, // [KEY0_PURPOSE] Represents the purpose of Key0,
  188. };
  189. static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
  190. {EFUSE_BLK0, 92, 4}, // [KEY1_PURPOSE] Represents the purpose of Key1,
  191. };
  192. static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
  193. {EFUSE_BLK0, 96, 4}, // [KEY2_PURPOSE] Represents the purpose of Key2,
  194. };
  195. static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
  196. {EFUSE_BLK0, 100, 4}, // [KEY3_PURPOSE] Represents the purpose of Key3,
  197. };
  198. static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
  199. {EFUSE_BLK0, 104, 4}, // [KEY4_PURPOSE] Represents the purpose of Key4,
  200. };
  201. static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
  202. {EFUSE_BLK0, 108, 4}, // [KEY5_PURPOSE] Represents the purpose of Key5,
  203. };
  204. static const esp_efuse_desc_t SEC_DPA_LEVEL[] = {
  205. {EFUSE_BLK0, 112, 2}, // [] Represents the spa secure level by configuring the clock random divide mode,
  206. };
  207. static const esp_efuse_desc_t ECDSA_ENABLE_SOFT_K[] = {
  208. {EFUSE_BLK0, 114, 1}, // [] Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used,
  209. };
  210. static const esp_efuse_desc_t CRYPT_DPA_ENABLE[] = {
  211. {EFUSE_BLK0, 115, 1}, // [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled,
  212. };
  213. static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
  214. {EFUSE_BLK0, 116, 1}, // [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled,
  215. };
  216. static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  217. {EFUSE_BLK0, 117, 1}, // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled,
  218. };
  219. static const esp_efuse_desc_t FLASH_TYPE[] = {
  220. {EFUSE_BLK0, 119, 1}, // [] The type of interfaced flash. 0: four data lines; 1: eight data lines,
  221. };
  222. static const esp_efuse_desc_t FLASH_PAGE_SIZE[] = {
  223. {EFUSE_BLK0, 120, 2}, // [] Set flash page size,
  224. };
  225. static const esp_efuse_desc_t FLASH_ECC_EN[] = {
  226. {EFUSE_BLK0, 122, 1}, // [] Set this bit to enable ecc for flash boot,
  227. };
  228. static const esp_efuse_desc_t DIS_USB_OTG_DOWNLOAD_MODE[] = {
  229. {EFUSE_BLK0, 123, 1}, // [] Set this bit to disable download via USB-OTG,
  230. };
  231. static const esp_efuse_desc_t FLASH_TPUW[] = {
  232. {EFUSE_BLK0, 124, 4}, // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value,
  233. };
  234. static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
  235. {EFUSE_BLK0, 128, 1}, // [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled,
  236. };
  237. static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
  238. {EFUSE_BLK0, 129, 1}, // [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled,
  239. };
  240. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  241. {EFUSE_BLK0, 130, 1}, // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled,
  242. };
  243. static const esp_efuse_desc_t LOCK_KM_KEY[] = {
  244. {EFUSE_BLK0, 131, 1}, // [] TBD,
  245. };
  246. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  247. {EFUSE_BLK0, 132, 1}, // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled,
  248. };
  249. static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
  250. {EFUSE_BLK0, 133, 1}, // [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled,
  251. };
  252. static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
  253. {EFUSE_BLK0, 134, 2}, // [] Represents the type of UART printing. 00: force enable printing. 01: enable printing when GPIO8 is reset at low level. 10: enable printing when GPIO8 is reset at high level. 11: force disable printing,
  254. };
  255. static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
  256. {EFUSE_BLK0, 136, 1}, // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced,
  257. };
  258. static const esp_efuse_desc_t SECURE_VERSION[] = {
  259. {EFUSE_BLK0, 137, 16}, // [] Represents the version used by ESP-IDF anti-rollback feature,
  260. };
  261. static const esp_efuse_desc_t SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  262. {EFUSE_BLK0, 153, 1}, // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled,
  263. };
  264. static const esp_efuse_desc_t HYS_EN_PAD[] = {
  265. {EFUSE_BLK0, 154, 1}, // [] Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled. 0:disabled,
  266. };
  267. static const esp_efuse_desc_t DCDC_VSET[] = {
  268. {EFUSE_BLK0, 155, 5}, // [] Set the dcdc voltage default,
  269. };
  270. static const esp_efuse_desc_t PXA0_TIEH_SEL_0[] = {
  271. {EFUSE_BLK0, 160, 2}, // [] TBD,
  272. };
  273. static const esp_efuse_desc_t PXA0_TIEH_SEL_1[] = {
  274. {EFUSE_BLK0, 162, 2}, // [] TBD,
  275. };
  276. static const esp_efuse_desc_t PXA0_TIEH_SEL_2[] = {
  277. {EFUSE_BLK0, 164, 2}, // [] TBD,
  278. };
  279. static const esp_efuse_desc_t PXA0_TIEH_SEL_3[] = {
  280. {EFUSE_BLK0, 166, 2}, // [] TBD,
  281. };
  282. static const esp_efuse_desc_t KM_DISABLE_DEPLOY_MODE[] = {
  283. {EFUSE_BLK0, 168, 4}, // [] TBD,
  284. };
  285. static const esp_efuse_desc_t HP_PWR_SRC_SEL[] = {
  286. {EFUSE_BLK0, 178, 1}, // [] HP system power source select. 0:LDO. 1: DCDC,
  287. };
  288. static const esp_efuse_desc_t DCDC_VSET_EN[] = {
  289. {EFUSE_BLK0, 179, 1}, // [] Select dcdc vset use efuse_dcdc_vset,
  290. };
  291. static const esp_efuse_desc_t DIS_WDT[] = {
  292. {EFUSE_BLK0, 180, 1}, // [] Set this bit to disable watch dog,
  293. };
  294. static const esp_efuse_desc_t DIS_SWD[] = {
  295. {EFUSE_BLK0, 181, 1}, // [] Set this bit to disable super-watchdog,
  296. };
  297. static const esp_efuse_desc_t MAC[] = {
  298. {EFUSE_BLK1, 40, 8}, // [MAC_FACTORY] MAC address,
  299. {EFUSE_BLK1, 32, 8}, // [MAC_FACTORY] MAC address,
  300. {EFUSE_BLK1, 24, 8}, // [MAC_FACTORY] MAC address,
  301. {EFUSE_BLK1, 16, 8}, // [MAC_FACTORY] MAC address,
  302. {EFUSE_BLK1, 8, 8}, // [MAC_FACTORY] MAC address,
  303. {EFUSE_BLK1, 0, 8}, // [MAC_FACTORY] MAC address,
  304. };
  305. static const esp_efuse_desc_t MAC_EXT[] = {
  306. {EFUSE_BLK1, 48, 8}, // [] Stores the extended bits of MAC address [0],
  307. {EFUSE_BLK1, 56, 8}, // [] Stores the extended bits of MAC address [1],
  308. };
  309. static const esp_efuse_desc_t BLOCK_SYS_DATA1[] = {
  310. {EFUSE_BLK2, 0, 256}, // [SYS_DATA_PART1] System data part 1,
  311. };
  312. static const esp_efuse_desc_t USER_DATA[] = {
  313. {EFUSE_BLK3, 0, 256}, // [BLOCK_USR_DATA] User data,
  314. };
  315. static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
  316. {EFUSE_BLK3, 200, 48}, // [MAC_CUSTOM CUSTOM_MAC] Custom MAC (TODO,
  317. };
  318. static const esp_efuse_desc_t KEY0[] = {
  319. {EFUSE_BLK4, 0, 256}, // [BLOCK_KEY0] Key0 or user data,
  320. };
  321. static const esp_efuse_desc_t KEY1[] = {
  322. {EFUSE_BLK5, 0, 256}, // [BLOCK_KEY1] Key1 or user data,
  323. };
  324. static const esp_efuse_desc_t KEY2[] = {
  325. {EFUSE_BLK6, 0, 256}, // [BLOCK_KEY2] Key2 or user data,
  326. };
  327. static const esp_efuse_desc_t KEY3[] = {
  328. {EFUSE_BLK7, 0, 256}, // [BLOCK_KEY3] Key3 or user data,
  329. };
  330. static const esp_efuse_desc_t KEY4[] = {
  331. {EFUSE_BLK8, 0, 256}, // [BLOCK_KEY4] Key4 or user data,
  332. };
  333. static const esp_efuse_desc_t KEY5[] = {
  334. {EFUSE_BLK9, 0, 256}, // [BLOCK_KEY5] Key5 or user data,
  335. };
  336. static const esp_efuse_desc_t SYS_DATA_PART2[] = {
  337. {EFUSE_BLK10, 0, 256}, // [BLOCK_SYS_DATA2] System data part 2 (reserved),
  338. };
  339. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = {
  340. &WR_DIS[0], // [] Disable programming of individual eFuses
  341. NULL
  342. };
  343. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
  344. &WR_DIS_RD_DIS[0], // [] wr_dis of RD_DIS
  345. NULL
  346. };
  347. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  348. &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // [] wr_dis of SPI_BOOT_CRYPT_CNT
  349. NULL
  350. };
  351. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  352. &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE0
  353. NULL
  354. };
  355. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  356. &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE1
  357. NULL
  358. };
  359. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  360. &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // [] wr_dis of SECURE_BOOT_KEY_REVOKE2
  361. NULL
  362. };
  363. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_0[] = {
  364. &WR_DIS_KEY_PURPOSE_0[0], // [WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
  365. NULL
  366. };
  367. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_1[] = {
  368. &WR_DIS_KEY_PURPOSE_1[0], // [WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
  369. NULL
  370. };
  371. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_2[] = {
  372. &WR_DIS_KEY_PURPOSE_2[0], // [WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
  373. NULL
  374. };
  375. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_3[] = {
  376. &WR_DIS_KEY_PURPOSE_3[0], // [WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
  377. NULL
  378. };
  379. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_4[] = {
  380. &WR_DIS_KEY_PURPOSE_4[0], // [WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
  381. NULL
  382. };
  383. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY_PURPOSE_5[] = {
  384. &WR_DIS_KEY_PURPOSE_5[0], // [WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
  385. NULL
  386. };
  387. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
  388. &WR_DIS_SECURE_BOOT_EN[0], // [] wr_dis of SECURE_BOOT_EN
  389. NULL
  390. };
  391. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
  392. &WR_DIS_BLK1[0], // [] wr_dis of BLOCK1
  393. NULL
  394. };
  395. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC[] = {
  396. &WR_DIS_MAC[0], // [WR_DIS.MAC_FACTORY] wr_dis of MAC
  397. NULL
  398. };
  399. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_MAC_EXT[] = {
  400. &WR_DIS_MAC_EXT[0], // [] wr_dis of MAC_EXT
  401. NULL
  402. };
  403. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA1[] = {
  404. &WR_DIS_BLOCK_SYS_DATA1[0], // [WR_DIS.SYS_DATA_PART1] wr_dis of BLOCK_SYS_DATA1
  405. NULL
  406. };
  407. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_USR_DATA[] = {
  408. &WR_DIS_BLOCK_USR_DATA[0], // [WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
  409. NULL
  410. };
  411. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY0[] = {
  412. &WR_DIS_BLOCK_KEY0[0], // [WR_DIS.KEY0] wr_dis of BLOCK_KEY0
  413. NULL
  414. };
  415. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY1[] = {
  416. &WR_DIS_BLOCK_KEY1[0], // [WR_DIS.KEY1] wr_dis of BLOCK_KEY1
  417. NULL
  418. };
  419. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY2[] = {
  420. &WR_DIS_BLOCK_KEY2[0], // [WR_DIS.KEY2] wr_dis of BLOCK_KEY2
  421. NULL
  422. };
  423. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY3[] = {
  424. &WR_DIS_BLOCK_KEY3[0], // [WR_DIS.KEY3] wr_dis of BLOCK_KEY3
  425. NULL
  426. };
  427. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY4[] = {
  428. &WR_DIS_BLOCK_KEY4[0], // [WR_DIS.KEY4] wr_dis of BLOCK_KEY4
  429. NULL
  430. };
  431. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_KEY5[] = {
  432. &WR_DIS_BLOCK_KEY5[0], // [WR_DIS.KEY5] wr_dis of BLOCK_KEY5
  433. NULL
  434. };
  435. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLOCK_SYS_DATA2[] = {
  436. &WR_DIS_BLOCK_SYS_DATA2[0], // [WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
  437. NULL
  438. };
  439. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = {
  440. &RD_DIS[0], // [] Disable reading from BlOCK4-10
  441. NULL
  442. };
  443. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY0[] = {
  444. &RD_DIS_BLOCK_KEY0[0], // [RD_DIS.KEY0] rd_dis of BLOCK_KEY0
  445. NULL
  446. };
  447. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY1[] = {
  448. &RD_DIS_BLOCK_KEY1[0], // [RD_DIS.KEY1] rd_dis of BLOCK_KEY1
  449. NULL
  450. };
  451. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY2[] = {
  452. &RD_DIS_BLOCK_KEY2[0], // [RD_DIS.KEY2] rd_dis of BLOCK_KEY2
  453. NULL
  454. };
  455. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY3[] = {
  456. &RD_DIS_BLOCK_KEY3[0], // [RD_DIS.KEY3] rd_dis of BLOCK_KEY3
  457. NULL
  458. };
  459. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY4[] = {
  460. &RD_DIS_BLOCK_KEY4[0], // [RD_DIS.KEY4] rd_dis of BLOCK_KEY4
  461. NULL
  462. };
  463. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_KEY5[] = {
  464. &RD_DIS_BLOCK_KEY5[0], // [RD_DIS.KEY5] rd_dis of BLOCK_KEY5
  465. NULL
  466. };
  467. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_BLOCK_SYS_DATA2[] = {
  468. &RD_DIS_BLOCK_SYS_DATA2[0], // [RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
  469. NULL
  470. };
  471. const esp_efuse_desc_t* ESP_EFUSE_USB_DEVICE_EXCHG_PINS[] = {
  472. &USB_DEVICE_EXCHG_PINS[0], // [] Enable usb device exchange pins of D+ and D-
  473. NULL
  474. };
  475. const esp_efuse_desc_t* ESP_EFUSE_USB_OTG11_EXCHG_PINS[] = {
  476. &USB_OTG11_EXCHG_PINS[0], // [] Enable usb otg11 exchange pins of D+ and D-
  477. NULL
  478. };
  479. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
  480. &DIS_USB_JTAG[0], // [] Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled
  481. NULL
  482. };
  483. const esp_efuse_desc_t* ESP_EFUSE_POWERGLITCH_EN[] = {
  484. &POWERGLITCH_EN[0], // [] Represents whether power glitch function is enabled. 1: enabled. 0: disabled
  485. NULL
  486. };
  487. const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
  488. &DIS_FORCE_DOWNLOAD[0], // [] Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled
  489. NULL
  490. };
  491. const esp_efuse_desc_t* ESP_EFUSE_SPI_DOWNLOAD_MSPI_DIS[] = {
  492. &SPI_DOWNLOAD_MSPI_DIS[0], // [] Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download
  493. NULL
  494. };
  495. const esp_efuse_desc_t* ESP_EFUSE_DIS_TWAI[] = {
  496. &DIS_TWAI[0], // [] Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled
  497. NULL
  498. };
  499. const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
  500. &JTAG_SEL_ENABLE[0], // [] Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled
  501. NULL
  502. };
  503. const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
  504. &SOFT_DIS_JTAG[0], // [] Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled
  505. NULL
  506. };
  507. const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
  508. &DIS_PAD_JTAG[0], // [] Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled
  509. NULL
  510. };
  511. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  512. &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // [] Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled
  513. NULL
  514. };
  515. const esp_efuse_desc_t* ESP_EFUSE_USB_PHY_SEL[] = {
  516. &USB_PHY_SEL[0], // [] TBD
  517. NULL
  518. };
  519. const esp_efuse_desc_t* ESP_EFUSE_KM_HUK_GEN_STATE_LOW[] = {
  520. &KM_HUK_GEN_STATE_LOW[0], // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
  521. NULL
  522. };
  523. const esp_efuse_desc_t* ESP_EFUSE_KM_HUK_GEN_STATE_HIGH[] = {
  524. &KM_HUK_GEN_STATE_HIGH[0], // [] Set this bit to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
  525. NULL
  526. };
  527. const esp_efuse_desc_t* ESP_EFUSE_KM_RND_SWITCH_CYCLE[] = {
  528. &KM_RND_SWITCH_CYCLE[0], // [] Set bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles
  529. NULL
  530. };
  531. const esp_efuse_desc_t* ESP_EFUSE_KM_DEPLOY_ONLY_ONCE[] = {
  532. &KM_DEPLOY_ONLY_ONCE[0], // [] Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
  533. NULL
  534. };
  535. const esp_efuse_desc_t* ESP_EFUSE_FORCE_USE_KEY_MANAGER_KEY[] = {
  536. &FORCE_USE_KEY_MANAGER_KEY[0], // [] Set each bit to control whether corresponding key must come from key manager.. 1 is true; 0 is false. Bit0: ecdsa. Bit1: xts. Bit2: hmac. Bit3: ds
  537. NULL
  538. };
  539. const esp_efuse_desc_t* ESP_EFUSE_FORCE_DISABLE_SW_INIT_KEY[] = {
  540. &FORCE_DISABLE_SW_INIT_KEY[0], // [] Set this bit to disable software written init key; and force use efuse_init_key
  541. NULL
  542. };
  543. const esp_efuse_desc_t* ESP_EFUSE_XTS_KEY_LENGTH_256[] = {
  544. &XTS_KEY_LENGTH_256[0], // [] Set this bit to configure flash encryption use xts-128 key; else use xts-256 key
  545. NULL
  546. };
  547. const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
  548. &WDT_DELAY_SEL[0], // [] Represents whether RTC watchdog timeout threshold is selected at startup. 1: selected. 0: not selected
  549. NULL
  550. };
  551. const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
  552. &SPI_BOOT_CRYPT_CNT[0], // [] Enables flash encryption when 1 or 3 bits are set and disables otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
  553. NULL
  554. };
  555. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
  556. &SECURE_BOOT_KEY_REVOKE0[0], // [] Revoke 1st secure boot key
  557. NULL
  558. };
  559. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
  560. &SECURE_BOOT_KEY_REVOKE1[0], // [] Revoke 2nd secure boot key
  561. NULL
  562. };
  563. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
  564. &SECURE_BOOT_KEY_REVOKE2[0], // [] Revoke 3rd secure boot key
  565. NULL
  566. };
  567. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
  568. &KEY_PURPOSE_0[0], // [KEY0_PURPOSE] Represents the purpose of Key0
  569. NULL
  570. };
  571. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
  572. &KEY_PURPOSE_1[0], // [KEY1_PURPOSE] Represents the purpose of Key1
  573. NULL
  574. };
  575. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
  576. &KEY_PURPOSE_2[0], // [KEY2_PURPOSE] Represents the purpose of Key2
  577. NULL
  578. };
  579. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
  580. &KEY_PURPOSE_3[0], // [KEY3_PURPOSE] Represents the purpose of Key3
  581. NULL
  582. };
  583. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
  584. &KEY_PURPOSE_4[0], // [KEY4_PURPOSE] Represents the purpose of Key4
  585. NULL
  586. };
  587. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
  588. &KEY_PURPOSE_5[0], // [KEY5_PURPOSE] Represents the purpose of Key5
  589. NULL
  590. };
  591. const esp_efuse_desc_t* ESP_EFUSE_SEC_DPA_LEVEL[] = {
  592. &SEC_DPA_LEVEL[0], // [] Represents the spa secure level by configuring the clock random divide mode
  593. NULL
  594. };
  595. const esp_efuse_desc_t* ESP_EFUSE_ECDSA_ENABLE_SOFT_K[] = {
  596. &ECDSA_ENABLE_SOFT_K[0], // [] Represents whether hardware random number k is forced used in ESDCA. 1: force used. 0: not force used
  597. NULL
  598. };
  599. const esp_efuse_desc_t* ESP_EFUSE_CRYPT_DPA_ENABLE[] = {
  600. &CRYPT_DPA_ENABLE[0], // [] Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
  601. NULL
  602. };
  603. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
  604. &SECURE_BOOT_EN[0], // [] Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled
  605. NULL
  606. };
  607. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  608. &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // [] Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
  609. NULL
  610. };
  611. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[] = {
  612. &FLASH_TYPE[0], // [] The type of interfaced flash. 0: four data lines; 1: eight data lines
  613. NULL
  614. };
  615. const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[] = {
  616. &FLASH_PAGE_SIZE[0], // [] Set flash page size
  617. NULL
  618. };
  619. const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[] = {
  620. &FLASH_ECC_EN[0], // [] Set this bit to enable ecc for flash boot
  621. NULL
  622. };
  623. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_OTG_DOWNLOAD_MODE[] = {
  624. &DIS_USB_OTG_DOWNLOAD_MODE[0], // [] Set this bit to disable download via USB-OTG
  625. NULL
  626. };
  627. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
  628. &FLASH_TPUW[0], // [] Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
  629. NULL
  630. };
  631. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
  632. &DIS_DOWNLOAD_MODE[0], // [] Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled
  633. NULL
  634. };
  635. const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
  636. &DIS_DIRECT_BOOT[0], // [] Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled
  637. NULL
  638. };
  639. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  640. &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // [] Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled
  641. NULL
  642. };
  643. const esp_efuse_desc_t* ESP_EFUSE_LOCK_KM_KEY[] = {
  644. &LOCK_KM_KEY[0], // [] TBD
  645. NULL
  646. };
  647. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  648. &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // [] Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled
  649. NULL
  650. };
  651. const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
  652. &ENABLE_SECURITY_DOWNLOAD[0], // [] Represents whether security download is enabled or disabled. 1: enabled. 0: disabled
  653. NULL
  654. };
  655. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
  656. &UART_PRINT_CONTROL[0], // [] Represents the type of UART printing. 00: force enable printing. 01: enable printing when GPIO8 is reset at low level. 10: enable printing when GPIO8 is reset at high level. 11: force disable printing
  657. NULL
  658. };
  659. const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
  660. &FORCE_SEND_RESUME[0], // [] Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced
  661. NULL
  662. };
  663. const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
  664. &SECURE_VERSION[0], // [] Represents the version used by ESP-IDF anti-rollback feature
  665. NULL
  666. };
  667. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_DISABLE_FAST_WAKE[] = {
  668. &SECURE_BOOT_DISABLE_FAST_WAKE[0], // [] Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure Boot is enabled. 1: disabled. 0: enabled
  669. NULL
  670. };
  671. const esp_efuse_desc_t* ESP_EFUSE_HYS_EN_PAD[] = {
  672. &HYS_EN_PAD[0], // [] Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled. 0:disabled
  673. NULL
  674. };
  675. const esp_efuse_desc_t* ESP_EFUSE_DCDC_VSET[] = {
  676. &DCDC_VSET[0], // [] Set the dcdc voltage default
  677. NULL
  678. };
  679. const esp_efuse_desc_t* ESP_EFUSE_PXA0_TIEH_SEL_0[] = {
  680. &PXA0_TIEH_SEL_0[0], // [] TBD
  681. NULL
  682. };
  683. const esp_efuse_desc_t* ESP_EFUSE_PXA0_TIEH_SEL_1[] = {
  684. &PXA0_TIEH_SEL_1[0], // [] TBD
  685. NULL
  686. };
  687. const esp_efuse_desc_t* ESP_EFUSE_PXA0_TIEH_SEL_2[] = {
  688. &PXA0_TIEH_SEL_2[0], // [] TBD
  689. NULL
  690. };
  691. const esp_efuse_desc_t* ESP_EFUSE_PXA0_TIEH_SEL_3[] = {
  692. &PXA0_TIEH_SEL_3[0], // [] TBD
  693. NULL
  694. };
  695. const esp_efuse_desc_t* ESP_EFUSE_KM_DISABLE_DEPLOY_MODE[] = {
  696. &KM_DISABLE_DEPLOY_MODE[0], // [] TBD
  697. NULL
  698. };
  699. const esp_efuse_desc_t* ESP_EFUSE_HP_PWR_SRC_SEL[] = {
  700. &HP_PWR_SRC_SEL[0], // [] HP system power source select. 0:LDO. 1: DCDC
  701. NULL
  702. };
  703. const esp_efuse_desc_t* ESP_EFUSE_DCDC_VSET_EN[] = {
  704. &DCDC_VSET_EN[0], // [] Select dcdc vset use efuse_dcdc_vset
  705. NULL
  706. };
  707. const esp_efuse_desc_t* ESP_EFUSE_DIS_WDT[] = {
  708. &DIS_WDT[0], // [] Set this bit to disable watch dog
  709. NULL
  710. };
  711. const esp_efuse_desc_t* ESP_EFUSE_DIS_SWD[] = {
  712. &DIS_SWD[0], // [] Set this bit to disable super-watchdog
  713. NULL
  714. };
  715. const esp_efuse_desc_t* ESP_EFUSE_MAC[] = {
  716. &MAC[0], // [MAC_FACTORY] MAC address
  717. &MAC[1], // [MAC_FACTORY] MAC address
  718. &MAC[2], // [MAC_FACTORY] MAC address
  719. &MAC[3], // [MAC_FACTORY] MAC address
  720. &MAC[4], // [MAC_FACTORY] MAC address
  721. &MAC[5], // [MAC_FACTORY] MAC address
  722. NULL
  723. };
  724. const esp_efuse_desc_t* ESP_EFUSE_MAC_EXT[] = {
  725. &MAC_EXT[0], // [] Stores the extended bits of MAC address [0]
  726. &MAC_EXT[1], // [] Stores the extended bits of MAC address [1]
  727. NULL
  728. };
  729. const esp_efuse_desc_t* ESP_EFUSE_BLOCK_SYS_DATA1[] = {
  730. &BLOCK_SYS_DATA1[0], // [SYS_DATA_PART1] System data part 1
  731. NULL
  732. };
  733. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
  734. &USER_DATA[0], // [BLOCK_USR_DATA] User data
  735. NULL
  736. };
  737. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
  738. &USER_DATA_MAC_CUSTOM[0], // [MAC_CUSTOM CUSTOM_MAC] Custom MAC (TODO
  739. NULL
  740. };
  741. const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
  742. &KEY0[0], // [BLOCK_KEY0] Key0 or user data
  743. NULL
  744. };
  745. const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
  746. &KEY1[0], // [BLOCK_KEY1] Key1 or user data
  747. NULL
  748. };
  749. const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
  750. &KEY2[0], // [BLOCK_KEY2] Key2 or user data
  751. NULL
  752. };
  753. const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
  754. &KEY3[0], // [BLOCK_KEY3] Key3 or user data
  755. NULL
  756. };
  757. const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
  758. &KEY4[0], // [BLOCK_KEY4] Key4 or user data
  759. NULL
  760. };
  761. const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
  762. &KEY5[0], // [BLOCK_KEY5] Key5 or user data
  763. NULL
  764. };
  765. const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
  766. &SYS_DATA_PART2[0], // [BLOCK_SYS_DATA2] System data part 2 (reserved)
  767. NULL
  768. };