esp_ds.c 12 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stdlib.h>
  7. #include <string.h>
  8. #include <assert.h>
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "esp_timer.h"
  12. #include "esp_ds.h"
  13. #include "esp_crypto_lock.h"
  14. #include "esp_private/esp_crypto_lock_internal.h"
  15. #include "esp_hmac.h"
  16. #include "esp_memory_utils.h"
  17. #if CONFIG_IDF_TARGET_ESP32S2
  18. #include "esp32s2/rom/aes.h"
  19. #include "esp32s2/rom/sha.h"
  20. #include "esp32s2/rom/hmac.h"
  21. #include "soc/soc_memory_layout.h"
  22. #else /* CONFIG_IDF_TARGET_ESP32S2 */
  23. #include "esp_private/periph_ctrl.h"
  24. #include "hal/ds_hal.h"
  25. #include "hal/ds_ll.h"
  26. #include "hal/hmac_hal.h"
  27. #include "hal/hmac_ll.h"
  28. #endif /* !CONFIG_IDF_TARGET_ESP32S2 */
  29. #if CONFIG_IDF_TARGET_ESP32S2
  30. #include "esp32s2/rom/digital_signature.h"
  31. #endif
  32. #if CONFIG_IDF_TARGET_ESP32S3
  33. #include "esp32s3/rom/digital_signature.h"
  34. #endif
  35. #if CONFIG_IDF_TARGET_ESP32C3
  36. #include "esp32c3/rom/digital_signature.h"
  37. #endif
  38. #if CONFIG_IDF_TARGET_ESP32C6
  39. #include "esp32c6/rom/digital_signature.h"
  40. #endif
  41. #if CONFIG_IDF_TARGET_ESP32H2
  42. #include "esp32h2/rom/digital_signature.h"
  43. #endif
  44. #if CONFIG_IDF_TARGET_ESP32P4
  45. #include "esp32p4/rom/digital_signature.h"
  46. #endif
  47. struct esp_ds_context {
  48. const ets_ds_data_t *data;
  49. };
  50. /**
  51. * The vtask delay \c esp_ds_sign() is using while waiting for completion of the signing operation.
  52. */
  53. #define ESP_DS_SIGN_TASK_DELAY_MS 10
  54. #define RSA_LEN_MAX ((SOC_RSA_MAX_BIT_LEN/8) - 1)
  55. /*
  56. * Check that the size of esp_ds_data_t and ets_ds_data_t is the same because both structs are converted using
  57. * raw casts.
  58. */
  59. _Static_assert(sizeof(esp_ds_data_t) == sizeof(ets_ds_data_t),
  60. "The size and structure of esp_ds_data_t and ets_ds_data_t must match exactly, they're used in raw casts");
  61. /*
  62. * esp_digital_signature_length_t is used in esp_ds_data_t in contrast to ets_ds_data_t, where unsigned is used.
  63. * Check esp_digital_signature_length_t's width here because it's converted to unsigned using raw casts.
  64. */
  65. _Static_assert(sizeof(esp_digital_signature_length_t) == sizeof(unsigned),
  66. "The size of esp_digital_signature_length_t and unsigned has to be the same");
  67. #ifdef CONFIG_IDF_TARGET_ESP32S2
  68. static void ds_acquire_enable(void)
  69. {
  70. /* Lock AES, SHA and RSA peripheral */
  71. esp_crypto_dma_lock_acquire();
  72. esp_crypto_mpi_lock_acquire();
  73. ets_hmac_enable();
  74. ets_ds_enable();
  75. }
  76. static void ds_disable_release(void)
  77. {
  78. ets_ds_disable();
  79. ets_hmac_disable();
  80. esp_crypto_mpi_lock_release();
  81. esp_crypto_dma_lock_release();
  82. }
  83. esp_err_t esp_ds_sign(const void *message,
  84. const esp_ds_data_t *data,
  85. hmac_key_id_t key_id,
  86. void *signature)
  87. {
  88. // Need to check signature here, otherwise the signature is only checked when the signing has finished and fails
  89. // but the signing isn't uninitialized and the mutex is still locked.
  90. if (!signature) {
  91. return ESP_ERR_INVALID_ARG;
  92. }
  93. esp_ds_context_t *context;
  94. esp_err_t result = esp_ds_start_sign(message, data, key_id, &context);
  95. if (result != ESP_OK) {
  96. return result;
  97. }
  98. while (esp_ds_is_busy()) {
  99. vTaskDelay(ESP_DS_SIGN_TASK_DELAY_MS / portTICK_PERIOD_MS);
  100. }
  101. return esp_ds_finish_sign(signature, context);
  102. }
  103. esp_err_t esp_ds_start_sign(const void *message,
  104. const esp_ds_data_t *data,
  105. hmac_key_id_t key_id,
  106. esp_ds_context_t **esp_ds_ctx)
  107. {
  108. if (!message || !data || !esp_ds_ctx) {
  109. return ESP_ERR_INVALID_ARG;
  110. }
  111. if (key_id >= HMAC_KEY_MAX) {
  112. return ESP_ERR_INVALID_ARG;
  113. }
  114. if (!(data->rsa_length == ESP_DS_RSA_1024
  115. || data->rsa_length == ESP_DS_RSA_2048
  116. || data->rsa_length == ESP_DS_RSA_3072
  117. #if SOC_RSA_MAX_BIT_LEN == 4096
  118. || data->rsa_length == ESP_DS_RSA_4096
  119. #endif
  120. )) {
  121. return ESP_ERR_INVALID_ARG;
  122. }
  123. ds_acquire_enable();
  124. // initiate hmac
  125. int r = ets_hmac_calculate_downstream(ETS_EFUSE_BLOCK_KEY0 + (ets_efuse_block_t) key_id,
  126. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE);
  127. if (r != ETS_OK) {
  128. ds_disable_release();
  129. return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
  130. }
  131. esp_ds_context_t *context = malloc(sizeof(esp_ds_context_t));
  132. if (!context) {
  133. ds_disable_release();
  134. return ESP_ERR_NO_MEM;
  135. }
  136. ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
  137. // initiate signing
  138. ets_ds_result_t result = ets_ds_start_sign(message, ds_data);
  139. // ETS_DS_INVALID_PARAM only happens if a parameter is NULL or data->rsa_length is wrong
  140. // We checked all of that already
  141. assert(result != ETS_DS_INVALID_PARAM);
  142. if (result == ETS_DS_INVALID_KEY) {
  143. ds_disable_release();
  144. free(context);
  145. return ESP_ERR_HW_CRYPTO_DS_INVALID_KEY;
  146. }
  147. context->data = (const ets_ds_data_t *)ds_data;
  148. *esp_ds_ctx = context;
  149. return ESP_OK;
  150. }
  151. bool esp_ds_is_busy(void)
  152. {
  153. return ets_ds_is_busy();
  154. }
  155. esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
  156. {
  157. if (!signature || !esp_ds_ctx) {
  158. return ESP_ERR_INVALID_ARG;
  159. }
  160. const ets_ds_data_t *ds_data = esp_ds_ctx->data;
  161. ets_ds_result_t result = ets_ds_finish_sign(signature, ds_data);
  162. esp_err_t return_value = ESP_OK;
  163. // we checked all the parameters
  164. assert(result != ETS_DS_INVALID_PARAM);
  165. if (result == ETS_DS_INVALID_DIGEST) {
  166. return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
  167. }
  168. if (result == ETS_DS_INVALID_PADDING) {
  169. return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING;
  170. }
  171. free(esp_ds_ctx);
  172. int res = ets_hmac_invalidate_downstream(ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE);
  173. assert(res == ETS_OK); // should not fail if called with correct purpose
  174. (void)res;
  175. ds_disable_release();
  176. return return_value;
  177. }
  178. esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
  179. const void *iv,
  180. const esp_ds_p_data_t *p_data,
  181. const void *key)
  182. {
  183. // p_data has to be valid, in internal memory and word aligned
  184. if (!p_data) {
  185. return ESP_ERR_INVALID_ARG;
  186. }
  187. assert(esp_ptr_internal(p_data) && esp_ptr_word_aligned(p_data));
  188. esp_err_t result = ESP_OK;
  189. esp_crypto_dma_lock_acquire();
  190. ets_aes_enable();
  191. ets_sha_enable();
  192. ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
  193. const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
  194. ets_ds_result_t ets_result = ets_ds_encrypt_params(ds_data, iv, ds_plain_data, key, ETS_DS_KEY_HMAC);
  195. if (ets_result == ETS_DS_INVALID_PARAM) {
  196. result = ESP_ERR_INVALID_ARG;
  197. }
  198. ets_sha_disable();
  199. ets_aes_disable();
  200. esp_crypto_dma_lock_release();
  201. return result;
  202. }
  203. #else /* !CONFIG_IDF_TARGET_ESP32S2 (targets other than esp32s2) */
  204. static void ds_acquire_enable(void)
  205. {
  206. esp_crypto_ds_lock_acquire();
  207. #if CONFIG_IDF_TARGET_ESP32S3
  208. esp_crypto_mpi_lock_acquire();
  209. #endif
  210. // We also enable SHA and HMAC here. SHA is used by HMAC, HMAC is used by DS.
  211. HMAC_RCC_ATOMIC() {
  212. hmac_ll_enable_bus_clock(true);
  213. hmac_ll_reset_register();
  214. }
  215. periph_module_enable(PERIPH_SHA_MODULE);
  216. DS_RCC_ATOMIC() {
  217. ds_ll_enable_bus_clock(true);
  218. ds_ll_reset_register();
  219. }
  220. hmac_hal_start();
  221. }
  222. static void ds_disable_release(void)
  223. {
  224. ds_hal_finish();
  225. DS_RCC_ATOMIC() {
  226. ds_ll_enable_bus_clock(false);
  227. }
  228. periph_module_disable(PERIPH_SHA_MODULE);
  229. HMAC_RCC_ATOMIC() {
  230. hmac_ll_enable_bus_clock(false);
  231. }
  232. #if CONFIG_IDF_TARGET_ESP32S3
  233. esp_crypto_mpi_lock_release();
  234. #endif
  235. esp_crypto_ds_lock_release();
  236. }
  237. esp_err_t esp_ds_sign(const void *message,
  238. const esp_ds_data_t *data,
  239. hmac_key_id_t key_id,
  240. void *signature)
  241. {
  242. // Need to check signature here, otherwise the signature is only checked when the signing has finished and fails
  243. // but the signing isn't uninitialized and the mutex is still locked.
  244. if (!signature) {
  245. return ESP_ERR_INVALID_ARG;
  246. }
  247. esp_ds_context_t *context;
  248. esp_err_t result = esp_ds_start_sign(message, data, key_id, &context);
  249. if (result != ESP_OK) {
  250. return result;
  251. }
  252. while (esp_ds_is_busy()) {
  253. vTaskDelay(ESP_DS_SIGN_TASK_DELAY_MS / portTICK_PERIOD_MS);
  254. }
  255. return esp_ds_finish_sign(signature, context);
  256. }
  257. esp_err_t esp_ds_start_sign(const void *message,
  258. const esp_ds_data_t *data,
  259. hmac_key_id_t key_id,
  260. esp_ds_context_t **esp_ds_ctx)
  261. {
  262. if (!message || !data || !esp_ds_ctx) {
  263. return ESP_ERR_INVALID_ARG;
  264. }
  265. if (key_id >= HMAC_KEY_MAX) {
  266. return ESP_ERR_INVALID_ARG;
  267. }
  268. if (!(data->rsa_length == ESP_DS_RSA_1024
  269. || data->rsa_length == ESP_DS_RSA_2048
  270. || data->rsa_length == ESP_DS_RSA_3072
  271. #if SOC_RSA_MAX_BIT_LEN == 4096
  272. || data->rsa_length == ESP_DS_RSA_4096
  273. #endif
  274. )) {
  275. return ESP_ERR_INVALID_ARG;
  276. }
  277. ds_acquire_enable();
  278. // initiate hmac
  279. uint32_t conf_error = hmac_hal_configure(HMAC_OUTPUT_DS, key_id);
  280. if (conf_error) {
  281. ds_disable_release();
  282. return ESP_ERR_HW_CRYPTO_DS_HMAC_FAIL;
  283. }
  284. ds_hal_start();
  285. // check encryption key from HMAC
  286. int64_t start_time = esp_timer_get_time();
  287. while (ds_ll_busy() != 0) {
  288. if ((esp_timer_get_time() - start_time) > SOC_DS_KEY_CHECK_MAX_WAIT_US) {
  289. ds_disable_release();
  290. return ESP_ERR_HW_CRYPTO_DS_INVALID_KEY;
  291. }
  292. }
  293. esp_ds_context_t *context = malloc(sizeof(esp_ds_context_t));
  294. if (!context) {
  295. ds_disable_release();
  296. return ESP_ERR_NO_MEM;
  297. }
  298. size_t rsa_len = (data->rsa_length + 1) * 4;
  299. ds_hal_write_private_key_params(data->c);
  300. ds_hal_configure_iv((uint32_t *)data->iv);
  301. ds_hal_write_message(message, rsa_len);
  302. // initiate signing
  303. ds_hal_start_sign();
  304. context->data = (const ets_ds_data_t *)data;
  305. *esp_ds_ctx = context;
  306. return ESP_OK;
  307. }
  308. bool esp_ds_is_busy(void)
  309. {
  310. return ds_hal_busy();
  311. }
  312. esp_err_t esp_ds_finish_sign(void *signature, esp_ds_context_t *esp_ds_ctx)
  313. {
  314. if (!signature || !esp_ds_ctx) {
  315. return ESP_ERR_INVALID_ARG;
  316. }
  317. const esp_ds_data_t *data = (const esp_ds_data_t *)esp_ds_ctx->data;
  318. unsigned rsa_len = (data->rsa_length + 1) * 4;
  319. while (ds_hal_busy()) { }
  320. ds_signature_check_t sig_check_result = ds_hal_read_result((uint8_t *) signature, (size_t) rsa_len);
  321. esp_err_t return_value = ESP_OK;
  322. if (sig_check_result == DS_SIGNATURE_MD_FAIL || sig_check_result == DS_SIGNATURE_PADDING_AND_MD_FAIL) {
  323. return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_DIGEST;
  324. }
  325. if (sig_check_result == DS_SIGNATURE_PADDING_FAIL) {
  326. return_value = ESP_ERR_HW_CRYPTO_DS_INVALID_PADDING;
  327. }
  328. free(esp_ds_ctx);
  329. hmac_hal_clean();
  330. ds_disable_release();
  331. return return_value;
  332. }
  333. esp_err_t esp_ds_encrypt_params(esp_ds_data_t *data,
  334. const void *iv,
  335. const esp_ds_p_data_t *p_data,
  336. const void *key)
  337. {
  338. if (!p_data) {
  339. return ESP_ERR_INVALID_ARG;
  340. }
  341. esp_err_t result = ESP_OK;
  342. // The `esp_ds_encrypt_params` operation does not use the Digital Signature peripheral,
  343. // but just the AES and SHA peripherals, so acquiring locks just for these peripherals
  344. // would be enough rather than acquiring a lock for the Digital Signature peripheral.
  345. esp_crypto_sha_aes_lock_acquire();
  346. periph_module_enable(PERIPH_AES_MODULE);
  347. periph_module_enable(PERIPH_SHA_MODULE);
  348. ets_ds_data_t *ds_data = (ets_ds_data_t *) data;
  349. const ets_ds_p_data_t *ds_plain_data = (const ets_ds_p_data_t *) p_data;
  350. ets_ds_result_t ets_result = ets_ds_encrypt_params(ds_data, iv, ds_plain_data, key, ETS_DS_KEY_HMAC);
  351. if (ets_result == ETS_DS_INVALID_PARAM) {
  352. result = ESP_ERR_INVALID_ARG;
  353. }
  354. periph_module_disable(PERIPH_SHA_MODULE);
  355. periph_module_disable(PERIPH_AES_MODULE);
  356. esp_crypto_sha_aes_lock_release();
  357. return result;
  358. }
  359. #endif