aes_block.c 3.5 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: CC0-1.0
  5. */
  6. #include <stdio.h>
  7. #include <stdlib.h>
  8. #include <string.h>
  9. #include "soc/periph_defs.h"
  10. #include "esp_private/periph_ctrl.h"
  11. #include "hal/aes_types.h"
  12. #include "hal/aes_hal.h"
  13. #include "hal/clk_gate_ll.h"
  14. #if SOC_AES_SUPPORTED
  15. #include "aes_block.h"
  16. void aes_crypt_cbc_block(int mode,
  17. uint8_t key_bytes,
  18. const uint8_t key[32],
  19. size_t length,
  20. unsigned char iv[16],
  21. const unsigned char *input,
  22. unsigned char *output)
  23. {
  24. uint32_t *output_words = (uint32_t *)output;
  25. const uint32_t *input_words = (const uint32_t *)input;
  26. uint32_t *iv_words = (uint32_t *)iv;
  27. unsigned char temp[16];
  28. /* Enable peripheral module by un-gating the clock and de-asserting the reset signal. */
  29. periph_ll_enable_clk_clear_rst(PERIPH_AES_MODULE);
  30. /* Sets the key used for AES encryption/decryption */
  31. aes_hal_setkey(key, key_bytes, mode);
  32. if (mode == ESP_AES_DECRYPT) {
  33. while ( length > 0 ) {
  34. memcpy(temp, input_words, 16);
  35. aes_hal_transform_block(input_words, output_words);
  36. output_words[0] = output_words[0] ^ iv_words[0];
  37. output_words[1] = output_words[1] ^ iv_words[1];
  38. output_words[2] = output_words[2] ^ iv_words[2];
  39. output_words[3] = output_words[3] ^ iv_words[3];
  40. memcpy( iv_words, temp, 16 );
  41. input_words += 4;
  42. output_words += 4;
  43. length -= 16;
  44. }
  45. } else { // ESP_AES_ENCRYPT
  46. while ( length > 0 ) {
  47. output_words[0] = input_words[0] ^ iv_words[0];
  48. output_words[1] = input_words[1] ^ iv_words[1];
  49. output_words[2] = input_words[2] ^ iv_words[2];
  50. output_words[3] = input_words[3] ^ iv_words[3];
  51. aes_hal_transform_block(output_words, output_words);
  52. memcpy( iv_words, output_words, 16 );
  53. input_words += 4;
  54. output_words += 4;
  55. length -= 16;
  56. }
  57. }
  58. /* Disable peripheral module by gating the clock and asserting the reset signal. */
  59. periph_ll_disable_clk_set_rst(PERIPH_AES_MODULE);
  60. }
  61. void aes_crypt_ctr_block(uint8_t key_bytes,
  62. const uint8_t key[32],
  63. size_t length,
  64. size_t *nc_off,
  65. unsigned char nonce_counter[16],
  66. unsigned char stream_block[16],
  67. const unsigned char *input,
  68. unsigned char *output )
  69. {
  70. int c, i;
  71. size_t n = *nc_off;
  72. /* Enable peripheral module by un-gating the clock and de-asserting the reset signal. */
  73. periph_ll_enable_clk_clear_rst(PERIPH_AES_MODULE);
  74. /* Sets the key used for AES encryption/decryption */
  75. aes_hal_setkey(key, key_bytes, ESP_AES_ENCRYPT);
  76. while (length--) {
  77. if ( n == 0 ) {
  78. aes_hal_transform_block(nonce_counter, stream_block);
  79. for ( i = 16; i > 0; i-- ) {
  80. if ( ++nonce_counter[i - 1] != 0 ) {
  81. break;
  82. }
  83. }
  84. }
  85. c = *input++;
  86. *output++ = (unsigned char)( c ^ stream_block[n] );
  87. n = ( n + 1 ) & 0x0F;
  88. }
  89. *nc_off = n;
  90. /* Disable peripheral module by gating the clock and asserting the reset signal. */
  91. periph_ll_disable_clk_set_rst(PERIPH_AES_MODULE);
  92. }
  93. #endif