bt.c 48 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stddef.h>
  7. #include <stdlib.h>
  8. #include <stdio.h>
  9. #include <string.h>
  10. #include "sdkconfig.h"
  11. #include "esp_heap_caps.h"
  12. #include "esp_heap_caps_init.h"
  13. #include "freertos/FreeRTOS.h"
  14. #include "freertos/task.h"
  15. #include "freertos/queue.h"
  16. #include "freertos/semphr.h"
  17. #include "freertos/portmacro.h"
  18. #include "esp_types.h"
  19. #include "esp_mac.h"
  20. #include "esp_random.h"
  21. #include "esp_task.h"
  22. #include "riscv/interrupt.h"
  23. #include "esp_attr.h"
  24. #include "esp_phy_init.h"
  25. #include "esp_bt.h"
  26. #include "esp_err.h"
  27. #include "esp_log.h"
  28. #include "esp_pm.h"
  29. #include "esp_ipc.h"
  30. #include "esp_private/periph_ctrl.h"
  31. #include "esp_private/esp_clk.h"
  32. #include "soc/rtc.h"
  33. #include "soc/rtc_cntl_reg.h"
  34. #include "soc/soc_memory_layout.h"
  35. #include "esp_coexist_internal.h"
  36. #include "esp32c3/rom/rom_layout.h"
  37. #include "esp_timer.h"
  38. #include "esp_sleep.h"
  39. #include "phy.h"
  40. #if CONFIG_BT_ENABLED
  41. /* Macro definition
  42. ************************************************************************
  43. */
  44. #define BTDM_LOG_TAG "BTDM_INIT"
  45. #define BTDM_INIT_PERIOD (5000) /* ms */
  46. /* Low Power Clock Selection */
  47. #define BTDM_LPCLK_SEL_XTAL (0)
  48. #define BTDM_LPCLK_SEL_XTAL32K (1)
  49. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  50. #define BTDM_LPCLK_SEL_8M (3)
  51. // wakeup request sources
  52. enum {
  53. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  54. BTDM_ASYNC_WAKEUP_SRC_DISA,
  55. BTDM_ASYNC_WAKEUP_SRC_TMR,
  56. BTDM_ASYNC_WAKEUP_SRC_MAX,
  57. };
  58. // low power control struct
  59. typedef union {
  60. struct {
  61. uint32_t enable : 1; // whether low power mode is required
  62. uint32_t lpclk_sel : 2; // low power clock source
  63. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  64. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  65. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  66. uint32_t main_xtal_pu : 1; // power up main XTAL
  67. uint32_t reserved : 25; // reserved
  68. };
  69. uint32_t val;
  70. } btdm_lpcntl_t;
  71. // low power control status
  72. typedef union {
  73. struct {
  74. uint32_t pm_lock_released : 1; // whether power management lock is released
  75. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  76. uint32_t phy_enabled : 1; // whether phy is switched on
  77. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  78. uint32_t reserved : 28; // reserved
  79. };
  80. uint32_t val;
  81. } btdm_lpstat_t;
  82. /* Sleep and wakeup interval control */
  83. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  84. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  85. #define BT_DEBUG(...)
  86. #define BT_API_CALL_CHECK(info, api_call, ret) \
  87. do{\
  88. esp_err_t __err = (api_call);\
  89. if ((ret) != __err) {\
  90. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  91. return __err;\
  92. }\
  93. } while(0)
  94. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  95. #define OSI_VERSION 0x00010006
  96. #define OSI_MAGIC_VALUE 0xFADEBEAD
  97. /* Types definition
  98. ************************************************************************
  99. */
  100. /* vendor dependent signals to be posted to controller task */
  101. typedef enum {
  102. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  103. BTDM_VND_OL_SIG_NUM,
  104. } btdm_vnd_ol_sig_t;
  105. /* prototype of function to handle vendor dependent signals */
  106. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  107. /* VHCI function interface */
  108. typedef struct vhci_host_callback {
  109. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  110. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  111. } vhci_host_callback_t;
  112. /* Dram region */
  113. typedef struct {
  114. esp_bt_mode_t mode;
  115. intptr_t start;
  116. intptr_t end;
  117. } btdm_dram_available_region_t;
  118. typedef void (* osi_intr_handler)(void);
  119. /* OSI function */
  120. struct osi_funcs_t {
  121. uint32_t _magic;
  122. uint32_t _version;
  123. void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
  124. void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
  125. void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
  126. void (*_interrupt_disable)(void);
  127. void (*_interrupt_restore)(void);
  128. void (*_task_yield)(void);
  129. void (*_task_yield_from_isr)(void);
  130. void *(*_semphr_create)(uint32_t max, uint32_t init);
  131. void (*_semphr_delete)(void *semphr);
  132. int (*_semphr_take_from_isr)(void *semphr, void *hptw);
  133. int (*_semphr_give_from_isr)(void *semphr, void *hptw);
  134. int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  135. int (*_semphr_give)(void *semphr);
  136. void *(*_mutex_create)(void);
  137. void (*_mutex_delete)(void *mutex);
  138. int (*_mutex_lock)(void *mutex);
  139. int (*_mutex_unlock)(void *mutex);
  140. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  141. void (* _queue_delete)(void *queue);
  142. int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  143. int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  144. int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  145. int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  146. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  147. void (* _task_delete)(void *task_handle);
  148. bool (* _is_in_isr)(void);
  149. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  150. void *(* _malloc)(size_t size);
  151. void *(* _malloc_internal)(size_t size);
  152. void (* _free)(void *p);
  153. int (* _read_efuse_mac)(uint8_t mac[6]);
  154. void (* _srand)(unsigned int seed);
  155. int (* _rand)(void);
  156. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  157. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  158. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  159. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  160. void (* _btdm_sleep_enter_phase2)(void);
  161. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  162. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  163. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  164. void (* _coex_wifi_sleep_set)(bool sleep);
  165. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  166. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  167. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  168. void (* _interrupt_on)(int intr_num);
  169. void (* _interrupt_off)(int intr_num);
  170. void (* _esp_hw_power_down)(void);
  171. void (* _esp_hw_power_up)(void);
  172. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  173. };
  174. /* External functions or values
  175. ************************************************************************
  176. */
  177. /* not for user call, so don't put to include file */
  178. /* OSI */
  179. extern int btdm_osi_funcs_register(void *osi_funcs);
  180. /* Initialise and De-initialise */
  181. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  182. extern void btdm_controller_deinit(void);
  183. extern int btdm_controller_enable(esp_bt_mode_t mode);
  184. extern void btdm_controller_disable(void);
  185. extern uint8_t btdm_controller_get_mode(void);
  186. extern const char *btdm_controller_get_compile_version(void);
  187. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  188. /* Sleep */
  189. extern void btdm_controller_enable_sleep(bool enable);
  190. extern uint8_t btdm_controller_get_sleep_mode(void);
  191. extern bool btdm_power_state_active(void);
  192. extern void btdm_wakeup_request(void);
  193. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  194. /* vendor dependent tasks to be posted and handled by controller task*/
  195. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  196. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  197. extern int btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  198. extern int btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  199. /* Low Power Clock */
  200. extern bool btdm_lpclk_select_src(uint32_t sel);
  201. extern bool btdm_lpclk_set_div(uint32_t div);
  202. extern int btdm_hci_tl_io_event_post(int event);
  203. /* VHCI */
  204. extern bool API_vhci_host_check_send_available(void);
  205. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  206. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  207. /* TX power */
  208. extern int ble_txpwr_set(int power_type, int power_level);
  209. extern int ble_txpwr_get(int power_type);
  210. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  211. extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
  212. extern void coex_pti_v2(void);
  213. extern bool btdm_deep_sleep_mem_init(void);
  214. extern void btdm_deep_sleep_mem_deinit(void);
  215. extern void btdm_ble_power_down_dma_copy(bool copy);
  216. extern uint8_t btdm_sleep_clock_sync(void);
  217. extern void sdk_config_extend_set_pll_track(bool enable);
  218. #if CONFIG_MAC_BB_PD
  219. extern void esp_mac_bb_power_down(void);
  220. extern void esp_mac_bb_power_up(void);
  221. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  222. #endif
  223. extern char _bss_start_btdm;
  224. extern char _bss_end_btdm;
  225. extern char _data_start_btdm;
  226. extern char _data_end_btdm;
  227. extern uint32_t _data_start_btdm_rom;
  228. extern uint32_t _data_end_btdm_rom;
  229. extern uint32_t _bt_bss_start;
  230. extern uint32_t _bt_bss_end;
  231. extern uint32_t _btdm_bss_start;
  232. extern uint32_t _btdm_bss_end;
  233. extern uint32_t _bt_data_start;
  234. extern uint32_t _bt_data_end;
  235. extern uint32_t _btdm_data_start;
  236. extern uint32_t _btdm_data_end;
  237. extern char _bt_tmp_bss_start;
  238. extern char _bt_tmp_bss_end;
  239. /* Local Function Declare
  240. *********************************************************************
  241. */
  242. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
  243. static void interrupt_clear_wrapper(int intr_source, int intr_num);
  244. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
  245. static void interrupt_disable(void);
  246. static void interrupt_restore(void);
  247. static void task_yield_from_isr(void);
  248. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  249. static void semphr_delete_wrapper(void *semphr);
  250. static int semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  251. static int semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  252. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  253. static int semphr_give_wrapper(void *semphr);
  254. static void *mutex_create_wrapper(void);
  255. static void mutex_delete_wrapper(void *mutex);
  256. static int mutex_lock_wrapper(void *mutex);
  257. static int mutex_unlock_wrapper(void *mutex);
  258. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  259. static void queue_delete_wrapper(void *queue);
  260. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  261. static int queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  262. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  263. static int queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  264. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  265. static void task_delete_wrapper(void *task_handle);
  266. static bool is_in_isr_wrapper(void);
  267. static void *malloc_internal_wrapper(size_t size);
  268. static int read_mac_wrapper(uint8_t mac[6]);
  269. static void srand_wrapper(unsigned int seed);
  270. static int rand_wrapper(void);
  271. static uint32_t btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  272. static uint32_t btdm_hus_2_lpcycles(uint32_t hus);
  273. static bool btdm_sleep_check_duration(int32_t *slot_cnt);
  274. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  275. static void btdm_sleep_enter_phase2_wrapper(void);
  276. static void btdm_sleep_exit_phase3_wrapper(void);
  277. static void coex_wifi_sleep_set_hook(bool sleep);
  278. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  279. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  280. static void interrupt_on_wrapper(int intr_num);
  281. static void interrupt_off_wrapper(int intr_num);
  282. static void btdm_hw_mac_power_up_wrapper(void);
  283. static void btdm_hw_mac_power_down_wrapper(void);
  284. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  285. static void btdm_slp_tmr_callback(void *arg);
  286. /* Local variable definition
  287. ***************************************************************************
  288. */
  289. /* OSI funcs */
  290. static const struct osi_funcs_t osi_funcs_ro = {
  291. ._magic = OSI_MAGIC_VALUE,
  292. ._version = OSI_VERSION,
  293. ._interrupt_set = interrupt_set_wrapper,
  294. ._interrupt_clear = interrupt_clear_wrapper,
  295. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  296. ._interrupt_disable = interrupt_disable,
  297. ._interrupt_restore = interrupt_restore,
  298. #ifdef CONFIG_IDF_RTOS_RTTHREAD
  299. ._task_yield = rt_thread_yield,
  300. #else
  301. ._task_yield = vPortYield,
  302. #endif
  303. ._task_yield_from_isr = task_yield_from_isr,
  304. ._semphr_create = semphr_create_wrapper,
  305. ._semphr_delete = semphr_delete_wrapper,
  306. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  307. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  308. ._semphr_take = semphr_take_wrapper,
  309. ._semphr_give = semphr_give_wrapper,
  310. ._mutex_create = mutex_create_wrapper,
  311. ._mutex_delete = mutex_delete_wrapper,
  312. ._mutex_lock = mutex_lock_wrapper,
  313. ._mutex_unlock = mutex_unlock_wrapper,
  314. ._queue_create = queue_create_wrapper,
  315. ._queue_delete = queue_delete_wrapper,
  316. ._queue_send = queue_send_wrapper,
  317. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  318. ._queue_recv = queue_recv_wrapper,
  319. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  320. ._task_create = task_create_wrapper,
  321. ._task_delete = task_delete_wrapper,
  322. ._is_in_isr = is_in_isr_wrapper,
  323. ._cause_sw_intr_to_core = NULL,
  324. ._malloc = malloc,
  325. ._malloc_internal = malloc_internal_wrapper,
  326. ._free = free,
  327. ._read_efuse_mac = read_mac_wrapper,
  328. ._srand = srand_wrapper,
  329. ._rand = rand_wrapper,
  330. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  331. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  332. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  333. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  334. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  335. ._btdm_sleep_exit_phase1 = NULL,
  336. ._btdm_sleep_exit_phase2 = NULL,
  337. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  338. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  339. ._coex_core_ble_conn_dyn_prio_get = coex_core_ble_conn_dyn_prio_get,
  340. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  341. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  342. ._interrupt_on = interrupt_on_wrapper,
  343. ._interrupt_off = interrupt_off_wrapper,
  344. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  345. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  346. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  347. };
  348. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  349. /* Static variable declare */
  350. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  351. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  352. // low power control struct
  353. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  354. // low power status struct
  355. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  356. // measured average low power clock period in micro seconds
  357. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  358. // number of fractional bit for btdm_lpcycle_us
  359. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  360. // semaphore used for blocking VHCI API to wait for controller to wake up
  361. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  362. // wakeup timer
  363. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  364. #ifdef CONFIG_PM_ENABLE
  365. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  366. // pm_lock to prevent light sleep due to incompatibility currently
  367. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  368. #endif
  369. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  370. {
  371. #if CONFIG_MAC_BB_PD
  372. // Bluetooth module power down
  373. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  374. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  375. esp_mac_bb_power_down();
  376. #endif
  377. }
  378. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  379. {
  380. #if CONFIG_MAC_BB_PD
  381. // Bluetooth module power up
  382. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  383. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  384. esp_mac_bb_power_up();
  385. #endif
  386. }
  387. static inline void esp_bt_power_domain_on(void)
  388. {
  389. // Bluetooth module power up
  390. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  391. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  392. esp_wifi_bt_power_domain_on();
  393. }
  394. static inline void esp_bt_power_domain_off(void)
  395. {
  396. // Bluetooth module power down
  397. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  398. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  399. esp_wifi_bt_power_domain_off();
  400. }
  401. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  402. {
  403. #if CONFIG_MAC_BB_PD
  404. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  405. #endif
  406. }
  407. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
  408. {
  409. intr_matrix_route(intr_source, intr_num);
  410. esprv_intc_int_set_priority(intr_num, intr_prio);
  411. //esprv_intc_int_enable_level(1 << intr_num);
  412. esprv_intc_int_set_type(intr_num, 0);
  413. }
  414. static void interrupt_clear_wrapper(int intr_source, int intr_num)
  415. {
  416. }
  417. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
  418. {
  419. intr_handler_set(n, fn, arg);
  420. }
  421. static void interrupt_on_wrapper(int intr_num)
  422. {
  423. esprv_intc_int_enable(1 << intr_num);
  424. }
  425. static void interrupt_off_wrapper(int intr_num)
  426. {
  427. esprv_intc_int_disable(1<<intr_num);
  428. }
  429. static void IRAM_ATTR interrupt_disable(void)
  430. {
  431. if (xPortInIsrContext()) {
  432. portENTER_CRITICAL_ISR(&global_int_mux);
  433. } else {
  434. portENTER_CRITICAL(&global_int_mux);
  435. }
  436. }
  437. static void IRAM_ATTR interrupt_restore(void)
  438. {
  439. if (xPortInIsrContext()) {
  440. portEXIT_CRITICAL_ISR(&global_int_mux);
  441. } else {
  442. portEXIT_CRITICAL(&global_int_mux);
  443. }
  444. }
  445. static void IRAM_ATTR task_yield_from_isr(void)
  446. {
  447. portYIELD_FROM_ISR();
  448. }
  449. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  450. {
  451. return (void *)xSemaphoreCreateCounting(max, init);
  452. }
  453. static void semphr_delete_wrapper(void *semphr)
  454. {
  455. vSemaphoreDelete(semphr);
  456. }
  457. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  458. {
  459. return (int)xSemaphoreTakeFromISR(semphr, hptw);
  460. }
  461. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  462. {
  463. return (int)xSemaphoreGiveFromISR(semphr, hptw);
  464. }
  465. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  466. {
  467. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  468. return (int)xSemaphoreTake(semphr, portMAX_DELAY);
  469. } else {
  470. return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  471. }
  472. }
  473. static int semphr_give_wrapper(void *semphr)
  474. {
  475. return (int)xSemaphoreGive(semphr);
  476. }
  477. static void *mutex_create_wrapper(void)
  478. {
  479. return (void *)xSemaphoreCreateMutex();
  480. }
  481. static void mutex_delete_wrapper(void *mutex)
  482. {
  483. vSemaphoreDelete(mutex);
  484. }
  485. static int mutex_lock_wrapper(void *mutex)
  486. {
  487. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  488. }
  489. static int mutex_unlock_wrapper(void *mutex)
  490. {
  491. return (int)xSemaphoreGive(mutex);
  492. }
  493. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  494. {
  495. return (void *)xQueueCreate(queue_len, item_size);
  496. }
  497. static void queue_delete_wrapper(void *queue)
  498. {
  499. vQueueDelete(queue);
  500. }
  501. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  502. {
  503. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  504. return (int)xQueueSend(queue, item, portMAX_DELAY);
  505. } else {
  506. return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  507. }
  508. }
  509. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  510. {
  511. return (int)xQueueSendFromISR(queue, item, hptw);
  512. }
  513. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  514. {
  515. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  516. return (int)xQueueReceive(queue, item, portMAX_DELAY);
  517. } else {
  518. return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  519. }
  520. }
  521. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  522. {
  523. return (int)xQueueReceiveFromISR(queue, item, hptw);
  524. }
  525. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  526. {
  527. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  528. }
  529. static void task_delete_wrapper(void *task_handle)
  530. {
  531. vTaskDelete(task_handle);
  532. }
  533. static bool IRAM_ATTR is_in_isr_wrapper(void)
  534. {
  535. return (bool)xPortInIsrContext();
  536. }
  537. static void *malloc_internal_wrapper(size_t size)
  538. {
  539. return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  540. }
  541. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  542. {
  543. int ret = esp_read_mac(mac, ESP_MAC_BT);
  544. ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
  545. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  546. return ret;
  547. }
  548. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  549. {
  550. /* empty function */
  551. }
  552. static int IRAM_ATTR rand_wrapper(void)
  553. {
  554. return (int)esp_random();
  555. }
  556. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  557. {
  558. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  559. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  560. local_error_corr += res;
  561. res = (local_error_corr >> btdm_lpcycle_us_frac);
  562. local_error_corr -= (res << btdm_lpcycle_us_frac);
  563. if (error_corr) {
  564. *error_corr = (uint32_t) local_error_corr;
  565. }
  566. return (uint32_t)res;
  567. }
  568. /*
  569. * @brief Converts a duration in half us into a number of low power clock cycles.
  570. */
  571. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  572. {
  573. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  574. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  575. // clock measurement is conducted
  576. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  577. cycles >>= 1;
  578. return (uint32_t)cycles;
  579. }
  580. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  581. {
  582. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  583. return false;
  584. }
  585. /* wake up in advance considering the delay in enabling PHY/RF */
  586. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  587. return true;
  588. }
  589. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  590. {
  591. if (s_lp_cntl.wakeup_timer_required == 0) {
  592. return;
  593. }
  594. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  595. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  596. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  597. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  598. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  599. // and set the timer in advance
  600. uint32_t uncertainty = (us_to_sleep >> 11);
  601. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  602. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  603. }
  604. assert (s_lp_stat.wakeup_timer_started == 0);
  605. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  606. s_lp_stat.wakeup_timer_started = 1;
  607. } else {
  608. ESP_LOGE(BTDM_LOG_TAG, "timer start failed");
  609. assert(0);
  610. }
  611. }
  612. static void btdm_sleep_enter_phase2_wrapper(void)
  613. {
  614. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  615. if (s_lp_stat.phy_enabled) {
  616. esp_phy_disable();
  617. s_lp_stat.phy_enabled = 0;
  618. } else {
  619. assert(0);
  620. }
  621. if (s_lp_stat.pm_lock_released == 0) {
  622. #ifdef CONFIG_PM_ENABLE
  623. esp_pm_lock_release(s_pm_lock);
  624. #endif
  625. s_lp_stat.pm_lock_released = 1;
  626. }
  627. }
  628. }
  629. static void btdm_sleep_exit_phase3_wrapper(void)
  630. {
  631. #ifdef CONFIG_PM_ENABLE
  632. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  633. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  634. // Do it again here to fix this issue.
  635. if (s_lp_stat.pm_lock_released) {
  636. esp_pm_lock_acquire(s_pm_lock);
  637. s_lp_stat.pm_lock_released = 0;
  638. }
  639. #endif
  640. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  641. if (s_lp_stat.phy_enabled == 0) {
  642. esp_phy_enable();
  643. s_lp_stat.phy_enabled = 1;
  644. }
  645. }
  646. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  647. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  648. // Do it again here to fix this issue.
  649. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  650. esp_timer_stop(s_btdm_slp_tmr);
  651. s_lp_stat.wakeup_timer_started = 0;
  652. }
  653. // wait for the sleep state to change
  654. // the procedure duration is at micro-second level or less
  655. while (btdm_sleep_clock_sync()) {
  656. ;
  657. }
  658. }
  659. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  660. {
  661. assert(s_lp_cntl.enable == 1);
  662. #ifdef CONFIG_PM_ENABLE
  663. if (s_lp_stat.pm_lock_released) {
  664. esp_pm_lock_acquire(s_pm_lock);
  665. s_lp_stat.pm_lock_released = 0;
  666. }
  667. #endif
  668. int event = (int) param;
  669. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  670. btdm_wakeup_request();
  671. }
  672. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  673. esp_timer_stop(s_btdm_slp_tmr);
  674. s_lp_stat.wakeup_timer_started = 0;
  675. }
  676. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  677. semphr_give_wrapper(s_wakeup_req_sem);
  678. }
  679. }
  680. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  681. {
  682. #ifdef CONFIG_PM_ENABLE
  683. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  684. #endif
  685. }
  686. static bool async_wakeup_request(int event)
  687. {
  688. if (s_lp_cntl.enable == 0) {
  689. return false;
  690. }
  691. bool do_wakeup_request = false;
  692. switch (event) {
  693. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  694. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  695. btdm_in_wakeup_requesting_set(true);
  696. if (!btdm_power_state_active()) {
  697. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  698. do_wakeup_request = true;
  699. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  700. }
  701. break;
  702. default:
  703. break;
  704. }
  705. return do_wakeup_request;
  706. }
  707. static void async_wakeup_request_end(int event)
  708. {
  709. if (s_lp_cntl.enable == 0) {
  710. return;
  711. }
  712. bool allow_to_sleep;
  713. switch (event) {
  714. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  715. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  716. allow_to_sleep = true;
  717. break;
  718. default:
  719. allow_to_sleep = true;
  720. break;
  721. }
  722. if (allow_to_sleep) {
  723. btdm_in_wakeup_requesting_set(false);
  724. }
  725. return;
  726. }
  727. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  728. {
  729. #if CONFIG_SW_COEXIST_ENABLE
  730. coex_schm_status_bit_set(type, status);
  731. #endif
  732. }
  733. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  734. {
  735. #if CONFIG_SW_COEXIST_ENABLE
  736. coex_schm_status_bit_clear(type, status);
  737. #endif
  738. }
  739. bool esp_vhci_host_check_send_available(void)
  740. {
  741. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  742. return false;
  743. }
  744. return API_vhci_host_check_send_available();
  745. }
  746. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  747. {
  748. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  749. return;
  750. }
  751. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  752. API_vhci_host_send_packet(data, len);
  753. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  754. }
  755. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  756. {
  757. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  758. return ESP_FAIL;
  759. }
  760. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  761. }
  762. static void btdm_controller_mem_init(void)
  763. {
  764. extern void btdm_controller_rom_data_init(void );
  765. btdm_controller_rom_data_init();
  766. }
  767. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  768. {
  769. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  770. return ESP_OK;
  771. }
  772. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  773. {
  774. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  775. return ESP_OK;
  776. }
  777. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  778. {
  779. int ret = heap_caps_add_region(start, end);
  780. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  781. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  782. * we replace it by ESP_OK
  783. */
  784. if (ret == ESP_ERR_INVALID_SIZE) {
  785. return ESP_OK;
  786. }
  787. return ret;
  788. }
  789. // release wifi and coex memory, free about 720 bytes,
  790. void esp_release_wifi_and_coex_mem(void)
  791. {
  792. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->dram_start_coexist, (intptr_t)ets_rom_layout_p->dram_end_pp));
  793. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->data_start_interface_coexist,(intptr_t)ets_rom_layout_p->bss_end_interface_pp));
  794. }
  795. #if CONFIG_MAC_BB_PD
  796. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  797. {
  798. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  799. btdm_ble_power_down_dma_copy(true);
  800. s_lp_stat.mac_bb_pd = 1;
  801. }
  802. }
  803. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  804. {
  805. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  806. btdm_ble_power_down_dma_copy(false);
  807. s_lp_stat.mac_bb_pd = 0;
  808. }
  809. }
  810. #endif
  811. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  812. {
  813. esp_err_t err = ESP_FAIL;
  814. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  815. return ESP_ERR_INVALID_STATE;
  816. }
  817. if (cfg == NULL) {
  818. return ESP_ERR_INVALID_ARG;
  819. }
  820. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  821. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  822. ESP_LOGE(BTDM_LOG_TAG, "Invalid controller task prioriy or stack size");
  823. return ESP_ERR_INVALID_ARG;
  824. }
  825. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  826. ESP_LOGE(BTDM_LOG_TAG, "%s controller only support BLE only mode", __func__);
  827. return ESP_ERR_NOT_SUPPORTED;
  828. }
  829. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  830. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  831. ESP_LOGE(BTDM_LOG_TAG, "Invalid value of ble_max_act");
  832. return ESP_ERR_INVALID_ARG;
  833. }
  834. }
  835. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  836. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  837. ESP_LOGE(BTDM_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  838. return ESP_ERR_INVALID_ARG;
  839. }
  840. }
  841. // overwrite some parameters
  842. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  843. sdk_config_extend_set_pll_track(false);
  844. #if CONFIG_MAC_BB_PD
  845. esp_mac_bb_pd_mem_init();
  846. #endif
  847. esp_phy_pd_mem_init();
  848. esp_bt_power_domain_on();
  849. btdm_controller_mem_init();
  850. #if CONFIG_MAC_BB_PD
  851. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  852. err = ESP_ERR_INVALID_ARG;
  853. goto error;
  854. }
  855. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  856. err = ESP_ERR_INVALID_ARG;
  857. goto error;
  858. }
  859. #endif
  860. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  861. if (osi_funcs_p == NULL) {
  862. return ESP_ERR_NO_MEM;
  863. }
  864. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  865. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  866. return ESP_ERR_INVALID_ARG;
  867. }
  868. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  869. // init low-power control resources
  870. do {
  871. // set default values for global states or resources
  872. s_lp_stat.val = 0;
  873. s_lp_cntl.val = 0;
  874. s_lp_cntl.main_xtal_pu = 0;
  875. s_wakeup_req_sem = NULL;
  876. s_btdm_slp_tmr = NULL;
  877. // configure and initialize resources
  878. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  879. s_lp_cntl.no_light_sleep = 0;
  880. if (s_lp_cntl.enable) {
  881. #if CONFIG_MAC_BB_PD
  882. if (!btdm_deep_sleep_mem_init()) {
  883. err = ESP_ERR_NO_MEM;
  884. goto error;
  885. }
  886. s_lp_cntl.mac_bb_pd = 1;
  887. #endif
  888. #ifdef CONFIG_PM_ENABLE
  889. s_lp_cntl.wakeup_timer_required = 1;
  890. #endif
  891. // async wakeup semaphore for VHCI
  892. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  893. if (s_wakeup_req_sem == NULL) {
  894. err = ESP_ERR_NO_MEM;
  895. goto error;
  896. }
  897. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  898. }
  899. if (s_lp_cntl.wakeup_timer_required) {
  900. esp_timer_create_args_t create_args = {
  901. .callback = btdm_slp_tmr_callback,
  902. .arg = NULL,
  903. .name = "btSlp",
  904. };
  905. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  906. goto error;
  907. }
  908. }
  909. // set default bluetooth sleep clock cycle and its fractional bits
  910. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  911. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  912. // set default bluetooth sleep clock source
  913. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  914. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  915. // check whether or not EXT_CRYS is working
  916. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_XTAL32K) {
  917. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
  918. } else {
  919. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock.");
  920. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  921. s_lp_cntl.no_light_sleep = 1;
  922. #endif
  923. }
  924. #elif (CONFIG_BT_CTRL_LPCLK_SEL_MAIN_XTAL)
  925. ESP_LOGI(BTDM_LOG_TAG, "Bluetooth will use main XTAL as Bluetooth sleep clock.");
  926. #if !CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  927. s_lp_cntl.no_light_sleep = 1;
  928. #endif
  929. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  930. // check whether or not internal 150 kHz RC oscillator is working
  931. if (rtc_clk_slow_src_get() == SOC_RTC_SLOW_CLK_SRC_RC_SLOW) {
  932. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
  933. ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
  934. "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
  935. } else {
  936. ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
  937. assert(0);
  938. }
  939. #endif
  940. bool select_src_ret __attribute__((unused));
  941. bool set_div_ret __attribute__((unused));
  942. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  943. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  944. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON));
  945. s_lp_cntl.main_xtal_pu = 1;
  946. #endif
  947. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  948. set_div_ret = btdm_lpclk_set_div(esp_clk_xtal_freq() / MHZ);
  949. assert(select_src_ret && set_div_ret);
  950. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  951. btdm_lpcycle_us = 1 << (btdm_lpcycle_us_frac);
  952. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  953. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  954. set_div_ret = btdm_lpclk_set_div(0);
  955. assert(select_src_ret && set_div_ret);
  956. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  957. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  958. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  959. assert(btdm_lpcycle_us != 0);
  960. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  961. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  962. set_div_ret = btdm_lpclk_set_div(0);
  963. assert(select_src_ret && set_div_ret);
  964. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  965. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  966. } else {
  967. err = ESP_ERR_INVALID_ARG;
  968. goto error;
  969. }
  970. #if CONFIG_SW_COEXIST_ENABLE
  971. coex_update_lpclk_interval();
  972. #endif
  973. #ifdef CONFIG_PM_ENABLE
  974. if (s_lp_cntl.no_light_sleep) {
  975. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  976. err = ESP_ERR_NO_MEM;
  977. goto error;
  978. }
  979. ESP_LOGW(BTDM_LOG_TAG, "Light sleep mode will not be able to apply when bluetooth is enabled.");
  980. }
  981. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  982. err = ESP_ERR_NO_MEM;
  983. goto error;
  984. } else {
  985. s_lp_stat.pm_lock_released = 1;
  986. }
  987. #endif
  988. } while (0);
  989. #if CONFIG_SW_COEXIST_ENABLE
  990. coex_init();
  991. #endif
  992. periph_module_enable(PERIPH_BT_MODULE);
  993. periph_module_reset(PERIPH_BT_MODULE);
  994. esp_phy_enable();
  995. s_lp_stat.phy_enabled = 1;
  996. if (btdm_controller_init(cfg) != 0) {
  997. err = ESP_ERR_NO_MEM;
  998. goto error;
  999. }
  1000. coex_pti_v2();
  1001. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1002. return ESP_OK;
  1003. error:
  1004. if (s_lp_stat.phy_enabled) {
  1005. esp_phy_disable();
  1006. s_lp_stat.phy_enabled = 0;
  1007. }
  1008. do {
  1009. // deinit low power control resources
  1010. #ifdef CONFIG_PM_ENABLE
  1011. if (s_lp_cntl.no_light_sleep) {
  1012. if (s_light_sleep_pm_lock != NULL) {
  1013. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1014. s_light_sleep_pm_lock = NULL;
  1015. }
  1016. }
  1017. if (s_pm_lock != NULL) {
  1018. esp_pm_lock_delete(s_pm_lock);
  1019. s_pm_lock = NULL;
  1020. s_lp_stat.pm_lock_released = 0;
  1021. }
  1022. #endif
  1023. if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
  1024. esp_timer_delete(s_btdm_slp_tmr);
  1025. s_btdm_slp_tmr = NULL;
  1026. }
  1027. #if CONFIG_MAC_BB_PD
  1028. if (s_lp_cntl.mac_bb_pd) {
  1029. btdm_deep_sleep_mem_deinit();
  1030. s_lp_cntl.mac_bb_pd = 0;
  1031. }
  1032. #endif
  1033. if (s_lp_cntl.enable) {
  1034. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1035. if (s_wakeup_req_sem != NULL) {
  1036. semphr_delete_wrapper(s_wakeup_req_sem);
  1037. s_wakeup_req_sem = NULL;
  1038. }
  1039. }
  1040. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1041. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1042. if (s_lp_cntl.main_xtal_pu) {
  1043. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
  1044. s_lp_cntl.main_xtal_pu = 0;
  1045. }
  1046. #endif
  1047. btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1048. btdm_lpclk_set_div(0);
  1049. #if CONFIG_SW_COEXIST_ENABLE
  1050. coex_update_lpclk_interval();
  1051. #endif
  1052. }
  1053. btdm_lpcycle_us = 0;
  1054. } while (0);
  1055. #if CONFIG_MAC_BB_PD
  1056. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1057. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1058. #endif
  1059. if (osi_funcs_p != NULL) {
  1060. free(osi_funcs_p);
  1061. osi_funcs_p = NULL;
  1062. }
  1063. return err;
  1064. }
  1065. esp_err_t esp_bt_controller_deinit(void)
  1066. {
  1067. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1068. return ESP_ERR_INVALID_STATE;
  1069. }
  1070. btdm_controller_deinit();
  1071. periph_module_disable(PERIPH_BT_MODULE);
  1072. if (s_lp_stat.phy_enabled) {
  1073. esp_phy_disable();
  1074. s_lp_stat.phy_enabled = 0;
  1075. } else {
  1076. assert(0);
  1077. }
  1078. // deinit low power control resources
  1079. do {
  1080. #if CONFIG_MAC_BB_PD
  1081. btdm_deep_sleep_mem_deinit();
  1082. #endif
  1083. #ifdef CONFIG_PM_ENABLE
  1084. if (s_lp_cntl.no_light_sleep) {
  1085. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1086. s_light_sleep_pm_lock = NULL;
  1087. }
  1088. esp_pm_lock_delete(s_pm_lock);
  1089. s_pm_lock = NULL;
  1090. s_lp_stat.pm_lock_released = 0;
  1091. #endif
  1092. if (s_lp_cntl.wakeup_timer_required) {
  1093. if (s_lp_stat.wakeup_timer_started) {
  1094. esp_timer_stop(s_btdm_slp_tmr);
  1095. }
  1096. s_lp_stat.wakeup_timer_started = 0;
  1097. esp_timer_delete(s_btdm_slp_tmr);
  1098. s_btdm_slp_tmr = NULL;
  1099. }
  1100. if (s_lp_cntl.enable) {
  1101. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1102. semphr_delete_wrapper(s_wakeup_req_sem);
  1103. s_wakeup_req_sem = NULL;
  1104. }
  1105. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1106. #ifdef CONFIG_BT_CTRL_MAIN_XTAL_PU_DURING_LIGHT_SLEEP
  1107. if (s_lp_cntl.main_xtal_pu) {
  1108. ESP_ERROR_CHECK(esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_OFF));
  1109. s_lp_cntl.main_xtal_pu = 0;
  1110. }
  1111. #endif
  1112. btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  1113. btdm_lpclk_set_div(0);
  1114. #if CONFIG_SW_COEXIST_ENABLE
  1115. coex_update_lpclk_interval();
  1116. #endif
  1117. }
  1118. btdm_lpcycle_us = 0;
  1119. } while (0);
  1120. #if CONFIG_MAC_BB_PD
  1121. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1122. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1123. #endif
  1124. /* Fix the issue caused by the power off the bt power domain.
  1125. * This issue is only on ESP32C3.
  1126. */
  1127. phy_init_flag();
  1128. esp_bt_power_domain_off();
  1129. #if CONFIG_MAC_BB_PD
  1130. esp_mac_bb_pd_mem_deinit();
  1131. #endif
  1132. esp_phy_pd_mem_deinit();
  1133. free(osi_funcs_p);
  1134. osi_funcs_p = NULL;
  1135. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1136. return ESP_OK;
  1137. }
  1138. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1139. {
  1140. int ret = ESP_OK;
  1141. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1142. return ESP_ERR_INVALID_STATE;
  1143. }
  1144. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1145. if (mode != btdm_controller_get_mode()) {
  1146. ESP_LOGE(BTDM_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1147. return ESP_ERR_INVALID_ARG;
  1148. }
  1149. #if CONFIG_SW_COEXIST_ENABLE
  1150. coex_enable();
  1151. #endif
  1152. // enable low power mode
  1153. do {
  1154. #ifdef CONFIG_PM_ENABLE
  1155. if (s_lp_cntl.no_light_sleep) {
  1156. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1157. }
  1158. esp_pm_lock_acquire(s_pm_lock);
  1159. s_lp_stat.pm_lock_released = 0;
  1160. #endif
  1161. if (s_lp_cntl.enable) {
  1162. btdm_controller_enable_sleep(true);
  1163. }
  1164. } while (0);
  1165. if (btdm_controller_enable(mode) != 0) {
  1166. ret = ESP_ERR_INVALID_STATE;
  1167. goto error;
  1168. }
  1169. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1170. return ret;
  1171. error:
  1172. // disable low power mode
  1173. do {
  1174. btdm_controller_enable_sleep(false);
  1175. #ifdef CONFIG_PM_ENABLE
  1176. if (s_lp_cntl.no_light_sleep) {
  1177. esp_pm_lock_release(s_light_sleep_pm_lock);
  1178. }
  1179. if (s_lp_stat.pm_lock_released == 0) {
  1180. esp_pm_lock_release(s_pm_lock);
  1181. s_lp_stat.pm_lock_released = 1;
  1182. }
  1183. #endif
  1184. } while (0);
  1185. return ret;
  1186. }
  1187. esp_err_t esp_bt_controller_disable(void)
  1188. {
  1189. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1190. return ESP_ERR_INVALID_STATE;
  1191. }
  1192. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1193. while (!btdm_power_state_active()){}
  1194. btdm_controller_disable();
  1195. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1196. #if CONFIG_SW_COEXIST_ENABLE
  1197. coex_disable();
  1198. #endif
  1199. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1200. // disable low power mode
  1201. do {
  1202. #ifdef CONFIG_PM_ENABLE
  1203. if (s_lp_cntl.no_light_sleep) {
  1204. esp_pm_lock_release(s_light_sleep_pm_lock);
  1205. }
  1206. if (s_lp_stat.pm_lock_released == 0) {
  1207. esp_pm_lock_release(s_pm_lock);
  1208. s_lp_stat.pm_lock_released = 1;
  1209. } else {
  1210. assert(0);
  1211. }
  1212. #endif
  1213. } while (0);
  1214. return ESP_OK;
  1215. }
  1216. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1217. {
  1218. return btdm_controller_status;
  1219. }
  1220. /* extra functions */
  1221. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1222. {
  1223. esp_err_t stat = ESP_FAIL;
  1224. switch (power_type) {
  1225. case ESP_BLE_PWR_TYPE_ADV:
  1226. case ESP_BLE_PWR_TYPE_SCAN:
  1227. case ESP_BLE_PWR_TYPE_DEFAULT:
  1228. if (ble_txpwr_set(power_type, power_level) == 0) {
  1229. stat = ESP_OK;
  1230. }
  1231. break;
  1232. default:
  1233. stat = ESP_ERR_NOT_SUPPORTED;
  1234. break;
  1235. }
  1236. return stat;
  1237. }
  1238. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1239. {
  1240. esp_power_level_t lvl;
  1241. switch (power_type) {
  1242. case ESP_BLE_PWR_TYPE_ADV:
  1243. case ESP_BLE_PWR_TYPE_SCAN:
  1244. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1245. break;
  1246. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1247. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1248. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1249. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1250. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1251. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1252. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1253. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1254. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1255. case ESP_BLE_PWR_TYPE_DEFAULT:
  1256. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1257. break;
  1258. default:
  1259. lvl = ESP_PWR_LVL_INVALID;
  1260. break;
  1261. }
  1262. return lvl;
  1263. }
  1264. esp_err_t esp_bt_sleep_enable (void)
  1265. {
  1266. esp_err_t status;
  1267. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1268. return ESP_ERR_INVALID_STATE;
  1269. }
  1270. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1271. btdm_controller_enable_sleep (true);
  1272. status = ESP_OK;
  1273. } else {
  1274. status = ESP_ERR_NOT_SUPPORTED;
  1275. }
  1276. return status;
  1277. }
  1278. esp_err_t esp_bt_sleep_disable (void)
  1279. {
  1280. esp_err_t status;
  1281. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1282. return ESP_ERR_INVALID_STATE;
  1283. }
  1284. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1285. btdm_controller_enable_sleep (false);
  1286. status = ESP_OK;
  1287. } else {
  1288. status = ESP_ERR_NOT_SUPPORTED;
  1289. }
  1290. return status;
  1291. }
  1292. bool esp_bt_controller_is_sleeping(void)
  1293. {
  1294. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1295. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1296. return false;
  1297. }
  1298. return !btdm_power_state_active();
  1299. }
  1300. void esp_bt_controller_wakeup_request(void)
  1301. {
  1302. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1303. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1304. return;
  1305. }
  1306. btdm_wakeup_request();
  1307. }
  1308. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1309. {
  1310. return btdm_hci_tl_io_event_post(event);
  1311. }
  1312. uint16_t esp_bt_get_tx_buf_num(void)
  1313. {
  1314. #if !defined(CONFIG_IDF_RTOS_RTTHREAD)
  1315. return l2c_ble_link_get_tx_buf_num();
  1316. #endif /* CONFIG_IDF_RTOS_RTTHREAD */
  1317. }
  1318. static void coex_wifi_sleep_set_hook(bool sleep)
  1319. {
  1320. }
  1321. #endif /* CONFIG_BT_ENABLED */