pulse_cnt.c 29 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <stdint.h>
  7. #include <sys/lock.h>
  8. #include "sdkconfig.h"
  9. #if CONFIG_PCNT_ENABLE_DEBUG_LOG
  10. // The local log level must be defined before including esp_log.h
  11. // Set the maximum log level for this source file
  12. #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  13. #endif
  14. #include "freertos/FreeRTOS.h"
  15. #include "esp_heap_caps.h"
  16. #include "esp_intr_alloc.h"
  17. #include "esp_attr.h"
  18. #include "esp_log.h"
  19. #include "esp_check.h"
  20. #include "esp_pm.h"
  21. #include "esp_rom_gpio.h"
  22. #include "soc/soc_caps.h"
  23. #include "soc/pcnt_periph.h"
  24. #include "soc/gpio_pins.h"
  25. #include "hal/pcnt_hal.h"
  26. #include "hal/pcnt_ll.h"
  27. #include "hal/gpio_hal.h"
  28. #include "esp_private/esp_clk.h"
  29. #include "esp_private/periph_ctrl.h"
  30. #include "driver/gpio.h"
  31. #include "driver/pulse_cnt.h"
  32. #include "esp_memory_utils.h"
  33. // If ISR handler is allowed to run whilst cache is disabled,
  34. // Make sure all the code and related variables used by the handler are in the SRAM
  35. #if CONFIG_PCNT_ISR_IRAM_SAFE || CONFIG_PCNT_CTRL_FUNC_IN_IRAM
  36. #define PCNT_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
  37. #else
  38. #define PCNT_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
  39. #endif
  40. #if CONFIG_PCNT_ISR_IRAM_SAFE
  41. #define PCNT_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
  42. #else
  43. #define PCNT_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_INTRDISABLED | ESP_INTR_FLAG_SHARED)
  44. #endif
  45. #define PCNT_PM_LOCK_NAME_LEN_MAX 16
  46. static const char *TAG = "pcnt";
  47. typedef struct pcnt_platform_t pcnt_platform_t;
  48. typedef struct pcnt_group_t pcnt_group_t;
  49. typedef struct pcnt_unit_t pcnt_unit_t;
  50. typedef struct pcnt_chan_t pcnt_chan_t;
  51. struct pcnt_platform_t {
  52. _lock_t mutex; // platform level mutex lock
  53. pcnt_group_t *groups[SOC_PCNT_GROUPS]; // pcnt group pool
  54. int group_ref_counts[SOC_PCNT_GROUPS]; // reference count used to protect group install/uninstall
  55. };
  56. struct pcnt_group_t {
  57. int group_id; // Group ID, index from 0
  58. portMUX_TYPE spinlock; // to protect per-group register level concurrent access
  59. pcnt_hal_context_t hal;
  60. pcnt_unit_t *units[SOC_PCNT_UNITS_PER_GROUP]; // array of PCNT units
  61. };
  62. typedef struct {
  63. pcnt_ll_watch_event_id_t event_id; // event type
  64. int watch_point_value; // value to be watched
  65. } pcnt_watch_point_t;
  66. typedef enum {
  67. PCNT_UNIT_FSM_INIT,
  68. PCNT_UNIT_FSM_ENABLE,
  69. } pcnt_unit_fsm_t;
  70. struct pcnt_unit_t {
  71. pcnt_group_t *group; // which group the pcnt unit belongs to
  72. portMUX_TYPE spinlock; // Spinlock, stop one unit from accessing different parts of a same register concurrently
  73. int unit_id; // allocated unit numerical ID
  74. int low_limit; // low limit value
  75. int high_limit; // high limit value
  76. pcnt_chan_t *channels[SOC_PCNT_CHANNELS_PER_UNIT]; // array of PCNT channels
  77. pcnt_watch_point_t watchers[PCNT_LL_WATCH_EVENT_MAX]; // array of PCNT watchers
  78. intr_handle_t intr; // interrupt handle
  79. esp_pm_lock_handle_t pm_lock; // PM lock, for glitch filter, as that module can only be functional under APB
  80. #if CONFIG_PM_ENABLE
  81. char pm_lock_name[PCNT_PM_LOCK_NAME_LEN_MAX]; // pm lock name
  82. #endif
  83. pcnt_unit_fsm_t fsm; // record PCNT unit's driver state
  84. pcnt_watch_cb_t on_reach; // user registered callback function
  85. void *user_data; // user data registered by user, which would be passed to the right callback function
  86. };
  87. struct pcnt_chan_t {
  88. pcnt_unit_t *unit; // pointer to the PCNT unit where it derives from
  89. int channel_id; // channel ID, index from 0
  90. int edge_gpio_num;
  91. int level_gpio_num;
  92. };
  93. // pcnt driver platform, it's always a singleton
  94. static pcnt_platform_t s_platform;
  95. static pcnt_group_t *pcnt_acquire_group_handle(int group_id);
  96. static void pcnt_release_group_handle(pcnt_group_t *group);
  97. static void pcnt_default_isr(void *args);
  98. static esp_err_t pcnt_register_to_group(pcnt_unit_t *unit)
  99. {
  100. pcnt_group_t *group = NULL;
  101. int unit_id = -1;
  102. for (int i = 0; i < SOC_PCNT_GROUPS; i++) {
  103. group = pcnt_acquire_group_handle(i);
  104. ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
  105. // loop to search free unit in the group
  106. portENTER_CRITICAL(&group->spinlock);
  107. for (int j = 0; j < SOC_PCNT_UNITS_PER_GROUP; j++) {
  108. if (!group->units[j]) {
  109. unit_id = j;
  110. group->units[j] = unit;
  111. break;
  112. }
  113. }
  114. portEXIT_CRITICAL(&group->spinlock);
  115. if (unit_id < 0) {
  116. pcnt_release_group_handle(group);
  117. group = NULL;
  118. } else {
  119. unit->group = group;
  120. unit->unit_id = unit_id;
  121. break;
  122. }
  123. }
  124. ESP_RETURN_ON_FALSE(unit_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free unit");
  125. return ESP_OK;
  126. }
  127. static void pcnt_unregister_from_group(pcnt_unit_t *unit)
  128. {
  129. pcnt_group_t *group = unit->group;
  130. int unit_id = unit->unit_id;
  131. portENTER_CRITICAL(&group->spinlock);
  132. group->units[unit_id] = NULL;
  133. portEXIT_CRITICAL(&group->spinlock);
  134. // unit has a reference on group, release it now
  135. pcnt_release_group_handle(group);
  136. }
  137. static esp_err_t pcnt_destory(pcnt_unit_t *unit)
  138. {
  139. if (unit->pm_lock) {
  140. ESP_RETURN_ON_ERROR(esp_pm_lock_delete(unit->pm_lock), TAG, "delete pm lock failed");
  141. }
  142. if (unit->intr) {
  143. ESP_RETURN_ON_ERROR(esp_intr_free(unit->intr), TAG, "delete interrupt service failed");
  144. }
  145. if (unit->group) {
  146. pcnt_unregister_from_group(unit);
  147. }
  148. free(unit);
  149. return ESP_OK;
  150. }
  151. esp_err_t pcnt_new_unit(const pcnt_unit_config_t *config, pcnt_unit_handle_t *ret_unit)
  152. {
  153. #if CONFIG_PCNT_ENABLE_DEBUG_LOG
  154. esp_log_level_set(TAG, ESP_LOG_DEBUG);
  155. #endif
  156. esp_err_t ret = ESP_OK;
  157. pcnt_unit_t *unit = NULL;
  158. ESP_GOTO_ON_FALSE(config && ret_unit, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  159. ESP_GOTO_ON_FALSE(config->low_limit < 0 && config->high_limit > 0 && config->low_limit >= PCNT_LL_MIN_LIN &&
  160. config->high_limit <= PCNT_LL_MAX_LIM, ESP_ERR_INVALID_ARG, err, TAG,
  161. "invalid limit range:[%d,%d]", config->low_limit, config->high_limit);
  162. unit = heap_caps_calloc(1, sizeof(pcnt_unit_t), PCNT_MEM_ALLOC_CAPS);
  163. ESP_GOTO_ON_FALSE(unit, ESP_ERR_NO_MEM, err, TAG, "no mem for unit");
  164. // register unit to the group (because one group can have several units)
  165. ESP_GOTO_ON_ERROR(pcnt_register_to_group(unit), err, TAG, "register unit failed");
  166. pcnt_group_t *group = unit->group;
  167. int group_id = group->group_id;
  168. int unit_id = unit->unit_id;
  169. // some events are enabled by default, disable them all
  170. pcnt_ll_disable_all_events(group->hal.dev, unit_id);
  171. // disable filter by default
  172. pcnt_ll_enable_glitch_filter(group->hal.dev, unit_id, false);
  173. // set default high/low limitation value
  174. // note: limit value takes effect only after counter clear
  175. pcnt_ll_set_high_limit_value(group->hal.dev, unit_id, config->high_limit);
  176. pcnt_ll_set_low_limit_value(group->hal.dev, unit_id, config->low_limit);
  177. unit->high_limit = config->high_limit;
  178. unit->low_limit = config->low_limit;
  179. // clear/pause register is shared by all units, so using group's spinlock
  180. portENTER_CRITICAL(&group->spinlock);
  181. pcnt_ll_stop_count(group->hal.dev, unit_id);
  182. pcnt_ll_clear_count(group->hal.dev, unit_id);
  183. pcnt_ll_enable_intr(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id), false);
  184. pcnt_ll_clear_intr_status(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id));
  185. portEXIT_CRITICAL(&group->spinlock);
  186. unit->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  187. unit->fsm = PCNT_UNIT_FSM_INIT;
  188. for (int i = 0; i < PCNT_LL_WATCH_EVENT_MAX; i++) {
  189. unit->watchers[i].event_id = PCNT_LL_WATCH_EVENT_INVALID; // invalid all watch point
  190. }
  191. ESP_LOGD(TAG, "new pcnt unit (%d,%d) at %p, count range:[%d,%d]", group_id, unit_id, unit, unit->low_limit, unit->high_limit);
  192. *ret_unit = unit;
  193. return ESP_OK;
  194. err:
  195. if (unit) {
  196. pcnt_destory(unit);
  197. }
  198. return ret;
  199. }
  200. esp_err_t pcnt_del_unit(pcnt_unit_handle_t unit)
  201. {
  202. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  203. ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
  204. pcnt_group_t *group = unit->group;
  205. int group_id = group->group_id;
  206. int unit_id = unit->unit_id;
  207. for (int i = 0; i < SOC_PCNT_CHANNELS_PER_UNIT; i++) {
  208. ESP_RETURN_ON_FALSE(!unit->channels[i], ESP_ERR_INVALID_STATE, TAG, "channel %d still in working", i);
  209. }
  210. ESP_LOGD(TAG, "del unit (%d,%d)", group_id, unit_id);
  211. // recycle memory resource
  212. ESP_RETURN_ON_ERROR(pcnt_destory(unit), TAG, "destory pcnt unit failed");
  213. return ESP_OK;
  214. }
  215. esp_err_t pcnt_unit_set_glitch_filter(pcnt_unit_handle_t unit, const pcnt_glitch_filter_config_t *config)
  216. {
  217. pcnt_group_t *group = NULL;
  218. uint32_t glitch_filter_thres = 0;
  219. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  220. // glitch filter should be set only when unit is in init state
  221. ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
  222. group = unit->group;
  223. if (config) {
  224. glitch_filter_thres = esp_clk_apb_freq() / 1000000 * config->max_glitch_ns / 1000;
  225. ESP_RETURN_ON_FALSE(glitch_filter_thres <= PCNT_LL_MAX_GLITCH_WIDTH, ESP_ERR_INVALID_ARG, TAG, "glitch width out of range");
  226. // The filter module is working against APB clock, so lazy install PM lock
  227. #if CONFIG_PM_ENABLE
  228. if (!unit->pm_lock) {
  229. sprintf(unit->pm_lock_name, "pcnt_%d_%d", group->group_id, unit->unit_id); // e.g. pcnt_0_0
  230. ESP_RETURN_ON_ERROR(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, unit->pm_lock_name, &unit->pm_lock), TAG, "install pm lock failed");
  231. ESP_LOGD(TAG, "install APB_FREQ_MAX lock for unit (%d,%d)", group->group_id, unit->unit_id);
  232. }
  233. #endif
  234. }
  235. // filter control bit is mixed with other PCNT control bits in the same register
  236. portENTER_CRITICAL(&unit->spinlock);
  237. if (config) {
  238. pcnt_ll_set_glitch_filter_thres(group->hal.dev, unit->unit_id, glitch_filter_thres);
  239. pcnt_ll_enable_glitch_filter(group->hal.dev, unit->unit_id, true);
  240. } else {
  241. pcnt_ll_enable_glitch_filter(group->hal.dev, unit->unit_id, false);
  242. }
  243. portEXIT_CRITICAL(&unit->spinlock);
  244. return ESP_OK;
  245. }
  246. esp_err_t pcnt_unit_enable(pcnt_unit_handle_t unit)
  247. {
  248. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  249. ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
  250. // acquire power manager lock
  251. if (unit->pm_lock) {
  252. ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(unit->pm_lock), TAG, "acquire pm_lock failed");
  253. }
  254. // enable interrupt service
  255. if (unit->intr) {
  256. ESP_RETURN_ON_ERROR(esp_intr_enable(unit->intr), TAG, "enable interrupt service failed");
  257. }
  258. unit->fsm = PCNT_UNIT_FSM_ENABLE;
  259. return ESP_OK;
  260. }
  261. esp_err_t pcnt_unit_disable(pcnt_unit_handle_t unit)
  262. {
  263. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  264. ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "unit not in enable state");
  265. // disable interrupt service
  266. if (unit->intr) {
  267. ESP_RETURN_ON_ERROR(esp_intr_disable(unit->intr), TAG, "disable interrupt service failed");
  268. }
  269. // release power manager lock
  270. if (unit->pm_lock) {
  271. ESP_RETURN_ON_ERROR(esp_pm_lock_release(unit->pm_lock), TAG, "release APB_FREQ_MAX lock failed");
  272. }
  273. unit->fsm = PCNT_UNIT_FSM_INIT;
  274. return ESP_OK;
  275. }
  276. esp_err_t pcnt_unit_start(pcnt_unit_handle_t unit)
  277. {
  278. ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  279. ESP_RETURN_ON_FALSE_ISR(unit->fsm == PCNT_UNIT_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "unit not enabled yet");
  280. pcnt_group_t *group = unit->group;
  281. // all PCNT units share the same register to control counter
  282. portENTER_CRITICAL_SAFE(&group->spinlock);
  283. pcnt_ll_start_count(group->hal.dev, unit->unit_id);
  284. portEXIT_CRITICAL_SAFE(&group->spinlock);
  285. return ESP_OK;
  286. }
  287. esp_err_t pcnt_unit_stop(pcnt_unit_handle_t unit)
  288. {
  289. ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  290. ESP_RETURN_ON_FALSE_ISR(unit->fsm == PCNT_UNIT_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "unit not enabled yet");
  291. pcnt_group_t *group = unit->group;
  292. // all PCNT units share the same register to control counter
  293. portENTER_CRITICAL_SAFE(&group->spinlock);
  294. pcnt_ll_stop_count(group->hal.dev, unit->unit_id);
  295. portEXIT_CRITICAL_SAFE(&group->spinlock);
  296. return ESP_OK;
  297. }
  298. esp_err_t pcnt_unit_clear_count(pcnt_unit_handle_t unit)
  299. {
  300. pcnt_group_t *group = NULL;
  301. ESP_RETURN_ON_FALSE_ISR(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  302. group = unit->group;
  303. // all PCNT units share the same register to control counter
  304. portENTER_CRITICAL_SAFE(&group->spinlock);
  305. pcnt_ll_clear_count(group->hal.dev, unit->unit_id);
  306. portEXIT_CRITICAL_SAFE(&group->spinlock);
  307. return ESP_OK;
  308. }
  309. esp_err_t pcnt_unit_get_count(pcnt_unit_handle_t unit, int *value)
  310. {
  311. pcnt_group_t *group = NULL;
  312. ESP_RETURN_ON_FALSE_ISR(unit && value, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  313. group = unit->group;
  314. *value = pcnt_ll_get_count(group->hal.dev, unit->unit_id);
  315. return ESP_OK;
  316. }
  317. esp_err_t pcnt_unit_register_event_callbacks(pcnt_unit_handle_t unit, const pcnt_event_callbacks_t *cbs, void *user_data)
  318. {
  319. ESP_RETURN_ON_FALSE(unit && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  320. // unit event callbacks should be registered in init state
  321. pcnt_group_t *group = unit->group;
  322. int group_id = group->group_id;
  323. int unit_id = unit->unit_id;
  324. #if CONFIG_PCNT_ISR_IRAM_SAFE
  325. if (cbs->on_reach) {
  326. ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_reach), ESP_ERR_INVALID_ARG, TAG, "on_reach callback not in IRAM");
  327. }
  328. if (user_data) {
  329. ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
  330. }
  331. #endif
  332. // lazy install interrupt service
  333. if (!unit->intr) {
  334. ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
  335. int isr_flags = PCNT_INTR_ALLOC_FLAGS;
  336. ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(pcnt_periph_signals.groups[group_id].irq, isr_flags,
  337. (uint32_t)pcnt_ll_get_intr_status_reg(group->hal.dev), PCNT_LL_UNIT_WATCH_EVENT(unit_id),
  338. pcnt_default_isr, unit, &unit->intr),
  339. TAG, "install interrupt service failed");
  340. }
  341. // enable/disable PCNT interrupt events
  342. portENTER_CRITICAL(&group->spinlock);
  343. pcnt_ll_enable_intr(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id), cbs->on_reach != NULL);
  344. portEXIT_CRITICAL(&group->spinlock);
  345. unit->on_reach = cbs->on_reach;
  346. unit->user_data = user_data;
  347. return ESP_OK;
  348. }
  349. esp_err_t pcnt_unit_add_watch_point(pcnt_unit_handle_t unit, int watch_point)
  350. {
  351. esp_err_t ret = ESP_OK;
  352. pcnt_group_t *group = NULL;
  353. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  354. ESP_RETURN_ON_FALSE(watch_point <= unit->high_limit && watch_point >= unit->low_limit,
  355. ESP_ERR_INVALID_ARG, TAG, "watch_point out of limit");
  356. group = unit->group;
  357. // event enable/disable is mixed with other control function in the same register
  358. portENTER_CRITICAL(&unit->spinlock);
  359. // zero cross watch point
  360. if (watch_point == 0) {
  361. if (unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
  362. ret = ESP_ERR_INVALID_STATE; // zero cross event watcher has been installed already
  363. } else {
  364. unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].event_id = PCNT_LL_WATCH_EVENT_ZERO_CROSS;
  365. unit->watchers[PCNT_LL_WATCH_EVENT_ZERO_CROSS].watch_point_value = 0;
  366. pcnt_ll_enable_zero_cross_event(group->hal.dev, unit->unit_id, true);
  367. }
  368. }
  369. // high limit watch point
  370. else if (watch_point == unit->high_limit) {
  371. if (unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
  372. ret = ESP_ERR_INVALID_STATE; // high limit event watcher has been installed already
  373. } else {
  374. unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].event_id = PCNT_LL_WATCH_EVENT_HIGH_LIMIT;
  375. unit->watchers[PCNT_LL_WATCH_EVENT_HIGH_LIMIT].watch_point_value = unit->high_limit;
  376. pcnt_ll_enable_high_limit_event(group->hal.dev, unit->unit_id, true);
  377. }
  378. }
  379. // low limit watch point
  380. else if (watch_point == unit->low_limit) {
  381. if (unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].event_id != PCNT_LL_WATCH_EVENT_INVALID) {
  382. ret = ESP_ERR_INVALID_STATE; // low limit event watcher has been installed already
  383. } else {
  384. unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].event_id = PCNT_LL_WATCH_EVENT_LOW_LIMIT;
  385. unit->watchers[PCNT_LL_WATCH_EVENT_LOW_LIMIT].watch_point_value = unit->low_limit;
  386. pcnt_ll_enable_low_limit_event(group->hal.dev, unit->unit_id, true);
  387. }
  388. }
  389. // other threshold watch point
  390. else {
  391. int thres_num = SOC_PCNT_THRES_POINT_PER_UNIT - 1;
  392. switch (thres_num) {
  393. case 1:
  394. if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].event_id == PCNT_LL_WATCH_EVENT_INVALID) {
  395. unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].event_id = PCNT_LL_WATCH_EVENT_THRES1;
  396. unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].watch_point_value = watch_point;
  397. pcnt_ll_set_thres_value(group->hal.dev, unit->unit_id, 1, watch_point);
  398. pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 1, true);
  399. break;
  400. } else if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES1].watch_point_value == watch_point) {
  401. ret = ESP_ERR_INVALID_STATE;
  402. break;
  403. }
  404. /* fall-through */
  405. case 0:
  406. if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].event_id == PCNT_LL_WATCH_EVENT_INVALID) {
  407. unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].event_id = PCNT_LL_WATCH_EVENT_THRES0;
  408. unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].watch_point_value = watch_point;
  409. pcnt_ll_set_thres_value(group->hal.dev, unit->unit_id, 0, watch_point);
  410. pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 0, true);
  411. break;
  412. } else if (unit->watchers[PCNT_LL_WATCH_EVENT_THRES0].watch_point_value == watch_point) {
  413. ret = ESP_ERR_INVALID_STATE;
  414. break;
  415. }
  416. /* fall-through */
  417. default:
  418. ret = ESP_ERR_NOT_FOUND; // no free threshold watch point available
  419. break;
  420. }
  421. }
  422. portEXIT_CRITICAL(&unit->spinlock);
  423. ESP_RETURN_ON_ERROR(ret, TAG, "add watchpoint %d failed", watch_point);
  424. return ESP_OK;
  425. }
  426. esp_err_t pcnt_unit_remove_watch_point(pcnt_unit_handle_t unit, int watch_point)
  427. {
  428. pcnt_group_t *group = NULL;
  429. ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  430. group = unit->group;
  431. pcnt_ll_watch_event_id_t event_id = PCNT_LL_WATCH_EVENT_INVALID;
  432. // event enable/disable is mixed with other control function in the same register
  433. portENTER_CRITICAL(&unit->spinlock);
  434. for (int i = 0; i < PCNT_LL_WATCH_EVENT_MAX; i++) {
  435. if (unit->watchers[i].event_id != PCNT_LL_WATCH_EVENT_INVALID && unit->watchers[i].watch_point_value == watch_point) {
  436. event_id = unit->watchers[i].event_id;
  437. unit->watchers[i].event_id = PCNT_LL_WATCH_EVENT_INVALID;
  438. break;
  439. }
  440. }
  441. switch (event_id) {
  442. case PCNT_LL_WATCH_EVENT_ZERO_CROSS:
  443. pcnt_ll_enable_zero_cross_event(group->hal.dev, unit->unit_id, false);
  444. break;
  445. case PCNT_LL_WATCH_EVENT_LOW_LIMIT:
  446. pcnt_ll_enable_low_limit_event(group->hal.dev, unit->unit_id, false);
  447. break;
  448. case PCNT_LL_WATCH_EVENT_HIGH_LIMIT:
  449. pcnt_ll_enable_high_limit_event(group->hal.dev, unit->unit_id, false);
  450. break;
  451. case PCNT_LL_WATCH_EVENT_THRES0:
  452. pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 0, false);
  453. break;
  454. case PCNT_LL_WATCH_EVENT_THRES1:
  455. pcnt_ll_enable_thres_event(group->hal.dev, unit->unit_id, 1, false);
  456. break;
  457. default:
  458. break;
  459. }
  460. portEXIT_CRITICAL(&unit->spinlock);
  461. ESP_RETURN_ON_FALSE(event_id != PCNT_LL_WATCH_EVENT_INVALID, ESP_ERR_INVALID_STATE, TAG, "watch point %d not added yet", watch_point);
  462. return ESP_OK;
  463. }
  464. esp_err_t pcnt_new_channel(pcnt_unit_handle_t unit, const pcnt_chan_config_t *config, pcnt_channel_handle_t *ret_chan)
  465. {
  466. esp_err_t ret = ESP_OK;
  467. pcnt_chan_t *channel = NULL;
  468. pcnt_group_t *group = NULL;
  469. ESP_GOTO_ON_FALSE(unit && config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  470. ESP_GOTO_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, err, TAG, "unit not in init state");
  471. group = unit->group;
  472. int group_id = group->group_id;
  473. int unit_id = unit->unit_id;
  474. channel = heap_caps_calloc(1, sizeof(pcnt_chan_t), PCNT_MEM_ALLOC_CAPS);
  475. ESP_GOTO_ON_FALSE(channel, ESP_ERR_NO_MEM, err, TAG, "no mem for channel");
  476. // search for a free channel
  477. int channel_id = -1;
  478. portENTER_CRITICAL(&unit->spinlock);
  479. for (int i = 0; i < SOC_PCNT_CHANNELS_PER_UNIT; i++) {
  480. if (!unit->channels[i]) {
  481. channel_id = i;
  482. unit->channels[channel_id] = channel;
  483. break;
  484. }
  485. }
  486. portEXIT_CRITICAL(&unit->spinlock);
  487. ESP_GOTO_ON_FALSE(channel_id != -1, ESP_ERR_NOT_FOUND, err, TAG, "no free channel in unit (%d,%d)", group_id, unit_id);
  488. // GPIO configuration
  489. gpio_config_t gpio_conf = {
  490. .intr_type = GPIO_INTR_DISABLE,
  491. .mode = GPIO_MODE_INPUT | (config->flags.io_loop_back ? GPIO_MODE_OUTPUT : 0), // also enable the output path if `io_loop_back` is enabled
  492. .pull_down_en = false,
  493. .pull_up_en = true,
  494. };
  495. if (config->edge_gpio_num >= 0) {
  496. gpio_conf.pin_bit_mask = 1ULL << config->edge_gpio_num;
  497. ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config edge GPIO failed");
  498. esp_rom_gpio_connect_in_signal(config->edge_gpio_num,
  499. pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].pulse_sig,
  500. config->flags.invert_edge_input);
  501. } else {
  502. // using virtual IO
  503. esp_rom_gpio_connect_in_signal(config->flags.virt_edge_io_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT,
  504. pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].pulse_sig,
  505. config->flags.invert_edge_input);
  506. }
  507. if (config->level_gpio_num >= 0) {
  508. gpio_conf.pin_bit_mask = 1ULL << config->level_gpio_num;
  509. ESP_GOTO_ON_ERROR(gpio_config(&gpio_conf), err, TAG, "config level GPIO failed");
  510. esp_rom_gpio_connect_in_signal(config->level_gpio_num,
  511. pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].control_sig,
  512. config->flags.invert_level_input);
  513. } else {
  514. // using virtual IO
  515. esp_rom_gpio_connect_in_signal(config->flags.virt_level_io_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT,
  516. pcnt_periph_signals.groups[group_id].units[unit_id].channels[channel_id].control_sig,
  517. config->flags.invert_level_input);
  518. }
  519. channel->channel_id = channel_id;
  520. channel->unit = unit;
  521. channel->edge_gpio_num = config->edge_gpio_num;
  522. channel->level_gpio_num = config->level_gpio_num;
  523. ESP_LOGD(TAG, "new pcnt channel(%d,%d,%d) at %p", group_id, unit_id, channel_id, channel);
  524. *ret_chan = channel;
  525. return ESP_OK;
  526. err:
  527. if (channel) {
  528. free(channel);
  529. }
  530. return ret;
  531. }
  532. esp_err_t pcnt_del_channel(pcnt_channel_handle_t chan)
  533. {
  534. ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  535. pcnt_unit_t *unit = chan->unit;
  536. pcnt_group_t *group = unit->group;
  537. int group_id = group->group_id;
  538. int unit_id = unit->unit_id;
  539. int channel_id = chan->channel_id;
  540. portENTER_CRITICAL(&unit->spinlock);
  541. unit->channels[channel_id] = NULL;
  542. portEXIT_CRITICAL(&unit->spinlock);
  543. if (chan->level_gpio_num >= 0) {
  544. gpio_reset_pin(chan->level_gpio_num);
  545. }
  546. if (chan->edge_gpio_num >= 0) {
  547. gpio_reset_pin(chan->edge_gpio_num);
  548. }
  549. free(chan);
  550. ESP_LOGD(TAG, "del pcnt channel(%d,%d,%d)", group_id, unit_id, channel_id);
  551. return ESP_OK;
  552. }
  553. esp_err_t pcnt_channel_set_edge_action(pcnt_channel_handle_t chan, pcnt_channel_edge_action_t pos_act, pcnt_channel_edge_action_t neg_act)
  554. {
  555. pcnt_group_t *group = NULL;
  556. ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  557. pcnt_unit_t *unit = chan->unit;
  558. group = unit->group;
  559. // mode control bits are mixed with other PCNT control bits in a same register
  560. portENTER_CRITICAL(&unit->spinlock);
  561. pcnt_ll_set_edge_action(group->hal.dev, unit->unit_id, chan->channel_id, pos_act, neg_act);
  562. portEXIT_CRITICAL(&unit->spinlock);
  563. return ESP_OK;
  564. }
  565. esp_err_t pcnt_channel_set_level_action(pcnt_channel_handle_t chan, pcnt_channel_level_action_t high_act, pcnt_channel_level_action_t low_act)
  566. {
  567. pcnt_group_t *group = NULL;
  568. ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
  569. pcnt_unit_t *unit = chan->unit;
  570. group = unit->group;
  571. // mode control bits are mixed with other PCNT control bits in a same register
  572. portENTER_CRITICAL(&unit->spinlock);
  573. pcnt_ll_set_level_action(group->hal.dev, unit->unit_id, chan->channel_id, high_act, low_act);
  574. portEXIT_CRITICAL(&unit->spinlock);
  575. return ESP_OK;
  576. }
  577. static pcnt_group_t *pcnt_acquire_group_handle(int group_id)
  578. {
  579. bool new_group = false;
  580. pcnt_group_t *group = NULL;
  581. // prevent install pcnt group concurrently
  582. _lock_acquire(&s_platform.mutex);
  583. if (!s_platform.groups[group_id]) {
  584. group = heap_caps_calloc(1, sizeof(pcnt_group_t), PCNT_MEM_ALLOC_CAPS);
  585. if (group) {
  586. new_group = true;
  587. s_platform.groups[group_id] = group; // register to platform
  588. // initialize pcnt group members
  589. group->group_id = group_id;
  590. group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  591. // enable APB access pcnt registers
  592. periph_module_enable(pcnt_periph_signals.groups[group_id].module);
  593. periph_module_reset(pcnt_periph_signals.groups[group_id].module);
  594. // initialize HAL context
  595. pcnt_hal_init(&group->hal, group_id);
  596. }
  597. } else {
  598. group = s_platform.groups[group_id];
  599. }
  600. if (group) {
  601. // someone acquired the group handle means we have a new object that refer to this group
  602. s_platform.group_ref_counts[group_id]++;
  603. }
  604. _lock_release(&s_platform.mutex);
  605. if (new_group) {
  606. ESP_LOGD(TAG, "new group (%d) at %p", group_id, group);
  607. }
  608. return group;
  609. }
  610. static void pcnt_release_group_handle(pcnt_group_t *group)
  611. {
  612. int group_id = group->group_id;
  613. bool do_deinitialize = false;
  614. _lock_acquire(&s_platform.mutex);
  615. s_platform.group_ref_counts[group_id]--;
  616. if (s_platform.group_ref_counts[group_id] == 0) {
  617. assert(s_platform.groups[group_id]);
  618. do_deinitialize = true;
  619. s_platform.groups[group_id] = NULL; // deregister from platform
  620. periph_module_disable(pcnt_periph_signals.groups[group_id].module);
  621. }
  622. _lock_release(&s_platform.mutex);
  623. if (do_deinitialize) {
  624. free(group);
  625. ESP_LOGD(TAG, "del group (%d)", group_id);
  626. }
  627. }
  628. IRAM_ATTR static void pcnt_default_isr(void *args)
  629. {
  630. bool need_yield = false;
  631. pcnt_unit_t *unit = (pcnt_unit_t *)args;
  632. int unit_id = unit->unit_id;
  633. pcnt_group_t *group = unit->group;
  634. pcnt_watch_cb_t on_reach = unit->on_reach;
  635. uint32_t intr_status = pcnt_ll_get_intr_status(group->hal.dev);
  636. if (intr_status & PCNT_LL_UNIT_WATCH_EVENT(unit_id)) {
  637. pcnt_ll_clear_intr_status(group->hal.dev, PCNT_LL_UNIT_WATCH_EVENT(unit_id));
  638. uint32_t event_status = pcnt_ll_get_event_status(group->hal.dev, unit_id);
  639. // iter on each event_id
  640. while (event_status) {
  641. int event_id = __builtin_ffs(event_status) - 1;
  642. event_status &= (event_status - 1); // clear the right most bit
  643. // invoked user registered callback
  644. if (on_reach) {
  645. pcnt_watch_event_data_t edata = {
  646. .watch_point_value = unit->watchers[event_id].watch_point_value,
  647. .zero_cross_mode = pcnt_ll_get_zero_cross_mode(group->hal.dev, unit_id),
  648. };
  649. if (on_reach(unit, &edata, unit->user_data)) {
  650. // check if we need to yield for high priority task
  651. need_yield = true;
  652. }
  653. }
  654. }
  655. }
  656. if (need_yield) {
  657. portYIELD_FROM_ISR();
  658. }
  659. }