test_uart.c 16 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include <sys/param.h>
  8. #include "unity.h"
  9. #include "test_utils.h" // unity_send_signal
  10. #include "driver/uart.h" // for the uart driver access
  11. #include "esp_log.h"
  12. #include "esp_system.h" // for uint32_t esp_random()
  13. #include "esp_rom_gpio.h"
  14. #include "soc/uart_periph.h"
  15. #define UART_TAG "Uart"
  16. #define UART_NUM1 (UART_NUM_1)
  17. #define BUF_SIZE (100)
  18. #define UART1_RX_PIN (5)
  19. #define UART1_TX_PIN (4)
  20. #define UART_BAUD_11520 (11520)
  21. #define UART_BAUD_115200 (115200)
  22. #define TOLERANCE (0.02) //baud rate error tolerance 2%.
  23. #define UART1_CTS_PIN (13)
  24. // RTS for RS485 Half-Duplex Mode manages DE/~RE
  25. #define UART1_RTS_PIN (18)
  26. // Number of packets to be send during test
  27. #define PACKETS_NUMBER (10)
  28. // Wait timeout for uart driver
  29. #define PACKET_READ_TICS (1000 / portTICK_PERIOD_MS)
  30. static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
  31. {
  32. uart_config_t uart_config = {
  33. .baud_rate = baud_rate,
  34. .source_clk = source_clk,
  35. .data_bits = UART_DATA_8_BITS,
  36. .parity = UART_PARITY_DISABLE,
  37. .stop_bits = UART_STOP_BITS_1,
  38. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  39. };
  40. uart_driver_install(UART_NUM1, BUF_SIZE * 2, BUF_SIZE * 2, 20, NULL, 0);
  41. uart_param_config(UART_NUM1, &uart_config);
  42. TEST_ESP_OK(uart_set_loop_back(UART_NUM1, true));
  43. }
  44. static volatile bool exit_flag;
  45. static void test_task(void *pvParameters)
  46. {
  47. SemaphoreHandle_t *sema = (SemaphoreHandle_t *) pvParameters;
  48. char* data = (char *) malloc(256);
  49. while (exit_flag == false) {
  50. uart_tx_chars(UART_NUM1, data, 256);
  51. // The uart_wait_tx_done() function does not block anything if ticks_to_wait = 0.
  52. uart_wait_tx_done(UART_NUM1, 0);
  53. }
  54. free(data);
  55. xSemaphoreGive(*sema);
  56. vTaskDelete(NULL);
  57. }
  58. static void test_task2(void *pvParameters)
  59. {
  60. while (exit_flag == false) {
  61. // This task obstruct a setting tx_done_sem semaphore in the UART interrupt.
  62. // It leads to waiting the ticks_to_wait time in uart_wait_tx_done() function.
  63. uart_disable_tx_intr(UART_NUM1);
  64. }
  65. vTaskDelete(NULL);
  66. }
  67. TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
  68. {
  69. uart_config(UART_BAUD_11520, UART_SCLK_DEFAULT);
  70. SemaphoreHandle_t exit_sema = xSemaphoreCreateBinary();
  71. exit_flag = false;
  72. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  73. xTaskCreate(test_task2, "tsk2", 2048, NULL, 5, NULL);
  74. printf("Waiting for 5 sec\n");
  75. vTaskDelay(5000 / portTICK_PERIOD_MS);
  76. exit_flag = true;
  77. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  78. vSemaphoreDelete(exit_sema);
  79. } else {
  80. TEST_FAIL_MESSAGE("uart_wait_tx_done is blocked");
  81. }
  82. TEST_ESP_OK(uart_driver_delete(UART_NUM1));
  83. }
  84. TEST_CASE("test uart get baud-rate", "[uart]")
  85. {
  86. #if SOC_UART_SUPPORT_REF_TICK
  87. uint32_t baud_rate1 = 0;
  88. printf("init uart%d, use reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_11520);
  89. uart_config(UART_BAUD_11520, UART_SCLK_REF_TICK);
  90. uart_get_baudrate(UART_NUM1, &baud_rate1);
  91. printf("get baud rate when use reftick: %d\n", (int)baud_rate1);
  92. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_11520 * TOLERANCE, UART_BAUD_11520, baud_rate1);
  93. #endif
  94. uint32_t baud_rate2 = 0;
  95. printf("init uart%d, unuse reftick, baud rate : %d\n", (int)UART_NUM1, (int)UART_BAUD_115200);
  96. uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT);
  97. uart_get_baudrate(UART_NUM1, &baud_rate2);
  98. printf("get baud rate when don't use reftick: %d\n", (int)baud_rate2);
  99. TEST_ASSERT_UINT32_WITHIN(UART_BAUD_115200 * TOLERANCE, UART_BAUD_115200, baud_rate2);
  100. uart_driver_delete(UART_NUM1);
  101. ESP_LOGI(UART_TAG, "get baud-rate test passed ....\n");
  102. }
  103. TEST_CASE("test uart tx data with break", "[uart]")
  104. {
  105. const int buf_len = 200;
  106. const int send_len = 128;
  107. const int brk_len = 10;
  108. char *psend = (char *)malloc(buf_len);
  109. TEST_ASSERT_NOT_NULL(psend);
  110. memset(psend, '0', buf_len);
  111. uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT);
  112. printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
  113. uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
  114. uart_wait_tx_done(UART_NUM1, (TickType_t)portMAX_DELAY);
  115. //If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
  116. printf("Send data with break test passed\n");
  117. free(psend);
  118. uart_driver_delete(UART_NUM1);
  119. }
  120. static void uart_word_len_set_get_test(int uart_num)
  121. {
  122. printf("uart word len set and get test\n");
  123. uart_word_length_t word_length_set = 0;
  124. uart_word_length_t word_length_get = 0;
  125. for (int i = 0; i < UART_DATA_BITS_MAX; i++) {
  126. word_length_set = UART_DATA_5_BITS + i;
  127. TEST_ESP_OK(uart_set_word_length(uart_num, word_length_set));
  128. TEST_ESP_OK(uart_get_word_length(uart_num, &word_length_get));
  129. TEST_ASSERT_EQUAL(word_length_set, word_length_get);
  130. }
  131. }
  132. static void uart_stop_bit_set_get_test(int uart_num)
  133. {
  134. printf("uart stop bit set and get test\n");
  135. uart_stop_bits_t stop_bit_set = 0;
  136. uart_stop_bits_t stop_bit_get = 0;
  137. for (int i = UART_STOP_BITS_1; i < UART_STOP_BITS_MAX; i++) {
  138. stop_bit_set = i;
  139. TEST_ESP_OK(uart_set_stop_bits(uart_num, stop_bit_set));
  140. TEST_ESP_OK(uart_get_stop_bits(uart_num, &stop_bit_get));
  141. TEST_ASSERT_EQUAL(stop_bit_set, stop_bit_get);
  142. }
  143. }
  144. static void uart_parity_set_get_test(int uart_num)
  145. {
  146. printf("uart parity set and get test\n");
  147. uart_parity_t parity_set[3] = {
  148. UART_PARITY_DISABLE,
  149. UART_PARITY_EVEN,
  150. UART_PARITY_ODD,
  151. };
  152. uart_parity_t parity_get = 0;
  153. for (int i = 0; i < 3; i++) {
  154. TEST_ESP_OK(uart_set_parity(uart_num, parity_set[i]));
  155. TEST_ESP_OK(uart_get_parity(uart_num, &parity_get));
  156. TEST_ASSERT_EQUAL(parity_set[i], parity_get);
  157. }
  158. }
  159. static void uart_hw_flow_set_get_test(int uart_num)
  160. {
  161. printf("uart hw flow control set and get test\n");
  162. uart_hw_flowcontrol_t flowcontrol_set = 0;
  163. uart_hw_flowcontrol_t flowcontrol_get = 0;
  164. for (int i = 0; i < UART_HW_FLOWCTRL_DISABLE; i++) {
  165. TEST_ESP_OK(uart_set_hw_flow_ctrl(uart_num, flowcontrol_set, 20));
  166. TEST_ESP_OK(uart_get_hw_flow_ctrl(uart_num, &flowcontrol_get));
  167. TEST_ASSERT_EQUAL(flowcontrol_set, flowcontrol_get);
  168. }
  169. }
  170. static void uart_wakeup_set_get_test(int uart_num)
  171. {
  172. printf("uart wake up set and get test\n");
  173. int wake_up_set = 0;
  174. int wake_up_get = 0;
  175. for (int i = 3; i < 0x3ff; i++) {
  176. wake_up_set = i;
  177. TEST_ESP_OK(uart_set_wakeup_threshold(uart_num, wake_up_set));
  178. TEST_ESP_OK(uart_get_wakeup_threshold(uart_num, &wake_up_get));
  179. TEST_ASSERT_EQUAL(wake_up_set, wake_up_get);
  180. }
  181. }
  182. TEST_CASE("uart general API test", "[uart]")
  183. {
  184. const int uart_num = UART_NUM1;
  185. uart_config_t uart_config = {
  186. .baud_rate = 115200,
  187. .data_bits = UART_DATA_8_BITS,
  188. .parity = UART_PARITY_DISABLE,
  189. .stop_bits = UART_STOP_BITS_1,
  190. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  191. .source_clk = UART_SCLK_DEFAULT,
  192. };
  193. uart_param_config(uart_num, &uart_config);
  194. uart_word_len_set_get_test(uart_num);
  195. uart_stop_bit_set_get_test(uart_num);
  196. uart_parity_set_get_test(uart_num);
  197. uart_hw_flow_set_get_test(uart_num);
  198. uart_wakeup_set_get_test(uart_num);
  199. }
  200. static void uart_write_task(void *param)
  201. {
  202. int uart_num = (int)param;
  203. uint8_t *tx_buf = (uint8_t *)malloc(1024);
  204. if(tx_buf == NULL) {
  205. TEST_FAIL_MESSAGE("tx buffer malloc fail");
  206. }
  207. for(int i = 1; i < 1023; i++) {
  208. tx_buf[i] = (i & 0xff);
  209. }
  210. for(int i = 0; i < 1024; i++) {
  211. //d[0] and d[1023] are header
  212. tx_buf[0] = (i & 0xff);
  213. tx_buf[1023] = ((~i) & 0xff);
  214. uart_write_bytes(uart_num, (const char*)tx_buf, 1024);
  215. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  216. }
  217. free(tx_buf);
  218. vTaskDelete(NULL);
  219. }
  220. /**
  221. * The following tests use loop back
  222. *
  223. * NOTE: In the following tests, because the internal loopback is enabled, the CTS signal is connected to
  224. * the RTS signal internally. However, On ESP32S3, they are not, and the CTS keeps the default level (which
  225. * is a high level). So the workaround is to map the CTS in_signal to a GPIO pin (here IO13 is used) and connect
  226. * the RTS output_signal to this IO.
  227. */
  228. TEST_CASE("uart read write test", "[uart]")
  229. {
  230. const int uart_num = UART_NUM1;
  231. uint8_t *rd_data = (uint8_t *)malloc(1024);
  232. if(rd_data == NULL) {
  233. TEST_FAIL_MESSAGE("rx buffer malloc fail");
  234. }
  235. uart_config_t uart_config = {
  236. .baud_rate = 2000000,
  237. .data_bits = UART_DATA_8_BITS,
  238. .parity = UART_PARITY_DISABLE,
  239. .stop_bits = UART_STOP_BITS_1,
  240. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  241. .source_clk = UART_SCLK_DEFAULT,
  242. .rx_flow_ctrl_thresh = 120
  243. };
  244. TEST_ESP_OK(uart_driver_install(uart_num, BUF_SIZE * 2, 0, 20, NULL, 0));
  245. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  246. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  247. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  248. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  249. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  250. TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
  251. vTaskDelay(1 / portTICK_PERIOD_MS); // make sure last byte has flushed from TX FIFO
  252. TEST_ESP_OK(uart_flush_input(uart_num));
  253. xTaskCreate(uart_write_task, "uart_write_task", 2048 * 4, (void *)uart_num, UNITY_FREERTOS_PRIORITY - 1, NULL);
  254. for (int i = 0; i < 1024; i++) {
  255. int bytes_remaining = 1024;
  256. memset(rd_data, 0, 1024);
  257. while (bytes_remaining) {
  258. int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, (TickType_t)1000);
  259. if (bytes_received < 0) {
  260. TEST_FAIL_MESSAGE("read timeout, uart read write test fail");
  261. }
  262. bytes_remaining -= bytes_received;
  263. }
  264. int check_fail_cnt = 0;
  265. if (rd_data[0] != (i & 0xff)) {
  266. printf("packet %d index check error at offset 0, expected 0x%02x\n", i, i);
  267. ++check_fail_cnt;
  268. }
  269. if (rd_data[1023] != ((~i) & 0xff)) {
  270. printf("packet %d index check error at offset 1023, expected 0x%02x\n", i, ((~i) & 0xff));
  271. ++check_fail_cnt;
  272. }
  273. for (int j = 1; j < 1023; j++) {
  274. if (rd_data[j] != (j & 0xff)) {
  275. printf("data mismatch in packet %d offset %d, expected 0x%02x got 0x%02x\n", i, j, (j & 0xff), rd_data[j]);
  276. ++check_fail_cnt;
  277. }
  278. if (check_fail_cnt > 10) {
  279. printf("(further checks skipped)\n");
  280. break;
  281. }
  282. }
  283. if (check_fail_cnt > 0) {
  284. ESP_LOG_BUFFER_HEX("rd_data", rd_data, 1024);
  285. TEST_FAIL();
  286. }
  287. }
  288. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  289. uart_driver_delete(uart_num);
  290. free(rd_data);
  291. }
  292. TEST_CASE("uart tx with ringbuffer test", "[uart]")
  293. {
  294. const int uart_num = UART_NUM1;
  295. uint8_t *rd_data = (uint8_t *)malloc(1024);
  296. uint8_t *wr_data = (uint8_t *)malloc(1024);
  297. if(rd_data == NULL || wr_data == NULL) {
  298. TEST_FAIL_MESSAGE("buffer malloc fail");
  299. }
  300. uart_config_t uart_config = {
  301. .baud_rate = 2000000,
  302. .data_bits = UART_DATA_8_BITS,
  303. .parity = UART_PARITY_DISABLE,
  304. .stop_bits = UART_STOP_BITS_1,
  305. .flow_ctrl = UART_HW_FLOWCTRL_CTS_RTS,
  306. .rx_flow_ctrl_thresh = 120,
  307. .source_clk = UART_SCLK_DEFAULT,
  308. };
  309. uart_wait_tx_idle_polling(uart_num);
  310. TEST_ESP_OK(uart_param_config(uart_num, &uart_config));
  311. TEST_ESP_OK(uart_driver_install(uart_num, 1024 * 2, 1024 *2, 20, NULL, 0));
  312. TEST_ESP_OK(uart_set_loop_back(uart_num, true));
  313. TEST_ESP_OK(uart_set_pin(uart_num, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART1_CTS_PIN));
  314. //Connect the RTS out_signal to the CTS pin (which is mapped to CTS in_signal)
  315. esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
  316. for (int i = 0; i < 1024; i++) {
  317. wr_data[i] = i;
  318. rd_data[i] = 0;
  319. }
  320. size_t tx_buffer_free_space;
  321. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  322. TEST_ASSERT_EQUAL_INT(2048, tx_buffer_free_space); // full tx buffer space is free
  323. uart_write_bytes(uart_num, (const char*)wr_data, 1024);
  324. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  325. TEST_ASSERT_LESS_THAN(2048, tx_buffer_free_space); // tx transmit in progress: tx buffer has content
  326. TEST_ASSERT_GREATER_OR_EQUAL(1024, tx_buffer_free_space);
  327. uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
  328. uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
  329. TEST_ASSERT_EQUAL_INT(2048, tx_buffer_free_space); // tx done: tx buffer back to empty
  330. uart_read_bytes(uart_num, rd_data, 1024, (TickType_t)1000);
  331. TEST_ASSERT_EQUAL_HEX8_ARRAY(wr_data, rd_data, 1024);
  332. TEST_ESP_OK(uart_driver_delete(uart_num));
  333. free(rd_data);
  334. free(wr_data);
  335. }
  336. TEST_CASE("uart int state restored after flush", "[uart]")
  337. {
  338. /**
  339. * The first goal of this test is to make sure that when our RX FIFO is full,
  340. * we can continue receiving back data after flushing
  341. * For more details, check IDF-4374
  342. */
  343. uart_config_t uart_config = {
  344. .baud_rate = 115200,
  345. .data_bits = UART_DATA_8_BITS,
  346. .parity = UART_PARITY_DISABLE,
  347. .stop_bits = UART_STOP_BITS_1,
  348. .flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
  349. .source_clk = UART_SCLK_DEFAULT,
  350. };
  351. const uart_port_t uart_echo = UART_NUM_1;
  352. const int uart_tx_signal = U1TXD_OUT_IDX;
  353. const int uart_tx = UART1_TX_PIN;
  354. const int uart_rx = UART1_RX_PIN;
  355. const int buf_size = 256;
  356. const int intr_alloc_flags = 0;
  357. TEST_ESP_OK(uart_driver_install(uart_echo, buf_size * 2, 0, 0, NULL, intr_alloc_flags));
  358. TEST_ESP_OK(uart_param_config(uart_echo, &uart_config));
  359. TEST_ESP_OK(uart_set_pin(uart_echo, uart_tx, uart_rx, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));
  360. /* Make sure UART2's RX signal is connected to TX pin
  361. * This creates a loop that lets us receive anything we send on the UART */
  362. esp_rom_gpio_connect_out_signal(uart_rx, uart_tx_signal, false, false);
  363. uint8_t *data = (uint8_t *) malloc(buf_size);
  364. TEST_ASSERT_NOT_NULL(data);
  365. uart_write_bytes(uart_echo, (const char *) data, buf_size);
  366. /* As we set up a loopback, we can read them back on RX */
  367. int len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_PERIOD_MS);
  368. TEST_ASSERT_EQUAL(len, buf_size);
  369. /* Fill the RX buffer, this should disable the RX interrupts */
  370. int written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  371. TEST_ASSERT_NOT_EQUAL(-1, written);
  372. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  373. TEST_ASSERT_NOT_EQUAL(-1, written);
  374. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  375. TEST_ASSERT_NOT_EQUAL(-1, written);
  376. /* Flush the input buffer, RX interrupts should be re-enabled */
  377. uart_flush_input(uart_echo);
  378. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  379. TEST_ASSERT_NOT_EQUAL(-1, written);
  380. len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_PERIOD_MS);
  381. /* len equals buf_size bytes if interrupts were indeed re-enabled */
  382. TEST_ASSERT_EQUAL(len, buf_size);
  383. /**
  384. * Second test, make sure that if we explicitly disable the RX interrupts,
  385. * they are NOT re-enabled after flushing
  386. * To do so, start by cleaning the RX FIFO, disable the RX interrupts,
  387. * flush again, send data to the UART and check that we haven't received
  388. * any of the bytes */
  389. uart_flush_input(uart_echo);
  390. uart_disable_rx_intr(uart_echo);
  391. uart_flush_input(uart_echo);
  392. written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
  393. TEST_ASSERT_NOT_EQUAL(-1, written);
  394. len = uart_read_bytes(uart_echo, data, buf_size, 250 / portTICK_PERIOD_MS);
  395. TEST_ASSERT_EQUAL(len, 0);
  396. TEST_ESP_OK(uart_driver_delete(uart_echo));
  397. free(data);
  398. }