esp_efuse_table.c 33 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112
  1. /*
  2. * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_efuse.h"
  8. #include <assert.h>
  9. #include "esp_efuse_table.h"
  10. // md5_digest_table d006c80095638b5dbdc8649bf7e04dce
  11. // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
  12. // If you want to change some fields, you need to change esp_efuse_table.csv file
  13. // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
  14. // To show efuse_table run the command 'show_efuse_table'.
  15. static const esp_efuse_desc_t WR_DIS[] = {
  16. {EFUSE_BLK0, 0, 32}, // Write protection,
  17. };
  18. static const esp_efuse_desc_t WR_DIS_RD_DIS[] = {
  19. {EFUSE_BLK0, 0, 1}, // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2,
  20. };
  21. static const esp_efuse_desc_t WR_DIS_GROUP_1[] = {
  22. {EFUSE_BLK0, 2, 1}, // Write protection for DIS_ICACHE DIS_DOWNLOAD_ICACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT,
  23. };
  24. static const esp_efuse_desc_t WR_DIS_GROUP_2[] = {
  25. {EFUSE_BLK0, 3, 1}, // Write protection for WDT_DELAY_SEL,
  26. };
  27. static const esp_efuse_desc_t WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  28. {EFUSE_BLK0, 4, 1}, // Write protection for SPI_BOOT_CRYPT_CNT,
  29. };
  30. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  31. {EFUSE_BLK0, 5, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE0,
  32. };
  33. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  34. {EFUSE_BLK0, 6, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE1,
  35. };
  36. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  37. {EFUSE_BLK0, 7, 1}, // Write protection for SECURE_BOOT_KEY_REVOKE2,
  38. };
  39. static const esp_efuse_desc_t WR_DIS_KEY0_PURPOSE[] = {
  40. {EFUSE_BLK0, 8, 1}, // Write protection for key_purpose. KEY0,
  41. };
  42. static const esp_efuse_desc_t WR_DIS_KEY1_PURPOSE[] = {
  43. {EFUSE_BLK0, 9, 1}, // Write protection for key_purpose. KEY1,
  44. };
  45. static const esp_efuse_desc_t WR_DIS_KEY2_PURPOSE[] = {
  46. {EFUSE_BLK0, 10, 1}, // Write protection for key_purpose. KEY2,
  47. };
  48. static const esp_efuse_desc_t WR_DIS_KEY3_PURPOSE[] = {
  49. {EFUSE_BLK0, 11, 1}, // Write protection for key_purpose. KEY3,
  50. };
  51. static const esp_efuse_desc_t WR_DIS_KEY4_PURPOSE[] = {
  52. {EFUSE_BLK0, 12, 1}, // Write protection for key_purpose. KEY4,
  53. };
  54. static const esp_efuse_desc_t WR_DIS_KEY5_PURPOSE[] = {
  55. {EFUSE_BLK0, 13, 1}, // Write protection for key_purpose. KEY5,
  56. };
  57. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_EN[] = {
  58. {EFUSE_BLK0, 15, 1}, // Write protection for SECURE_BOOT_EN,
  59. };
  60. static const esp_efuse_desc_t WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  61. {EFUSE_BLK0, 16, 1}, // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE,
  62. };
  63. static const esp_efuse_desc_t WR_DIS_GROUP_3[] = {
  64. {EFUSE_BLK0, 18, 1}, // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION,
  65. };
  66. static const esp_efuse_desc_t WR_DIS_BLK1[] = {
  67. {EFUSE_BLK0, 20, 1}, // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS,
  68. };
  69. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART1[] = {
  70. {EFUSE_BLK0, 21, 1}, // Write protection for EFUSE_BLK2. SYS_DATA_PART1,
  71. };
  72. static const esp_efuse_desc_t WR_DIS_USER_DATA[] = {
  73. {EFUSE_BLK0, 22, 1}, // Write protection for EFUSE_BLK3. USER_DATA,
  74. };
  75. static const esp_efuse_desc_t WR_DIS_KEY0[] = {
  76. {EFUSE_BLK0, 23, 1}, // Write protection for EFUSE_BLK4. KEY0,
  77. };
  78. static const esp_efuse_desc_t WR_DIS_KEY1[] = {
  79. {EFUSE_BLK0, 24, 1}, // Write protection for EFUSE_BLK5. KEY1,
  80. };
  81. static const esp_efuse_desc_t WR_DIS_KEY2[] = {
  82. {EFUSE_BLK0, 25, 1}, // Write protection for EFUSE_BLK6. KEY2,
  83. };
  84. static const esp_efuse_desc_t WR_DIS_KEY3[] = {
  85. {EFUSE_BLK0, 26, 1}, // Write protection for EFUSE_BLK7. KEY3,
  86. };
  87. static const esp_efuse_desc_t WR_DIS_KEY4[] = {
  88. {EFUSE_BLK0, 27, 1}, // Write protection for EFUSE_BLK8. KEY4,
  89. };
  90. static const esp_efuse_desc_t WR_DIS_KEY5[] = {
  91. {EFUSE_BLK0, 28, 1}, // Write protection for EFUSE_BLK9. KEY5,
  92. };
  93. static const esp_efuse_desc_t WR_DIS_SYS_DATA_PART2[] = {
  94. {EFUSE_BLK0, 29, 1}, // Write protection for EFUSE_BLK10. SYS_DATA_PART2,
  95. };
  96. static const esp_efuse_desc_t RD_DIS[] = {
  97. {EFUSE_BLK0, 32, 7}, // Read protection,
  98. };
  99. static const esp_efuse_desc_t RD_DIS_KEY0[] = {
  100. {EFUSE_BLK0, 32, 1}, // Read protection for EFUSE_BLK4. KEY0,
  101. };
  102. static const esp_efuse_desc_t RD_DIS_KEY1[] = {
  103. {EFUSE_BLK0, 33, 1}, // Read protection for EFUSE_BLK5. KEY1,
  104. };
  105. static const esp_efuse_desc_t RD_DIS_KEY2[] = {
  106. {EFUSE_BLK0, 34, 1}, // Read protection for EFUSE_BLK6. KEY2,
  107. };
  108. static const esp_efuse_desc_t RD_DIS_KEY3[] = {
  109. {EFUSE_BLK0, 35, 1}, // Read protection for EFUSE_BLK7. KEY3,
  110. };
  111. static const esp_efuse_desc_t RD_DIS_KEY4[] = {
  112. {EFUSE_BLK0, 36, 1}, // Read protection for EFUSE_BLK8. KEY4,
  113. };
  114. static const esp_efuse_desc_t RD_DIS_KEY5[] = {
  115. {EFUSE_BLK0, 37, 1}, // Read protection for EFUSE_BLK9. KEY5,
  116. };
  117. static const esp_efuse_desc_t RD_DIS_SYS_DATA_PART2[] = {
  118. {EFUSE_BLK0, 38, 1}, // Read protection for EFUSE_BLK10. SYS_DATA_PART2,
  119. };
  120. static const esp_efuse_desc_t DIS_ICACHE[] = {
  121. {EFUSE_BLK0, 40, 1}, // Disable Icache,
  122. };
  123. static const esp_efuse_desc_t DIS_USB_JTAG[] = {
  124. {EFUSE_BLK0, 41, 1}, // Disable USB JTAG,
  125. };
  126. static const esp_efuse_desc_t DIS_DOWNLOAD_ICACHE[] = {
  127. {EFUSE_BLK0, 42, 1}, // Disable Icache in download mode,
  128. };
  129. static const esp_efuse_desc_t DIS_USB_DEVICE[] = {
  130. {EFUSE_BLK0, 43, 1}, // Disable USB_DEVICE,
  131. };
  132. static const esp_efuse_desc_t DIS_FORCE_DOWNLOAD[] = {
  133. {EFUSE_BLK0, 44, 1}, // Disable force chip go to download mode function,
  134. };
  135. static const esp_efuse_desc_t DIS_CAN[] = {
  136. {EFUSE_BLK0, 46, 1}, // Disable CAN function,
  137. };
  138. static const esp_efuse_desc_t JTAG_SEL_ENABLE[] = {
  139. {EFUSE_BLK0, 47, 1}, // Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.,
  140. };
  141. static const esp_efuse_desc_t SOFT_DIS_JTAG[] = {
  142. {EFUSE_BLK0, 48, 3}, // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.,
  143. };
  144. static const esp_efuse_desc_t DIS_PAD_JTAG[] = {
  145. {EFUSE_BLK0, 51, 1}, // Disable JTAG in the hard way. JTAG is disabled permanently.,
  146. };
  147. static const esp_efuse_desc_t DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  148. {EFUSE_BLK0, 52, 1}, // Disable flash encryption when in download boot modes.,
  149. };
  150. static const esp_efuse_desc_t USB_DREFH[] = {
  151. {EFUSE_BLK0, 53, 2}, // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.,
  152. };
  153. static const esp_efuse_desc_t USB_DREFL[] = {
  154. {EFUSE_BLK0, 55, 2}, // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.,
  155. };
  156. static const esp_efuse_desc_t USB_EXCHG_PINS[] = {
  157. {EFUSE_BLK0, 57, 1}, // Exchange D+ D- pins,
  158. };
  159. static const esp_efuse_desc_t VDD_SPI_AS_GPIO[] = {
  160. {EFUSE_BLK0, 58, 1}, // Set this bit to vdd spi pin function as gpio,
  161. };
  162. static const esp_efuse_desc_t BTLC_GPIO_ENABLE[] = {
  163. {EFUSE_BLK0, 59, 2}, // Enable btlc gpio,
  164. };
  165. static const esp_efuse_desc_t POWERGLITCH_EN[] = {
  166. {EFUSE_BLK0, 61, 1}, // Set this bit to enable power glitch function,
  167. };
  168. static const esp_efuse_desc_t POWER_GLITCH_DSENSE[] = {
  169. {EFUSE_BLK0, 62, 2}, // Sample delay configuration of power glitch,
  170. };
  171. static const esp_efuse_desc_t WDT_DELAY_SEL[] = {
  172. {EFUSE_BLK0, 80, 2}, // Select RTC WDT time out threshold,
  173. };
  174. static const esp_efuse_desc_t SPI_BOOT_CRYPT_CNT[] = {
  175. {EFUSE_BLK0, 82, 3}, // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable,
  176. };
  177. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE0[] = {
  178. {EFUSE_BLK0, 85, 1}, // Enable revoke first secure boot key,
  179. };
  180. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE1[] = {
  181. {EFUSE_BLK0, 86, 1}, // Enable revoke second secure boot key,
  182. };
  183. static const esp_efuse_desc_t SECURE_BOOT_KEY_REVOKE2[] = {
  184. {EFUSE_BLK0, 87, 1}, // Enable revoke third secure boot key,
  185. };
  186. static const esp_efuse_desc_t KEY_PURPOSE_0[] = {
  187. {EFUSE_BLK0, 88, 4}, // Key0 purpose,
  188. };
  189. static const esp_efuse_desc_t KEY_PURPOSE_1[] = {
  190. {EFUSE_BLK0, 92, 4}, // Key1 purpose,
  191. };
  192. static const esp_efuse_desc_t KEY_PURPOSE_2[] = {
  193. {EFUSE_BLK0, 96, 4}, // Key2 purpose,
  194. };
  195. static const esp_efuse_desc_t KEY_PURPOSE_3[] = {
  196. {EFUSE_BLK0, 100, 4}, // Key3 purpose,
  197. };
  198. static const esp_efuse_desc_t KEY_PURPOSE_4[] = {
  199. {EFUSE_BLK0, 104, 4}, // Key4 purpose,
  200. };
  201. static const esp_efuse_desc_t KEY_PURPOSE_5[] = {
  202. {EFUSE_BLK0, 108, 4}, // Key5 purpose,
  203. };
  204. static const esp_efuse_desc_t SECURE_BOOT_EN[] = {
  205. {EFUSE_BLK0, 116, 1}, // Secure boot enable,
  206. };
  207. static const esp_efuse_desc_t SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  208. {EFUSE_BLK0, 117, 1}, // Enable aggressive secure boot revoke,
  209. };
  210. static const esp_efuse_desc_t FLASH_TPUW[] = {
  211. {EFUSE_BLK0, 124, 4}, // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms,
  212. };
  213. static const esp_efuse_desc_t DIS_DOWNLOAD_MODE[] = {
  214. {EFUSE_BLK0, 128, 1}, // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7,
  215. };
  216. static const esp_efuse_desc_t DIS_DIRECT_BOOT[] = {
  217. {EFUSE_BLK0, 129, 1}, // Disable direct boot mode,
  218. };
  219. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  220. {EFUSE_BLK0, 130, 1}, // Disable usb serial jtag print during rom boot,
  221. };
  222. static const esp_efuse_desc_t DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  223. {EFUSE_BLK0, 132, 1}, // Disable download through USB-Serial-JTAG,
  224. };
  225. static const esp_efuse_desc_t ENABLE_SECURITY_DOWNLOAD[] = {
  226. {EFUSE_BLK0, 133, 1}, // Enable security download mode,
  227. };
  228. static const esp_efuse_desc_t UART_PRINT_CONTROL[] = {
  229. {EFUSE_BLK0, 134, 2}, // b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.,
  230. };
  231. static const esp_efuse_desc_t FORCE_SEND_RESUME[] = {
  232. {EFUSE_BLK0, 141, 1}, // Force ROM code to send a resume command during SPI boot,
  233. };
  234. static const esp_efuse_desc_t SECURE_VERSION[] = {
  235. {EFUSE_BLK0, 142, 16}, // Secure version for anti-rollback,
  236. };
  237. static const esp_efuse_desc_t ERR_RST_ENABLE[] = {
  238. {EFUSE_BLK0, 159, 1}, // Use BLOCK0 to check error record registers,
  239. };
  240. static const esp_efuse_desc_t DISABLE_WAFER_VERSION_MAJOR[] = {
  241. {EFUSE_BLK0, 160, 1}, // Disables check of wafer version major,
  242. };
  243. static const esp_efuse_desc_t DISABLE_BLK_VERSION_MAJOR[] = {
  244. {EFUSE_BLK0, 161, 1}, // Disables check of blk version major,
  245. };
  246. static const esp_efuse_desc_t MAC_FACTORY[] = {
  247. {EFUSE_BLK1, 40, 8}, // Factory MAC addr [0],
  248. {EFUSE_BLK1, 32, 8}, // Factory MAC addr [1],
  249. {EFUSE_BLK1, 24, 8}, // Factory MAC addr [2],
  250. {EFUSE_BLK1, 16, 8}, // Factory MAC addr [3],
  251. {EFUSE_BLK1, 8, 8}, // Factory MAC addr [4],
  252. {EFUSE_BLK1, 0, 8}, // Factory MAC addr [5],
  253. };
  254. static const esp_efuse_desc_t SPI_PAD_CONFIG_CLK[] = {
  255. {EFUSE_BLK1, 48, 6}, // SPI_PAD_configure CLK,
  256. };
  257. static const esp_efuse_desc_t SPI_PAD_CONFIG_Q_D1[] = {
  258. {EFUSE_BLK1, 54, 6}, // SPI_PAD_configure Q(D1),
  259. };
  260. static const esp_efuse_desc_t SPI_PAD_CONFIG_D_D0[] = {
  261. {EFUSE_BLK1, 60, 6}, // SPI_PAD_configure D(D0),
  262. };
  263. static const esp_efuse_desc_t SPI_PAD_CONFIG_CS[] = {
  264. {EFUSE_BLK1, 66, 6}, // SPI_PAD_configure CS,
  265. };
  266. static const esp_efuse_desc_t SPI_PAD_CONFIG_HD_D3[] = {
  267. {EFUSE_BLK1, 72, 6}, // SPI_PAD_configure HD(D3),
  268. };
  269. static const esp_efuse_desc_t SPI_PAD_CONFIG_WP_D2[] = {
  270. {EFUSE_BLK1, 78, 6}, // SPI_PAD_configure WP(D2),
  271. };
  272. static const esp_efuse_desc_t SPI_PAD_CONFIG_DQS[] = {
  273. {EFUSE_BLK1, 84, 6}, // SPI_PAD_configure DQS,
  274. };
  275. static const esp_efuse_desc_t SPI_PAD_CONFIG_D4[] = {
  276. {EFUSE_BLK1, 90, 6}, // SPI_PAD_configure D4,
  277. };
  278. static const esp_efuse_desc_t SPI_PAD_CONFIG_D5[] = {
  279. {EFUSE_BLK1, 96, 6}, // SPI_PAD_configure D5,
  280. };
  281. static const esp_efuse_desc_t SPI_PAD_CONFIG_D6[] = {
  282. {EFUSE_BLK1, 102, 6}, // SPI_PAD_configure D6,
  283. };
  284. static const esp_efuse_desc_t SPI_PAD_CONFIG_D7[] = {
  285. {EFUSE_BLK1, 108, 6}, // SPI_PAD_configure D7,
  286. };
  287. static const esp_efuse_desc_t WAFER_VERSION_MINOR[] = {
  288. {EFUSE_BLK1, 114, 3}, // WAFER_VERSION_MINOR least significant bits,
  289. {EFUSE_BLK1, 183, 1}, // WAFER_VERSION_MINOR most significant bit,
  290. };
  291. static const esp_efuse_desc_t PKG_VERSION[] = {
  292. {EFUSE_BLK1, 117, 3}, // Package version 0:ESP32C3,
  293. };
  294. static const esp_efuse_desc_t BLK_VERSION_MINOR[] = {
  295. {EFUSE_BLK1, 120, 3}, // BLK_VERSION_MINOR,
  296. };
  297. static const esp_efuse_desc_t WAFER_VERSION_MAJOR[] = {
  298. {EFUSE_BLK1, 184, 2}, // WAFER_VERSION_MAJOR,
  299. };
  300. static const esp_efuse_desc_t OPTIONAL_UNIQUE_ID[] = {
  301. {EFUSE_BLK2, 0, 128}, // Optional unique 128-bit ID,
  302. };
  303. static const esp_efuse_desc_t BLK_VERSION_MAJOR[] = {
  304. {EFUSE_BLK2, 128, 2}, // BLK_VERSION_MAJOR of BLOCK2,
  305. };
  306. static const esp_efuse_desc_t TEMP_CALIB[] = {
  307. {EFUSE_BLK2, 131, 9}, // Temperature calibration data,
  308. };
  309. static const esp_efuse_desc_t OCODE[] = {
  310. {EFUSE_BLK2, 140, 8}, // ADC OCode,
  311. };
  312. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN0[] = {
  313. {EFUSE_BLK2, 148, 10}, // ADC1 init code at atten0,
  314. };
  315. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN1[] = {
  316. {EFUSE_BLK2, 158, 10}, // ADC1 init code at atten1,
  317. };
  318. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN2[] = {
  319. {EFUSE_BLK2, 168, 10}, // ADC1 init code at atten2,
  320. };
  321. static const esp_efuse_desc_t ADC1_INIT_CODE_ATTEN3[] = {
  322. {EFUSE_BLK2, 178, 10}, // ADC1 init code at atten3,
  323. };
  324. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN0[] = {
  325. {EFUSE_BLK2, 188, 10}, // ADC1 calibration voltage at atten0,
  326. };
  327. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN1[] = {
  328. {EFUSE_BLK2, 198, 10}, // ADC1 calibration voltage at atten1,
  329. };
  330. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN2[] = {
  331. {EFUSE_BLK2, 208, 10}, // ADC1 calibration voltage at atten2,
  332. };
  333. static const esp_efuse_desc_t ADC1_CAL_VOL_ATTEN3[] = {
  334. {EFUSE_BLK2, 218, 10}, // ADC1 calibration voltage at atten3,
  335. };
  336. static const esp_efuse_desc_t USER_DATA[] = {
  337. {EFUSE_BLK3, 0, 256}, // User data,
  338. };
  339. static const esp_efuse_desc_t USER_DATA_MAC_CUSTOM[] = {
  340. {EFUSE_BLK3, 200, 48}, // Custom MAC,
  341. };
  342. static const esp_efuse_desc_t KEY0[] = {
  343. {EFUSE_BLK4, 0, 256}, // Key0 or user data,
  344. };
  345. static const esp_efuse_desc_t KEY1[] = {
  346. {EFUSE_BLK5, 0, 256}, // Key1 or user data,
  347. };
  348. static const esp_efuse_desc_t KEY2[] = {
  349. {EFUSE_BLK6, 0, 256}, // Key2 or user data,
  350. };
  351. static const esp_efuse_desc_t KEY3[] = {
  352. {EFUSE_BLK7, 0, 256}, // Key3 or user data,
  353. };
  354. static const esp_efuse_desc_t KEY4[] = {
  355. {EFUSE_BLK8, 0, 256}, // Key4 or user data,
  356. };
  357. static const esp_efuse_desc_t KEY5[] = {
  358. {EFUSE_BLK9, 0, 256}, // Key5 or user data,
  359. };
  360. static const esp_efuse_desc_t SYS_DATA_PART2[] = {
  361. {EFUSE_BLK10, 0, 256}, // System configuration,
  362. };
  363. static const esp_efuse_desc_t K_RTC_LDO[] = {
  364. {EFUSE_BLK1, 135, 7}, // BLOCK1 K_RTC_LDO,
  365. };
  366. static const esp_efuse_desc_t K_DIG_LDO[] = {
  367. {EFUSE_BLK1, 142, 7}, // BLOCK1 K_DIG_LDO,
  368. };
  369. static const esp_efuse_desc_t V_RTC_DBIAS20[] = {
  370. {EFUSE_BLK1, 149, 8}, // BLOCK1 voltage of rtc dbias20,
  371. };
  372. static const esp_efuse_desc_t V_DIG_DBIAS20[] = {
  373. {EFUSE_BLK1, 157, 8}, // BLOCK1 voltage of digital dbias20,
  374. };
  375. static const esp_efuse_desc_t DIG_DBIAS_HVT[] = {
  376. {EFUSE_BLK1, 165, 5}, // BLOCK1 digital dbias when hvt,
  377. };
  378. static const esp_efuse_desc_t THRES_HVT[] = {
  379. {EFUSE_BLK1, 170, 10}, // BLOCK1 pvt threshold when hvt,
  380. };
  381. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS[] = {
  382. &WR_DIS[0], // Write protection
  383. NULL
  384. };
  385. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_RD_DIS[] = {
  386. &WR_DIS_RD_DIS[0], // Write protection for RD_DIS_KEY0 RD_DIS_KEY1 RD_DIS_KEY2 RD_DIS_KEY3 RD_DIS_KEY4 RD_DIS_KEY5 RD_DIS_SYS_DATA_PART2
  387. NULL
  388. };
  389. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_1[] = {
  390. &WR_DIS_GROUP_1[0], // Write protection for DIS_ICACHE DIS_DOWNLOAD_ICACHE DIS_FORCE_DOWNLOAD DIS_USB DIS_CAN SOFT_DIS_JTAG DIS_DOWNLOAD_MANUAL_ENCRYPT
  391. NULL
  392. };
  393. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_2[] = {
  394. &WR_DIS_GROUP_2[0], // Write protection for WDT_DELAY_SEL
  395. NULL
  396. };
  397. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SPI_BOOT_CRYPT_CNT[] = {
  398. &WR_DIS_SPI_BOOT_CRYPT_CNT[0], // Write protection for SPI_BOOT_CRYPT_CNT
  399. NULL
  400. };
  401. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE0[] = {
  402. &WR_DIS_SECURE_BOOT_KEY_REVOKE0[0], // Write protection for SECURE_BOOT_KEY_REVOKE0
  403. NULL
  404. };
  405. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE1[] = {
  406. &WR_DIS_SECURE_BOOT_KEY_REVOKE1[0], // Write protection for SECURE_BOOT_KEY_REVOKE1
  407. NULL
  408. };
  409. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_KEY_REVOKE2[] = {
  410. &WR_DIS_SECURE_BOOT_KEY_REVOKE2[0], // Write protection for SECURE_BOOT_KEY_REVOKE2
  411. NULL
  412. };
  413. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0_PURPOSE[] = {
  414. &WR_DIS_KEY0_PURPOSE[0], // Write protection for key_purpose. KEY0
  415. NULL
  416. };
  417. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1_PURPOSE[] = {
  418. &WR_DIS_KEY1_PURPOSE[0], // Write protection for key_purpose. KEY1
  419. NULL
  420. };
  421. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2_PURPOSE[] = {
  422. &WR_DIS_KEY2_PURPOSE[0], // Write protection for key_purpose. KEY2
  423. NULL
  424. };
  425. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3_PURPOSE[] = {
  426. &WR_DIS_KEY3_PURPOSE[0], // Write protection for key_purpose. KEY3
  427. NULL
  428. };
  429. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4_PURPOSE[] = {
  430. &WR_DIS_KEY4_PURPOSE[0], // Write protection for key_purpose. KEY4
  431. NULL
  432. };
  433. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5_PURPOSE[] = {
  434. &WR_DIS_KEY5_PURPOSE[0], // Write protection for key_purpose. KEY5
  435. NULL
  436. };
  437. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_EN[] = {
  438. &WR_DIS_SECURE_BOOT_EN[0], // Write protection for SECURE_BOOT_EN
  439. NULL
  440. };
  441. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  442. &WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Write protection for SECURE_BOOT_AGGRESSIVE_REVOKE
  443. NULL
  444. };
  445. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_GROUP_3[] = {
  446. &WR_DIS_GROUP_3[0], // Write protection for FLASH_TPUW DIS_DOWNLOAD_MODE DIS_DIRECT_BOOT DIS_USB_SERIAL_JTAG_ROM_PRINT DIS_TINY_BASIC DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE ENABLE_SECURITY_DOWNLOAD UART_PRINT_CONTROL PIN_POWER_SELECTION FLASH_TYPE FORCE_SEND_RESUME SECURE_VERSION
  447. NULL
  448. };
  449. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_BLK1[] = {
  450. &WR_DIS_BLK1[0], // Write protection for EFUSE_BLK1. MAC_SPI_8M_SYS
  451. NULL
  452. };
  453. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART1[] = {
  454. &WR_DIS_SYS_DATA_PART1[0], // Write protection for EFUSE_BLK2. SYS_DATA_PART1
  455. NULL
  456. };
  457. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_USER_DATA[] = {
  458. &WR_DIS_USER_DATA[0], // Write protection for EFUSE_BLK3. USER_DATA
  459. NULL
  460. };
  461. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY0[] = {
  462. &WR_DIS_KEY0[0], // Write protection for EFUSE_BLK4. KEY0
  463. NULL
  464. };
  465. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY1[] = {
  466. &WR_DIS_KEY1[0], // Write protection for EFUSE_BLK5. KEY1
  467. NULL
  468. };
  469. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY2[] = {
  470. &WR_DIS_KEY2[0], // Write protection for EFUSE_BLK6. KEY2
  471. NULL
  472. };
  473. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY3[] = {
  474. &WR_DIS_KEY3[0], // Write protection for EFUSE_BLK7. KEY3
  475. NULL
  476. };
  477. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY4[] = {
  478. &WR_DIS_KEY4[0], // Write protection for EFUSE_BLK8. KEY4
  479. NULL
  480. };
  481. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_KEY5[] = {
  482. &WR_DIS_KEY5[0], // Write protection for EFUSE_BLK9. KEY5
  483. NULL
  484. };
  485. const esp_efuse_desc_t* ESP_EFUSE_WR_DIS_SYS_DATA_PART2[] = {
  486. &WR_DIS_SYS_DATA_PART2[0], // Write protection for EFUSE_BLK10. SYS_DATA_PART2
  487. NULL
  488. };
  489. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS[] = {
  490. &RD_DIS[0], // Read protection
  491. NULL
  492. };
  493. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY0[] = {
  494. &RD_DIS_KEY0[0], // Read protection for EFUSE_BLK4. KEY0
  495. NULL
  496. };
  497. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY1[] = {
  498. &RD_DIS_KEY1[0], // Read protection for EFUSE_BLK5. KEY1
  499. NULL
  500. };
  501. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY2[] = {
  502. &RD_DIS_KEY2[0], // Read protection for EFUSE_BLK6. KEY2
  503. NULL
  504. };
  505. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY3[] = {
  506. &RD_DIS_KEY3[0], // Read protection for EFUSE_BLK7. KEY3
  507. NULL
  508. };
  509. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY4[] = {
  510. &RD_DIS_KEY4[0], // Read protection for EFUSE_BLK8. KEY4
  511. NULL
  512. };
  513. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_KEY5[] = {
  514. &RD_DIS_KEY5[0], // Read protection for EFUSE_BLK9. KEY5
  515. NULL
  516. };
  517. const esp_efuse_desc_t* ESP_EFUSE_RD_DIS_SYS_DATA_PART2[] = {
  518. &RD_DIS_SYS_DATA_PART2[0], // Read protection for EFUSE_BLK10. SYS_DATA_PART2
  519. NULL
  520. };
  521. const esp_efuse_desc_t* ESP_EFUSE_DIS_ICACHE[] = {
  522. &DIS_ICACHE[0], // Disable Icache
  523. NULL
  524. };
  525. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[] = {
  526. &DIS_USB_JTAG[0], // Disable USB JTAG
  527. NULL
  528. };
  529. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[] = {
  530. &DIS_DOWNLOAD_ICACHE[0], // Disable Icache in download mode
  531. NULL
  532. };
  533. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[] = {
  534. &DIS_USB_DEVICE[0], // Disable USB_DEVICE
  535. NULL
  536. };
  537. const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[] = {
  538. &DIS_FORCE_DOWNLOAD[0], // Disable force chip go to download mode function
  539. NULL
  540. };
  541. const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[] = {
  542. &DIS_CAN[0], // Disable CAN function
  543. NULL
  544. };
  545. const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[] = {
  546. &JTAG_SEL_ENABLE[0], // Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0.
  547. NULL
  548. };
  549. const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[] = {
  550. &SOFT_DIS_JTAG[0], // Set these bits to disable JTAG in the soft way (odd number 1 means disable). JTAG can be enabled in HMAC module.
  551. NULL
  552. };
  553. const esp_efuse_desc_t* ESP_EFUSE_DIS_PAD_JTAG[] = {
  554. &DIS_PAD_JTAG[0], // Disable JTAG in the hard way. JTAG is disabled permanently.
  555. NULL
  556. };
  557. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT[] = {
  558. &DIS_DOWNLOAD_MANUAL_ENCRYPT[0], // Disable flash encryption when in download boot modes.
  559. NULL
  560. };
  561. const esp_efuse_desc_t* ESP_EFUSE_USB_DREFH[] = {
  562. &USB_DREFH[0], // Controls single-end input threshold vrefh 1.76 V to 2 V with step of 80 mV stored in eFuse.
  563. NULL
  564. };
  565. const esp_efuse_desc_t* ESP_EFUSE_USB_DREFL[] = {
  566. &USB_DREFL[0], // Controls single-end input threshold vrefl 0.8 V to 1.04 V with step of 80 mV stored in eFuse.
  567. NULL
  568. };
  569. const esp_efuse_desc_t* ESP_EFUSE_USB_EXCHG_PINS[] = {
  570. &USB_EXCHG_PINS[0], // Exchange D+ D- pins
  571. NULL
  572. };
  573. const esp_efuse_desc_t* ESP_EFUSE_VDD_SPI_AS_GPIO[] = {
  574. &VDD_SPI_AS_GPIO[0], // Set this bit to vdd spi pin function as gpio
  575. NULL
  576. };
  577. const esp_efuse_desc_t* ESP_EFUSE_BTLC_GPIO_ENABLE[] = {
  578. &BTLC_GPIO_ENABLE[0], // Enable btlc gpio
  579. NULL
  580. };
  581. const esp_efuse_desc_t* ESP_EFUSE_POWERGLITCH_EN[] = {
  582. &POWERGLITCH_EN[0], // Set this bit to enable power glitch function
  583. NULL
  584. };
  585. const esp_efuse_desc_t* ESP_EFUSE_POWER_GLITCH_DSENSE[] = {
  586. &POWER_GLITCH_DSENSE[0], // Sample delay configuration of power glitch
  587. NULL
  588. };
  589. const esp_efuse_desc_t* ESP_EFUSE_WDT_DELAY_SEL[] = {
  590. &WDT_DELAY_SEL[0], // Select RTC WDT time out threshold
  591. NULL
  592. };
  593. const esp_efuse_desc_t* ESP_EFUSE_SPI_BOOT_CRYPT_CNT[] = {
  594. &SPI_BOOT_CRYPT_CNT[0], // SPI boot encrypt decrypt enable. odd number 1 enable. even number 1 disable
  595. NULL
  596. };
  597. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE0[] = {
  598. &SECURE_BOOT_KEY_REVOKE0[0], // Enable revoke first secure boot key
  599. NULL
  600. };
  601. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE1[] = {
  602. &SECURE_BOOT_KEY_REVOKE1[0], // Enable revoke second secure boot key
  603. NULL
  604. };
  605. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_KEY_REVOKE2[] = {
  606. &SECURE_BOOT_KEY_REVOKE2[0], // Enable revoke third secure boot key
  607. NULL
  608. };
  609. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_0[] = {
  610. &KEY_PURPOSE_0[0], // Key0 purpose
  611. NULL
  612. };
  613. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_1[] = {
  614. &KEY_PURPOSE_1[0], // Key1 purpose
  615. NULL
  616. };
  617. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_2[] = {
  618. &KEY_PURPOSE_2[0], // Key2 purpose
  619. NULL
  620. };
  621. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_3[] = {
  622. &KEY_PURPOSE_3[0], // Key3 purpose
  623. NULL
  624. };
  625. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_4[] = {
  626. &KEY_PURPOSE_4[0], // Key4 purpose
  627. NULL
  628. };
  629. const esp_efuse_desc_t* ESP_EFUSE_KEY_PURPOSE_5[] = {
  630. &KEY_PURPOSE_5[0], // Key5 purpose
  631. NULL
  632. };
  633. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_EN[] = {
  634. &SECURE_BOOT_EN[0], // Secure boot enable
  635. NULL
  636. };
  637. const esp_efuse_desc_t* ESP_EFUSE_SECURE_BOOT_AGGRESSIVE_REVOKE[] = {
  638. &SECURE_BOOT_AGGRESSIVE_REVOKE[0], // Enable aggressive secure boot revoke
  639. NULL
  640. };
  641. const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[] = {
  642. &FLASH_TPUW[0], // Flash wait time after power up. (unit is ms). When value is 15. the time is 30 ms
  643. NULL
  644. };
  645. const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[] = {
  646. &DIS_DOWNLOAD_MODE[0], // Disble download mode include boot_mode[3:0] is 0 1 2 3 6 7
  647. NULL
  648. };
  649. const esp_efuse_desc_t* ESP_EFUSE_DIS_DIRECT_BOOT[] = {
  650. &DIS_DIRECT_BOOT[0], // Disable direct boot mode
  651. NULL
  652. };
  653. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_ROM_PRINT[] = {
  654. &DIS_USB_SERIAL_JTAG_ROM_PRINT[0], // Disable usb serial jtag print during rom boot
  655. NULL
  656. };
  657. const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[] = {
  658. &DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE[0], // Disable download through USB-Serial-JTAG
  659. NULL
  660. };
  661. const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[] = {
  662. &ENABLE_SECURITY_DOWNLOAD[0], // Enable security download mode
  663. NULL
  664. };
  665. const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[] = {
  666. &UART_PRINT_CONTROL[0], // b00:force print. b01:control by GPIO8 - low level print. b10:control by GPIO8 - high level print. b11:force disable print.
  667. NULL
  668. };
  669. const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[] = {
  670. &FORCE_SEND_RESUME[0], // Force ROM code to send a resume command during SPI boot
  671. NULL
  672. };
  673. const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[] = {
  674. &SECURE_VERSION[0], // Secure version for anti-rollback
  675. NULL
  676. };
  677. const esp_efuse_desc_t* ESP_EFUSE_ERR_RST_ENABLE[] = {
  678. &ERR_RST_ENABLE[0], // Use BLOCK0 to check error record registers
  679. NULL
  680. };
  681. const esp_efuse_desc_t* ESP_EFUSE_DISABLE_WAFER_VERSION_MAJOR[] = {
  682. &DISABLE_WAFER_VERSION_MAJOR[0], // Disables check of wafer version major
  683. NULL
  684. };
  685. const esp_efuse_desc_t* ESP_EFUSE_DISABLE_BLK_VERSION_MAJOR[] = {
  686. &DISABLE_BLK_VERSION_MAJOR[0], // Disables check of blk version major
  687. NULL
  688. };
  689. const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[] = {
  690. &MAC_FACTORY[0], // Factory MAC addr [0]
  691. &MAC_FACTORY[1], // Factory MAC addr [1]
  692. &MAC_FACTORY[2], // Factory MAC addr [2]
  693. &MAC_FACTORY[3], // Factory MAC addr [3]
  694. &MAC_FACTORY[4], // Factory MAC addr [4]
  695. &MAC_FACTORY[5], // Factory MAC addr [5]
  696. NULL
  697. };
  698. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CLK[] = {
  699. &SPI_PAD_CONFIG_CLK[0], // SPI_PAD_configure CLK
  700. NULL
  701. };
  702. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_Q_D1[] = {
  703. &SPI_PAD_CONFIG_Q_D1[0], // SPI_PAD_configure Q(D1)
  704. NULL
  705. };
  706. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D_D0[] = {
  707. &SPI_PAD_CONFIG_D_D0[0], // SPI_PAD_configure D(D0)
  708. NULL
  709. };
  710. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_CS[] = {
  711. &SPI_PAD_CONFIG_CS[0], // SPI_PAD_configure CS
  712. NULL
  713. };
  714. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_HD_D3[] = {
  715. &SPI_PAD_CONFIG_HD_D3[0], // SPI_PAD_configure HD(D3)
  716. NULL
  717. };
  718. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_WP_D2[] = {
  719. &SPI_PAD_CONFIG_WP_D2[0], // SPI_PAD_configure WP(D2)
  720. NULL
  721. };
  722. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_DQS[] = {
  723. &SPI_PAD_CONFIG_DQS[0], // SPI_PAD_configure DQS
  724. NULL
  725. };
  726. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D4[] = {
  727. &SPI_PAD_CONFIG_D4[0], // SPI_PAD_configure D4
  728. NULL
  729. };
  730. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D5[] = {
  731. &SPI_PAD_CONFIG_D5[0], // SPI_PAD_configure D5
  732. NULL
  733. };
  734. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D6[] = {
  735. &SPI_PAD_CONFIG_D6[0], // SPI_PAD_configure D6
  736. NULL
  737. };
  738. const esp_efuse_desc_t* ESP_EFUSE_SPI_PAD_CONFIG_D7[] = {
  739. &SPI_PAD_CONFIG_D7[0], // SPI_PAD_configure D7
  740. NULL
  741. };
  742. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MINOR[] = {
  743. &WAFER_VERSION_MINOR[0], // WAFER_VERSION_MINOR least significant bits
  744. &WAFER_VERSION_MINOR[1], // WAFER_VERSION_MINOR most significant bit
  745. NULL
  746. };
  747. const esp_efuse_desc_t* ESP_EFUSE_PKG_VERSION[] = {
  748. &PKG_VERSION[0], // Package version 0:ESP32C3
  749. NULL
  750. };
  751. const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MINOR[] = {
  752. &BLK_VERSION_MINOR[0], // BLK_VERSION_MINOR
  753. NULL
  754. };
  755. const esp_efuse_desc_t* ESP_EFUSE_WAFER_VERSION_MAJOR[] = {
  756. &WAFER_VERSION_MAJOR[0], // WAFER_VERSION_MAJOR
  757. NULL
  758. };
  759. const esp_efuse_desc_t* ESP_EFUSE_OPTIONAL_UNIQUE_ID[] = {
  760. &OPTIONAL_UNIQUE_ID[0], // Optional unique 128-bit ID
  761. NULL
  762. };
  763. const esp_efuse_desc_t* ESP_EFUSE_BLK_VERSION_MAJOR[] = {
  764. &BLK_VERSION_MAJOR[0], // BLK_VERSION_MAJOR of BLOCK2
  765. NULL
  766. };
  767. const esp_efuse_desc_t* ESP_EFUSE_TEMP_CALIB[] = {
  768. &TEMP_CALIB[0], // Temperature calibration data
  769. NULL
  770. };
  771. const esp_efuse_desc_t* ESP_EFUSE_OCODE[] = {
  772. &OCODE[0], // ADC OCode
  773. NULL
  774. };
  775. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN0[] = {
  776. &ADC1_INIT_CODE_ATTEN0[0], // ADC1 init code at atten0
  777. NULL
  778. };
  779. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN1[] = {
  780. &ADC1_INIT_CODE_ATTEN1[0], // ADC1 init code at atten1
  781. NULL
  782. };
  783. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN2[] = {
  784. &ADC1_INIT_CODE_ATTEN2[0], // ADC1 init code at atten2
  785. NULL
  786. };
  787. const esp_efuse_desc_t* ESP_EFUSE_ADC1_INIT_CODE_ATTEN3[] = {
  788. &ADC1_INIT_CODE_ATTEN3[0], // ADC1 init code at atten3
  789. NULL
  790. };
  791. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN0[] = {
  792. &ADC1_CAL_VOL_ATTEN0[0], // ADC1 calibration voltage at atten0
  793. NULL
  794. };
  795. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN1[] = {
  796. &ADC1_CAL_VOL_ATTEN1[0], // ADC1 calibration voltage at atten1
  797. NULL
  798. };
  799. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN2[] = {
  800. &ADC1_CAL_VOL_ATTEN2[0], // ADC1 calibration voltage at atten2
  801. NULL
  802. };
  803. const esp_efuse_desc_t* ESP_EFUSE_ADC1_CAL_VOL_ATTEN3[] = {
  804. &ADC1_CAL_VOL_ATTEN3[0], // ADC1 calibration voltage at atten3
  805. NULL
  806. };
  807. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA[] = {
  808. &USER_DATA[0], // User data
  809. NULL
  810. };
  811. const esp_efuse_desc_t* ESP_EFUSE_USER_DATA_MAC_CUSTOM[] = {
  812. &USER_DATA_MAC_CUSTOM[0], // Custom MAC
  813. NULL
  814. };
  815. const esp_efuse_desc_t* ESP_EFUSE_KEY0[] = {
  816. &KEY0[0], // Key0 or user data
  817. NULL
  818. };
  819. const esp_efuse_desc_t* ESP_EFUSE_KEY1[] = {
  820. &KEY1[0], // Key1 or user data
  821. NULL
  822. };
  823. const esp_efuse_desc_t* ESP_EFUSE_KEY2[] = {
  824. &KEY2[0], // Key2 or user data
  825. NULL
  826. };
  827. const esp_efuse_desc_t* ESP_EFUSE_KEY3[] = {
  828. &KEY3[0], // Key3 or user data
  829. NULL
  830. };
  831. const esp_efuse_desc_t* ESP_EFUSE_KEY4[] = {
  832. &KEY4[0], // Key4 or user data
  833. NULL
  834. };
  835. const esp_efuse_desc_t* ESP_EFUSE_KEY5[] = {
  836. &KEY5[0], // Key5 or user data
  837. NULL
  838. };
  839. const esp_efuse_desc_t* ESP_EFUSE_SYS_DATA_PART2[] = {
  840. &SYS_DATA_PART2[0], // System configuration
  841. NULL
  842. };
  843. const esp_efuse_desc_t* ESP_EFUSE_K_RTC_LDO[] = {
  844. &K_RTC_LDO[0], // BLOCK1 K_RTC_LDO
  845. NULL
  846. };
  847. const esp_efuse_desc_t* ESP_EFUSE_K_DIG_LDO[] = {
  848. &K_DIG_LDO[0], // BLOCK1 K_DIG_LDO
  849. NULL
  850. };
  851. const esp_efuse_desc_t* ESP_EFUSE_V_RTC_DBIAS20[] = {
  852. &V_RTC_DBIAS20[0], // BLOCK1 voltage of rtc dbias20
  853. NULL
  854. };
  855. const esp_efuse_desc_t* ESP_EFUSE_V_DIG_DBIAS20[] = {
  856. &V_DIG_DBIAS20[0], // BLOCK1 voltage of digital dbias20
  857. NULL
  858. };
  859. const esp_efuse_desc_t* ESP_EFUSE_DIG_DBIAS_HVT[] = {
  860. &DIG_DBIAS_HVT[0], // BLOCK1 digital dbias when hvt
  861. NULL
  862. };
  863. const esp_efuse_desc_t* ESP_EFUSE_THRES_HVT[] = {
  864. &THRES_HVT[0], // BLOCK1 pvt threshold when hvt
  865. NULL
  866. };