gdma.c 31 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. // #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  7. #include <stdlib.h>
  8. #include <sys/cdefs.h>
  9. #include "sdkconfig.h"
  10. #include "freertos/FreeRTOS.h"
  11. #include "freertos/task.h"
  12. #include "soc/soc_caps.h"
  13. #include "soc/periph_defs.h"
  14. #include "esp_intr_alloc.h"
  15. #include "esp_log.h"
  16. #include "esp_check.h"
  17. #include "esp_heap_caps.h"
  18. #include "hal/gdma_hal.h"
  19. #include "hal/gdma_ll.h"
  20. #include "soc/gdma_periph.h"
  21. #include "esp_memory_utils.h"
  22. #include "esp_private/periph_ctrl.h"
  23. #include "esp_private/gdma.h"
  24. static const char *TAG = "gdma";
  25. #if CONFIG_GDMA_ISR_IRAM_SAFE || CONFIG_GDMA_CTRL_FUNC_IN_IRAM
  26. #define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
  27. #else
  28. #define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
  29. #endif
  30. #if CONFIG_GDMA_ISR_IRAM_SAFE
  31. #define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED)
  32. #else
  33. #define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED
  34. #endif
  35. #define GDMA_INVALID_PERIPH_TRIG (0x3F)
  36. #define SEARCH_REQUEST_RX_CHANNEL (1 << 0)
  37. #define SEARCH_REQUEST_TX_CHANNEL (1 << 1)
  38. typedef struct gdma_platform_t gdma_platform_t;
  39. typedef struct gdma_group_t gdma_group_t;
  40. typedef struct gdma_pair_t gdma_pair_t;
  41. typedef struct gdma_channel_t gdma_channel_t;
  42. typedef struct gdma_tx_channel_t gdma_tx_channel_t;
  43. typedef struct gdma_rx_channel_t gdma_rx_channel_t;
  44. /**
  45. * GDMA driver consists of there object class, namely: Group, Pair and Channel.
  46. * Channel is allocated when user calls `gdma_new_channel`, its lifecycle is maintained by user.
  47. * Pair and Group are all lazy allocated, their life cycles are maintained by this driver.
  48. * We use reference count to track their life cycles, i.e. the driver will free their memory only when their reference count reached to 0.
  49. *
  50. * We don't use an all-in-one spin lock in this driver, instead, we created different spin locks at different level.
  51. * For platform, it has a spinlock, which is used to protect the group handle slots and reference count of each group.
  52. * For group, it has a spinlock, which is used to protect group level stuffs, e.g. hal object, pair handle slots and reference count of each pair.
  53. * For pair, it has a spinlock, which is used to protect pair level stuffs, e.g. channel handle slots, occupy code.
  54. */
  55. struct gdma_platform_t {
  56. portMUX_TYPE spinlock; // platform level spinlock
  57. gdma_group_t *groups[SOC_GDMA_GROUPS]; // array of GDMA group instances
  58. int group_ref_counts[SOC_GDMA_GROUPS]; // reference count used to protect group install/uninstall
  59. };
  60. struct gdma_group_t {
  61. int group_id; // Group ID, index from 0
  62. gdma_hal_context_t hal; // HAL instance is at group level
  63. portMUX_TYPE spinlock; // group level spinlock
  64. gdma_pair_t *pairs[SOC_GDMA_PAIRS_PER_GROUP]; // handles of GDMA pairs
  65. int pair_ref_counts[SOC_GDMA_PAIRS_PER_GROUP]; // reference count used to protect pair install/uninstall
  66. };
  67. struct gdma_pair_t {
  68. gdma_group_t *group; // which group the pair belongs to
  69. int pair_id; // Pair ID, index from 0
  70. gdma_tx_channel_t *tx_chan; // pointer of tx channel in the pair
  71. gdma_rx_channel_t *rx_chan; // pointer of rx channel in the pair
  72. int occupy_code; // each bit indicates which channel has been occupied (an occupied channel will be skipped during channel search)
  73. portMUX_TYPE spinlock; // pair level spinlock
  74. };
  75. struct gdma_channel_t {
  76. gdma_pair_t *pair; // which pair the channel belongs to
  77. intr_handle_t intr; // per-channel interrupt handle
  78. portMUX_TYPE spinlock; // channel level spinlock
  79. gdma_channel_direction_t direction; // channel direction
  80. int periph_id; // Peripheral instance ID, indicates which peripheral is connected to this GDMA channel
  81. size_t sram_alignment; // alignment for memory in SRAM
  82. size_t psram_alignment; // alignment for memory in PSRAM
  83. esp_err_t (*del)(gdma_channel_t *channel); // channel deletion function, it's polymorphic, see `gdma_del_tx_channel` or `gdma_del_rx_channel`
  84. };
  85. struct gdma_tx_channel_t {
  86. gdma_channel_t base; // GDMA channel, base class
  87. void *user_data; // user registered DMA event data
  88. gdma_event_callback_t on_trans_eof; // TX EOF callback
  89. };
  90. struct gdma_rx_channel_t {
  91. gdma_channel_t base; // GDMA channel, base class
  92. void *user_data; // user registered DMA event data
  93. gdma_event_callback_t on_recv_eof; // RX EOF callback
  94. };
  95. static gdma_group_t *gdma_acquire_group_handle(int group_id);
  96. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id);
  97. static void gdma_release_group_handle(gdma_group_t *group);
  98. static void gdma_release_pair_handle(gdma_pair_t *pair);
  99. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel);
  100. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel);
  101. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan);
  102. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan);
  103. // gdma driver platform
  104. static gdma_platform_t s_platform = {
  105. .spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED,
  106. .groups = {} // groups will be lazy installed
  107. };
  108. esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_channel_handle_t *ret_chan)
  109. {
  110. esp_err_t ret = ESP_OK;
  111. gdma_tx_channel_t *alloc_tx_channel = NULL;
  112. gdma_rx_channel_t *alloc_rx_channel = NULL;
  113. int search_code = 0;
  114. gdma_pair_t *pair = NULL;
  115. gdma_group_t *group = NULL;
  116. ESP_GOTO_ON_FALSE(config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  117. if (config->flags.reserve_sibling) {
  118. search_code = SEARCH_REQUEST_RX_CHANNEL | SEARCH_REQUEST_TX_CHANNEL; // search for a pair of channels
  119. }
  120. if (config->direction == GDMA_CHANNEL_DIRECTION_TX) {
  121. search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only
  122. alloc_tx_channel = heap_caps_calloc(1, sizeof(gdma_tx_channel_t), GDMA_MEM_ALLOC_CAPS);
  123. ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel");
  124. } else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) {
  125. search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only
  126. alloc_rx_channel = heap_caps_calloc(1, sizeof(gdma_rx_channel_t), GDMA_MEM_ALLOC_CAPS);
  127. ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel");
  128. }
  129. if (config->sibling_chan) {
  130. pair = config->sibling_chan->pair;
  131. ESP_GOTO_ON_FALSE(pair, ESP_ERR_INVALID_ARG, err, TAG, "invalid sibling channel");
  132. ESP_GOTO_ON_FALSE(config->sibling_chan->direction != config->direction, ESP_ERR_INVALID_ARG, err, TAG, "sibling channel should have a different direction");
  133. group = pair->group;
  134. portENTER_CRITICAL(&group->spinlock);
  135. group->pair_ref_counts[pair->pair_id]++; // channel obtains a reference to pair
  136. portEXIT_CRITICAL(&group->spinlock);
  137. goto search_done; // skip the search path below if user has specify a sibling channel
  138. }
  139. for (int i = 0; i < SOC_GDMA_GROUPS && search_code; i++) { // loop to search group
  140. group = gdma_acquire_group_handle(i);
  141. ESP_GOTO_ON_FALSE(group, ESP_ERR_NO_MEM, err, TAG, "no mem for group(%d)", i);
  142. for (int j = 0; j < SOC_GDMA_PAIRS_PER_GROUP && search_code; j++) { // loop to search pair
  143. pair = gdma_acquire_pair_handle(group, j);
  144. ESP_GOTO_ON_FALSE(pair, ESP_ERR_NO_MEM, err, TAG, "no mem for pair(%d,%d)", i, j);
  145. portENTER_CRITICAL(&pair->spinlock);
  146. if (!(search_code & pair->occupy_code)) { // pair has suitable position for acquired channel(s)
  147. pair->occupy_code |= search_code;
  148. search_code = 0; // exit search loop
  149. }
  150. portEXIT_CRITICAL(&pair->spinlock);
  151. if (search_code) {
  152. gdma_release_pair_handle(pair);
  153. pair = NULL;
  154. }
  155. } // loop used to search pair
  156. if (search_code) {
  157. gdma_release_group_handle(group);
  158. group = NULL;
  159. }
  160. } // loop used to search group
  161. ESP_GOTO_ON_FALSE(search_code == 0, ESP_ERR_NOT_FOUND, err, TAG, "no free gdma channel, search code=%d", search_code);
  162. assert(pair && group); // pair and group handle shouldn't be NULL
  163. search_done:
  164. // register TX channel
  165. if (alloc_tx_channel) {
  166. pair->tx_chan = alloc_tx_channel;
  167. alloc_tx_channel->base.pair = pair;
  168. alloc_tx_channel->base.direction = GDMA_CHANNEL_DIRECTION_TX;
  169. alloc_tx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  170. alloc_tx_channel->base.del = gdma_del_tx_channel; // set channel deletion function
  171. *ret_chan = &alloc_tx_channel->base; // return the installed channel
  172. }
  173. // register RX channel
  174. if (alloc_rx_channel) {
  175. pair->rx_chan = alloc_rx_channel;
  176. alloc_rx_channel->base.pair = pair;
  177. alloc_rx_channel->base.direction = GDMA_CHANNEL_DIRECTION_RX;
  178. alloc_rx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  179. alloc_rx_channel->base.del = gdma_del_rx_channel; // set channel deletion function
  180. *ret_chan = &alloc_rx_channel->base; // return the installed channel
  181. }
  182. (*ret_chan)->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  183. ESP_LOGD(TAG, "new %s channel (%d,%d) at %p", (config->direction == GDMA_CHANNEL_DIRECTION_TX) ? "tx" : "rx",
  184. group->group_id, pair->pair_id, *ret_chan);
  185. return ESP_OK;
  186. err:
  187. if (alloc_tx_channel) {
  188. free(alloc_tx_channel);
  189. }
  190. if (alloc_rx_channel) {
  191. free(alloc_rx_channel);
  192. }
  193. if (pair) {
  194. gdma_release_pair_handle(pair);
  195. }
  196. if (group) {
  197. gdma_release_group_handle(group);
  198. }
  199. return ret;
  200. }
  201. esp_err_t gdma_del_channel(gdma_channel_handle_t dma_chan)
  202. {
  203. esp_err_t ret = ESP_OK;
  204. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  205. ret = dma_chan->del(dma_chan); // call `gdma_del_tx_channel` or `gdma_del_rx_channel`
  206. err:
  207. return ret;
  208. }
  209. esp_err_t gdma_get_channel_id(gdma_channel_handle_t dma_chan, int *channel_id)
  210. {
  211. esp_err_t ret = ESP_OK;
  212. gdma_pair_t *pair = NULL;
  213. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  214. pair = dma_chan->pair;
  215. *channel_id = pair->pair_id;
  216. err:
  217. return ret;
  218. }
  219. esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_periph)
  220. {
  221. esp_err_t ret = ESP_OK;
  222. gdma_pair_t *pair = NULL;
  223. gdma_group_t *group = NULL;
  224. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  225. ESP_GOTO_ON_FALSE(dma_chan->periph_id == GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "channel is using by peripheral: %d", dma_chan->periph_id);
  226. pair = dma_chan->pair;
  227. group = pair->group;
  228. dma_chan->periph_id = trig_periph.instance_id;
  229. // enable/disable m2m mode
  230. gdma_ll_enable_m2m_mode(group->hal.dev, pair->pair_id, trig_periph.periph == GDMA_TRIG_PERIPH_M2M);
  231. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  232. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  233. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  234. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  235. }
  236. } else {
  237. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  238. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  239. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  240. }
  241. }
  242. err:
  243. return ret;
  244. }
  245. esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan)
  246. {
  247. esp_err_t ret = ESP_OK;
  248. gdma_pair_t *pair = NULL;
  249. gdma_group_t *group = NULL;
  250. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  251. ESP_GOTO_ON_FALSE(dma_chan->periph_id != GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "no peripheral is connected to the channel");
  252. pair = dma_chan->pair;
  253. group = pair->group;
  254. dma_chan->periph_id = GDMA_INVALID_PERIPH_TRIG;
  255. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  256. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  257. } else {
  258. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  259. }
  260. err:
  261. return ret;
  262. }
  263. esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability)
  264. {
  265. esp_err_t ret = ESP_OK;
  266. gdma_pair_t *pair = NULL;
  267. gdma_group_t *group = NULL;
  268. bool en_burst = true;
  269. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  270. pair = dma_chan->pair;
  271. group = pair->group;
  272. size_t sram_alignment = ability->sram_trans_align;
  273. size_t psram_alignment = ability->psram_trans_align;
  274. // alignment should be 2^n
  275. ESP_GOTO_ON_FALSE((sram_alignment & (sram_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, err, TAG, "invalid sram alignment: %zu", sram_alignment);
  276. #if SOC_GDMA_SUPPORT_PSRAM
  277. int block_size_index = 0;
  278. switch (psram_alignment) {
  279. case 64: // 64 Bytes alignment
  280. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_64B;
  281. break;
  282. case 32: // 32 Bytes alignment
  283. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_32B;
  284. break;
  285. case 16: // 16 Bytes alignment
  286. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  287. break;
  288. case 0: // no alignment is requirement
  289. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  290. psram_alignment = SOC_GDMA_PSRAM_MIN_ALIGN; // fall back to minimal alignment
  291. break;
  292. default:
  293. ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid psram alignment: %zu", psram_alignment);
  294. break;
  295. }
  296. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  297. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  298. // TX channel can always enable burst mode, no matter data alignment
  299. gdma_ll_tx_enable_data_burst(group->hal.dev, pair->pair_id, true);
  300. gdma_ll_tx_enable_descriptor_burst(group->hal.dev, pair->pair_id, true);
  301. #if SOC_GDMA_SUPPORT_PSRAM
  302. gdma_ll_tx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  303. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  304. } else {
  305. // RX channel burst mode depends on specific data alignment
  306. en_burst = sram_alignment >= 4;
  307. gdma_ll_rx_enable_data_burst(group->hal.dev, pair->pair_id, en_burst);
  308. gdma_ll_rx_enable_descriptor_burst(group->hal.dev, pair->pair_id, en_burst);
  309. #if SOC_GDMA_SUPPORT_PSRAM
  310. gdma_ll_rx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  311. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  312. }
  313. dma_chan->sram_alignment = sram_alignment;
  314. dma_chan->psram_alignment = psram_alignment;
  315. ESP_LOGD(TAG, "%s channel (%d,%d), (%zu:%zu) bytes aligned, burst %s", dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX ? "tx" : "rx",
  316. group->group_id, pair->pair_id, sram_alignment, psram_alignment, en_burst ? "enabled" : "disabled");
  317. err:
  318. return ret;
  319. }
  320. esp_err_t gdma_apply_strategy(gdma_channel_handle_t dma_chan, const gdma_strategy_config_t *config)
  321. {
  322. esp_err_t ret = ESP_OK;
  323. gdma_pair_t *pair = NULL;
  324. gdma_group_t *group = NULL;
  325. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  326. pair = dma_chan->pair;
  327. group = pair->group;
  328. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  329. gdma_ll_tx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  330. gdma_ll_tx_enable_auto_write_back(group->hal.dev, pair->pair_id, config->auto_update_desc);
  331. } else {
  332. gdma_ll_rx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  333. }
  334. err:
  335. return ret;
  336. }
  337. esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_tx_event_callbacks_t *cbs, void *user_data)
  338. {
  339. esp_err_t ret = ESP_OK;
  340. gdma_pair_t *pair = NULL;
  341. gdma_group_t *group = NULL;
  342. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  343. pair = dma_chan->pair;
  344. group = pair->group;
  345. gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base);
  346. #if CONFIG_GDMA_ISR_IRAM_SAFE
  347. if (cbs->on_trans_eof) {
  348. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_trans_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_trans_eof not in IRAM");
  349. }
  350. if (user_data) {
  351. ESP_GOTO_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in internal RAM");
  352. }
  353. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  354. // lazy install interrupt service
  355. ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed");
  356. // enable/disable GDMA interrupt events for TX channel
  357. portENTER_CRITICAL(&pair->spinlock);
  358. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_TX_EOF, cbs->on_trans_eof != NULL);
  359. portEXIT_CRITICAL(&pair->spinlock);
  360. tx_chan->on_trans_eof = cbs->on_trans_eof;
  361. tx_chan->user_data = user_data;
  362. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  363. err:
  364. return ret;
  365. }
  366. esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_rx_event_callbacks_t *cbs, void *user_data)
  367. {
  368. esp_err_t ret = ESP_OK;
  369. gdma_pair_t *pair = NULL;
  370. gdma_group_t *group = NULL;
  371. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  372. pair = dma_chan->pair;
  373. group = pair->group;
  374. gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base);
  375. #if CONFIG_GDMA_ISR_IRAM_SAFE
  376. if (cbs->on_recv_eof) {
  377. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_recv_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_recv_eof not in IRAM");
  378. }
  379. if (user_data) {
  380. ESP_GOTO_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in internal RAM");
  381. }
  382. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  383. // lazy install interrupt service
  384. ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed");
  385. // enable/disable GDMA interrupt events for RX channel
  386. portENTER_CRITICAL(&pair->spinlock);
  387. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_RX_SUC_EOF, cbs->on_recv_eof != NULL);
  388. portEXIT_CRITICAL(&pair->spinlock);
  389. rx_chan->on_recv_eof = cbs->on_recv_eof;
  390. rx_chan->user_data = user_data;
  391. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  392. err:
  393. return ret;
  394. }
  395. esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
  396. {
  397. esp_err_t ret = ESP_OK;
  398. gdma_pair_t *pair = NULL;
  399. gdma_group_t *group = NULL;
  400. ESP_GOTO_ON_FALSE_ISR(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  401. pair = dma_chan->pair;
  402. group = pair->group;
  403. portENTER_CRITICAL_SAFE(&dma_chan->spinlock);
  404. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  405. gdma_ll_rx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  406. gdma_ll_rx_start(group->hal.dev, pair->pair_id);
  407. } else {
  408. gdma_ll_tx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  409. gdma_ll_tx_start(group->hal.dev, pair->pair_id);
  410. }
  411. portEXIT_CRITICAL_SAFE(&dma_chan->spinlock);
  412. err:
  413. return ret;
  414. }
  415. esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
  416. {
  417. esp_err_t ret = ESP_OK;
  418. gdma_pair_t *pair = NULL;
  419. gdma_group_t *group = NULL;
  420. ESP_GOTO_ON_FALSE_ISR(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  421. pair = dma_chan->pair;
  422. group = pair->group;
  423. portENTER_CRITICAL_SAFE(&dma_chan->spinlock);
  424. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  425. gdma_ll_rx_stop(group->hal.dev, pair->pair_id);
  426. } else {
  427. gdma_ll_tx_stop(group->hal.dev, pair->pair_id);
  428. }
  429. portEXIT_CRITICAL_SAFE(&dma_chan->spinlock);
  430. err:
  431. return ret;
  432. }
  433. esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
  434. {
  435. esp_err_t ret = ESP_OK;
  436. gdma_pair_t *pair = NULL;
  437. gdma_group_t *group = NULL;
  438. ESP_GOTO_ON_FALSE_ISR(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  439. pair = dma_chan->pair;
  440. group = pair->group;
  441. portENTER_CRITICAL_SAFE(&dma_chan->spinlock);
  442. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  443. gdma_ll_rx_restart(group->hal.dev, pair->pair_id);
  444. } else {
  445. gdma_ll_tx_restart(group->hal.dev, pair->pair_id);
  446. }
  447. portEXIT_CRITICAL_SAFE(&dma_chan->spinlock);
  448. err:
  449. return ret;
  450. }
  451. esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
  452. {
  453. esp_err_t ret = ESP_OK;
  454. gdma_pair_t *pair = NULL;
  455. gdma_group_t *group = NULL;
  456. ESP_GOTO_ON_FALSE_ISR(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  457. pair = dma_chan->pair;
  458. group = pair->group;
  459. portENTER_CRITICAL_SAFE(&dma_chan->spinlock);
  460. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  461. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id);
  462. } else {
  463. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id);
  464. }
  465. portEXIT_CRITICAL_SAFE(&dma_chan->spinlock);
  466. err:
  467. return ret;
  468. }
  469. static void gdma_release_group_handle(gdma_group_t *group)
  470. {
  471. int group_id = group->group_id;
  472. bool do_deinitialize = false;
  473. portENTER_CRITICAL(&s_platform.spinlock);
  474. s_platform.group_ref_counts[group_id]--;
  475. if (s_platform.group_ref_counts[group_id] == 0) {
  476. assert(s_platform.groups[group_id]);
  477. do_deinitialize = true;
  478. s_platform.groups[group_id] = NULL; // deregister from platfrom
  479. gdma_ll_enable_clock(group->hal.dev, false);
  480. periph_module_disable(gdma_periph_signals.groups[group_id].module);
  481. }
  482. portEXIT_CRITICAL(&s_platform.spinlock);
  483. if (do_deinitialize) {
  484. free(group);
  485. ESP_LOGD(TAG, "del group %d", group_id);
  486. }
  487. }
  488. static gdma_group_t *gdma_acquire_group_handle(int group_id)
  489. {
  490. bool new_group = false;
  491. gdma_group_t *group = NULL;
  492. gdma_group_t *pre_alloc_group = heap_caps_calloc(1, sizeof(gdma_group_t), GDMA_MEM_ALLOC_CAPS);
  493. if (!pre_alloc_group) {
  494. goto out;
  495. }
  496. portENTER_CRITICAL(&s_platform.spinlock);
  497. if (!s_platform.groups[group_id]) {
  498. new_group = true;
  499. group = pre_alloc_group;
  500. s_platform.groups[group_id] = group; // register to platform
  501. group->group_id = group_id;
  502. group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  503. periph_module_enable(gdma_periph_signals.groups[group_id].module); // enable APB to access GDMA registers
  504. gdma_hal_init(&group->hal, group_id); // initialize HAL context
  505. gdma_ll_enable_clock(group->hal.dev, true); // enable gdma clock
  506. } else {
  507. group = s_platform.groups[group_id];
  508. }
  509. // someone acquired the group handle means we have a new object that refer to this group
  510. s_platform.group_ref_counts[group_id]++;
  511. portEXIT_CRITICAL(&s_platform.spinlock);
  512. if (new_group) {
  513. ESP_LOGD(TAG, "new group (%d) at %p", group->group_id, group);
  514. } else {
  515. free(pre_alloc_group);
  516. }
  517. out:
  518. return group;
  519. }
  520. static void gdma_release_pair_handle(gdma_pair_t *pair)
  521. {
  522. gdma_group_t *group = pair->group;
  523. int pair_id = pair->pair_id;
  524. bool do_deinitialize = false;
  525. portENTER_CRITICAL(&group->spinlock);
  526. group->pair_ref_counts[pair_id]--;
  527. if (group->pair_ref_counts[pair_id] == 0) {
  528. assert(group->pairs[pair_id]);
  529. do_deinitialize = true;
  530. group->pairs[pair_id] = NULL; // deregister from pair
  531. }
  532. portEXIT_CRITICAL(&group->spinlock);
  533. if (do_deinitialize) {
  534. free(pair);
  535. ESP_LOGD(TAG, "del pair (%d,%d)", group->group_id, pair_id);
  536. gdma_release_group_handle(group);
  537. }
  538. }
  539. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id)
  540. {
  541. bool new_pair = false;
  542. gdma_pair_t *pair = NULL;
  543. gdma_pair_t *pre_alloc_pair = heap_caps_calloc(1, sizeof(gdma_pair_t), GDMA_MEM_ALLOC_CAPS);
  544. if (!pre_alloc_pair) {
  545. goto out;
  546. }
  547. portENTER_CRITICAL(&group->spinlock);
  548. if (!group->pairs[pair_id]) {
  549. new_pair = true;
  550. pair = pre_alloc_pair;
  551. group->pairs[pair_id] = pair; // register to group
  552. pair->group = group;
  553. pair->pair_id = pair_id;
  554. pair->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  555. } else {
  556. pair = group->pairs[pair_id];
  557. }
  558. // someone acquired the pair handle means we have a new object that refer to this pair
  559. group->pair_ref_counts[pair_id]++;
  560. portEXIT_CRITICAL(&group->spinlock);
  561. if (new_pair) {
  562. portENTER_CRITICAL(&s_platform.spinlock);
  563. s_platform.group_ref_counts[group->group_id]++; // pair obtains a reference to group
  564. portEXIT_CRITICAL(&s_platform.spinlock);
  565. ESP_LOGD(TAG, "new pair (%d,%d) at %p", group->group_id, pair->pair_id, pair);
  566. } else {
  567. free(pre_alloc_pair);
  568. }
  569. out:
  570. return pair;
  571. }
  572. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel)
  573. {
  574. gdma_pair_t *pair = dma_channel->pair;
  575. gdma_group_t *group = pair->group;
  576. int pair_id = pair->pair_id;
  577. int group_id = group->group_id;
  578. gdma_tx_channel_t *tx_chan = __containerof(dma_channel, gdma_tx_channel_t, base);
  579. portENTER_CRITICAL(&pair->spinlock);
  580. pair->tx_chan = NULL;
  581. pair->occupy_code &= ~SEARCH_REQUEST_TX_CHANNEL;
  582. portEXIT_CRITICAL(&pair->spinlock);
  583. if (dma_channel->intr) {
  584. esp_intr_free(dma_channel->intr);
  585. portENTER_CRITICAL(&pair->spinlock);
  586. gdma_ll_tx_enable_interrupt(group->hal.dev, pair_id, UINT32_MAX, false); // disable all interupt events
  587. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair_id, UINT32_MAX); // clear all pending events
  588. portEXIT_CRITICAL(&pair->spinlock);
  589. ESP_LOGD(TAG, "uninstall interrupt service for tx channel (%d,%d)", group_id, pair_id);
  590. }
  591. free(tx_chan);
  592. ESP_LOGD(TAG, "del tx channel (%d,%d)", group_id, pair_id);
  593. // channel has a reference on pair, release it now
  594. gdma_release_pair_handle(pair);
  595. return ESP_OK;
  596. }
  597. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel)
  598. {
  599. gdma_pair_t *pair = dma_channel->pair;
  600. gdma_group_t *group = pair->group;
  601. int pair_id = pair->pair_id;
  602. int group_id = group->group_id;
  603. gdma_rx_channel_t *rx_chan = __containerof(dma_channel, gdma_rx_channel_t, base);
  604. portENTER_CRITICAL(&pair->spinlock);
  605. pair->rx_chan = NULL;
  606. pair->occupy_code &= ~SEARCH_REQUEST_RX_CHANNEL;
  607. portEXIT_CRITICAL(&pair->spinlock);
  608. if (dma_channel->intr) {
  609. esp_intr_free(dma_channel->intr);
  610. portENTER_CRITICAL(&pair->spinlock);
  611. gdma_ll_rx_enable_interrupt(group->hal.dev, pair_id, UINT32_MAX, false); // disable all interupt events
  612. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair_id, UINT32_MAX); // clear all pending events
  613. portEXIT_CRITICAL(&pair->spinlock);
  614. ESP_LOGD(TAG, "uninstall interrupt service for rx channel (%d,%d)", group_id, pair_id);
  615. }
  616. free(rx_chan);
  617. ESP_LOGD(TAG, "del rx channel (%d,%d)", group_id, pair_id);
  618. gdma_release_pair_handle(pair);
  619. return ESP_OK;
  620. }
  621. static void IRAM_ATTR gdma_default_rx_isr(void *args)
  622. {
  623. gdma_rx_channel_t *rx_chan = (gdma_rx_channel_t *)args;
  624. gdma_pair_t *pair = rx_chan->base.pair;
  625. gdma_group_t *group = pair->group;
  626. bool need_yield = false;
  627. // clear pending interrupt event
  628. uint32_t intr_status = gdma_ll_rx_get_interrupt_status(group->hal.dev, pair->pair_id);
  629. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  630. if (intr_status & GDMA_LL_EVENT_RX_SUC_EOF) {
  631. if (rx_chan && rx_chan->on_recv_eof) {
  632. uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id);
  633. gdma_event_data_t edata = {
  634. .rx_eof_desc_addr = eof_addr
  635. };
  636. if (rx_chan->on_recv_eof(&rx_chan->base, &edata, rx_chan->user_data)) {
  637. need_yield = true;
  638. }
  639. }
  640. }
  641. if (need_yield) {
  642. portYIELD_FROM_ISR();
  643. }
  644. }
  645. static void IRAM_ATTR gdma_default_tx_isr(void *args)
  646. {
  647. gdma_tx_channel_t *tx_chan = (gdma_tx_channel_t *)args;
  648. gdma_pair_t *pair = tx_chan->base.pair;
  649. gdma_group_t *group = pair->group;
  650. bool need_yield = false;
  651. // clear pending interrupt event
  652. uint32_t intr_status = gdma_ll_tx_get_interrupt_status(group->hal.dev, pair->pair_id);
  653. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  654. if (intr_status & GDMA_LL_EVENT_TX_EOF) {
  655. if (tx_chan && tx_chan->on_trans_eof) {
  656. uint32_t eof_addr = gdma_ll_tx_get_eof_desc_addr(group->hal.dev, pair->pair_id);
  657. gdma_event_data_t edata = {
  658. .tx_eof_desc_addr = eof_addr
  659. };
  660. if (tx_chan->on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data)) {
  661. need_yield = true;
  662. }
  663. }
  664. }
  665. if (need_yield) {
  666. portYIELD_FROM_ISR();
  667. }
  668. }
  669. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan)
  670. {
  671. esp_err_t ret = ESP_OK;
  672. gdma_pair_t *pair = rx_chan->base.pair;
  673. gdma_group_t *group = pair->group;
  674. // pre-alloc a interrupt handle, with handler disabled
  675. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  676. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  677. isr_flags |= ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED;
  678. #endif
  679. intr_handle_t intr = NULL;
  680. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].rx_irq_id, isr_flags,
  681. (uint32_t)gdma_ll_rx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_RX_EVENT_MASK,
  682. gdma_default_rx_isr, rx_chan, &intr);
  683. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  684. rx_chan->base.intr = intr;
  685. portENTER_CRITICAL(&pair->spinlock);
  686. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  687. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  688. portEXIT_CRITICAL(&pair->spinlock);
  689. ESP_LOGD(TAG, "install interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  690. err:
  691. return ret;
  692. }
  693. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan)
  694. {
  695. esp_err_t ret = ESP_OK;
  696. gdma_pair_t *pair = tx_chan->base.pair;
  697. gdma_group_t *group = pair->group;
  698. // pre-alloc a interrupt handle, with handler disabled
  699. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  700. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  701. isr_flags |= ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED;
  702. #endif
  703. intr_handle_t intr = NULL;
  704. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].tx_irq_id, isr_flags,
  705. (uint32_t)gdma_ll_tx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_TX_EVENT_MASK,
  706. gdma_default_tx_isr, tx_chan, &intr);
  707. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  708. tx_chan->base.intr = intr;
  709. portENTER_CRITICAL(&pair->spinlock);
  710. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  711. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  712. portEXIT_CRITICAL(&pair->spinlock);
  713. ESP_LOGD(TAG, "install interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  714. err:
  715. return ret;
  716. }