efuse.h 12 KB

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  1. // Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #ifndef _ROM_EFUSE_H_
  14. #define _ROM_EFUSE_H_
  15. #ifdef __cplusplus
  16. extern "C" {
  17. #endif
  18. #include <stdlib.h>
  19. #include <stdbool.h>
  20. /** \defgroup efuse_APIs efuse APIs
  21. * @brief ESP32 efuse read/write APIs
  22. * @attention
  23. *
  24. */
  25. /** @addtogroup efuse_APIs
  26. * @{
  27. */
  28. typedef enum {
  29. ETS_EFUSE_KEY_PURPOSE_USER = 0,
  30. ETS_EFUSE_KEY_PURPOSE_RESERVED = 1,
  31. ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 = 2,
  32. ETS_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 = 3,
  33. ETS_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY = 4,
  34. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_ALL = 5,
  35. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_JTAG = 6,
  36. ETS_EFUSE_KEY_PURPOSE_HMAC_DOWN_DIGITAL_SIGNATURE = 7,
  37. ETS_EFUSE_KEY_PURPOSE_HMAC_UP = 8,
  38. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST0 = 9,
  39. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST1 = 10,
  40. ETS_EFUSE_KEY_PURPOSE_SECURE_BOOT_DIGEST2 = 11,
  41. ETS_EFUSE_KEY_PURPOSE_MAX,
  42. } ets_efuse_purpose_t;
  43. typedef enum {
  44. ETS_EFUSE_BLOCK0 = 0,
  45. ETS_EFUSE_MAC_SPI_SYS_0 = 1,
  46. ETS_EFUSE_BLOCK_SYS_DATA = 2,
  47. ETS_EFUSE_BLOCK_USR_DATA = 3,
  48. ETS_EFUSE_BLOCK_KEY0 = 4,
  49. ETS_EFUSE_BLOCK_KEY1 = 5,
  50. ETS_EFUSE_BLOCK_KEY2 = 6,
  51. ETS_EFUSE_BLOCK_KEY3 = 7,
  52. ETS_EFUSE_BLOCK_KEY4 = 8,
  53. ETS_EFUSE_BLOCK_KEY5 = 9,
  54. ETS_EFUSE_BLOCK_KEY6 = 10,
  55. ETS_EFUSE_BLOCK_MAX,
  56. } ets_efuse_block_t;
  57. /**
  58. * @brief set timing accroding the apb clock, so no read error or write error happens.
  59. *
  60. * @param clock: apb clock in HZ, only accept 20M, 40M, 80M.
  61. *
  62. * @return : 0 if success, others if clock not accepted
  63. */
  64. int ets_efuse_set_timing(uint32_t clock);
  65. /**
  66. * @brief Enable efuse subsystem. Called after reset. Doesn't need to be called again.
  67. */
  68. void ets_efuse_start(void);
  69. /**
  70. * @brief Efuse read operation: copies data from physical efuses to efuse read registers.
  71. *
  72. * @param null
  73. *
  74. * @return : 0 is success, others if apb clock is not accepted
  75. */
  76. int ets_efuse_read(void);
  77. /**
  78. * @brief Efuse write operation: Copies data from efuse write registers to efuse. Operates on a single block of efuses at a time.
  79. *
  80. * @note This function does not update read efuses, call ets_efuse_read() once all programming is complete.
  81. *
  82. * @return : 0 is success, others if apb clock is not accepted
  83. */
  84. int ets_efuse_program(ets_efuse_block_t block);
  85. /**
  86. * @brief Set all Efuse program registers to zero.
  87. *
  88. * Call this before writing new data to the program registers.
  89. */
  90. void ets_efuse_clear_program_registers(void);
  91. /**
  92. * @brief Program a block of key data to an efuse block
  93. *
  94. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6. Key block must be unused (@ref ets_efuse_key_block_unused).
  95. * @param purpose Purpose to set for this key. Purpose must be already unset.
  96. * @param data Pointer to data to write.
  97. * @param data_len Length of data to write.
  98. *
  99. * @note This function also calls ets_efuse_program() for the specified block, and for block 0 (setting the purpose)
  100. */
  101. int ets_efuse_write_key(ets_efuse_block_t key_block, ets_efuse_purpose_t purpose, const void *data, size_t data_len);
  102. /* @brief Return the address of a particular efuse block's first read register
  103. *
  104. * @param block Index of efuse block to look up
  105. *
  106. * @return 0 if block is invalid, otherwise a numeric read register address
  107. * of the first word in the block.
  108. */
  109. uint32_t ets_efuse_get_read_register_address(ets_efuse_block_t block);
  110. /**
  111. * @brief Return the current purpose set for an efuse key block
  112. *
  113. * @param key_block Block to read purpose for. Must be in range ETS_EFUSE_BLOCK_KEY0 to ETS_EFUSE_BLOCK_KEY6.
  114. */
  115. ets_efuse_purpose_t ets_efuse_get_key_purpose(ets_efuse_block_t key_block);
  116. /**
  117. * @brief Find a key block with the particular purpose set
  118. *
  119. * @param purpose Purpose to search for.
  120. * @param[out] key_block Pointer which will be set to the key block if found. Can be NULL, if only need to test the key block exists.
  121. * @return true if found, false if not found. If false, value at key_block pointer is unchanged.
  122. */
  123. bool ets_efuse_find_purpose(ets_efuse_purpose_t purpose, ets_efuse_block_t *key_block);
  124. /**
  125. * Return true if the key block is unused, false otherwise.
  126. *
  127. * An unused key block is all zero content, not read or write protected,
  128. * and has purpose 0 (ETS_EFUSE_KEY_PURPOSE_USER)
  129. *
  130. * @param key_block key block to check.
  131. *
  132. * @return true if key block is unused, false if key block or used
  133. * or the specified block index is not a key block.
  134. */
  135. bool ets_efuse_key_block_unused(ets_efuse_block_t key_block);
  136. /**
  137. * @brief Search for an unused key block and return the first one found.
  138. *
  139. * See @ref ets_efuse_key_block_unused for a description of an unused key block.
  140. *
  141. * @return First unused key block, or ETS_EFUSE_BLOCK_MAX if no unused key block is found.
  142. */
  143. ets_efuse_block_t ets_efuse_find_unused_key_block(void);
  144. /**
  145. * @brief Return the number of unused efuse key blocks (0-6)
  146. */
  147. unsigned ets_efuse_count_unused_key_blocks(void);
  148. /**
  149. * @brief Calculate Reed-Solomon Encoding values for a block of efuse data.
  150. *
  151. * @param data Pointer to data buffer (length 32 bytes)
  152. * @param rs_values Pointer to write encoded data to (length 12 bytes)
  153. */
  154. void ets_efuse_rs_calculate(const void *data, void *rs_values);
  155. /**
  156. * @brief Read spi flash pads configuration from Efuse
  157. *
  158. * @return
  159. * - 0 for default SPI pins.
  160. * - 1 for default HSPI pins.
  161. * - Other values define a custom pin configuration mask. Pins are encoded as per the EFUSE_SPICONFIG_RET_SPICLK,
  162. * EFUSE_SPICONFIG_RET_SPIQ, EFUSE_SPICONFIG_RET_SPID, EFUSE_SPICONFIG_RET_SPICS0, EFUSE_SPICONFIG_RET_SPIHD macros.
  163. * WP pin (for quad I/O modes) is not saved in efuse and not returned by this function.
  164. */
  165. uint32_t ets_efuse_get_spiconfig(void);
  166. /**
  167. * @brief Read spi flash wp pad from Efuse
  168. *
  169. * @return
  170. * - 0x3f for invalid.
  171. * - 0~46 is valid.
  172. */
  173. uint32_t ets_efuse_get_wp_pad(void);
  174. /**
  175. * @brief Read opi flash pads configuration from Efuse
  176. *
  177. * @return
  178. * - 0 for default SPI pins.
  179. * - Other values define a custom pin configuration mask. From the LSB, every 6 bits represent a GPIO number which stand for:
  180. * DQS, D4, D5, D6, D7 accordingly.
  181. */
  182. uint32_t ets_efuse_get_opiconfig(void);
  183. /**
  184. * @brief Read if download mode disabled from Efuse
  185. *
  186. * @return
  187. * - true for efuse disable download mode.
  188. * - false for efuse doesn't disable download mode.
  189. */
  190. bool ets_efuse_download_modes_disabled(void);
  191. /**
  192. * @brief Read if legacy spi flash boot mode disabled from Efuse
  193. *
  194. * @return
  195. * - true for efuse disable legacy spi flash boot mode.
  196. * - false for efuse doesn't disable legacy spi flash boot mode.
  197. */
  198. bool ets_efuse_legacy_spi_boot_mode_disabled(void);
  199. /**
  200. * @brief Read if uart print control value from Efuse
  201. *
  202. * @return
  203. * - 0 for uart force print.
  204. * - 1 for uart print when GPIO46 is low when digital reset.
  205. * 2 for uart print when GPIO46 is high when digital reset.
  206. * 3 for uart force slient
  207. */
  208. uint32_t ets_efuse_get_uart_print_control(void);
  209. /**
  210. * @brief Read which channel will used by ROM to print
  211. *
  212. * @return
  213. * - 0 for UART0.
  214. * - 1 for UART1.
  215. */
  216. uint32_t ets_efuse_get_uart_print_channel(void);
  217. /**
  218. * @brief Read if usb download mode disabled from Efuse
  219. *
  220. * (Also returns true if security download mode is enabled, as this mode
  221. * disables USB download.)
  222. *
  223. * @return
  224. * - true for efuse disable usb download mode.
  225. * - false for efuse doesn't disable usb download mode.
  226. */
  227. bool ets_efuse_usb_download_mode_disabled(void);
  228. /**
  229. * @brief Read if tiny basic mode disabled from Efuse
  230. *
  231. * @return
  232. * - true for efuse disable tiny basic mode.
  233. * - false for efuse doesn't disable tiny basic mode.
  234. */
  235. bool ets_efuse_tiny_basic_mode_disabled(void);
  236. /**
  237. * @brief Read if usb module disabled from Efuse
  238. *
  239. * @return
  240. * - true for efuse disable usb module.
  241. * - false for efuse doesn't disable usb module.
  242. */
  243. bool ets_efuse_usb_module_disabled(void);
  244. /**
  245. * @brief Read if security download modes enabled from Efuse
  246. *
  247. * @return
  248. * - true for efuse enable security download mode.
  249. * - false for efuse doesn't enable security download mode.
  250. */
  251. bool ets_efuse_security_download_modes_enabled(void);
  252. /**
  253. * @brief Return true if secure boot is enabled in EFuse
  254. */
  255. bool ets_efuse_secure_boot_enabled(void);
  256. /**
  257. * @brief Return true if secure boot aggressive revoke is enabled in EFuse
  258. */
  259. bool ets_efuse_secure_boot_aggressive_revoke_enabled(void);
  260. /**
  261. * @brief Return true if cache encryption (flash, PSRAM, etc) is enabled from boot via EFuse
  262. */
  263. bool ets_efuse_cache_encryption_enabled(void);
  264. /**
  265. * @brief Return true if EFuse indicates an external phy needs to be used for USB
  266. */
  267. bool ets_efuse_usb_use_ext_phy(void);
  268. /**
  269. * @brief Return true if EFuse indicates USB device persistence is disabled
  270. */
  271. bool ets_efuse_usb_force_nopersist(void);
  272. /**
  273. * @brief Return true if OPI pins GPIO33-37 are powered by VDDSPI, otherwise by VDD33CPU
  274. */
  275. bool ets_efuse_flash_opi_5pads_power_sel_vddspi(void);
  276. /**
  277. * @brief Return true if EFuse indicates an opi flash is attached.
  278. */
  279. bool ets_efuse_flash_opi_mode(void);
  280. /**
  281. * @brief Return true if EFuse indicates to send a flash resume command.
  282. */
  283. bool ets_efuse_force_send_resume(void);
  284. /**
  285. * @brief return the time in us ROM boot need wait flash to power on from Efuse
  286. *
  287. * @return
  288. * - uint32_t the time in us.
  289. */
  290. uint32_t ets_efuse_get_flash_delay_us(void);
  291. #define EFUSE_SPICONFIG_SPI_DEFAULTS 0
  292. #define EFUSE_SPICONFIG_HSPI_DEFAULTS 1
  293. #define EFUSE_SPICONFIG_RET_SPICLK_MASK 0x3f
  294. #define EFUSE_SPICONFIG_RET_SPICLK_SHIFT 0
  295. #define EFUSE_SPICONFIG_RET_SPICLK(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICLK_SHIFT) & EFUSE_SPICONFIG_RET_SPICLK_MASK)
  296. #define EFUSE_SPICONFIG_RET_SPIQ_MASK 0x3f
  297. #define EFUSE_SPICONFIG_RET_SPIQ_SHIFT 6
  298. #define EFUSE_SPICONFIG_RET_SPIQ(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIQ_SHIFT) & EFUSE_SPICONFIG_RET_SPIQ_MASK)
  299. #define EFUSE_SPICONFIG_RET_SPID_MASK 0x3f
  300. #define EFUSE_SPICONFIG_RET_SPID_SHIFT 12
  301. #define EFUSE_SPICONFIG_RET_SPID(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPID_SHIFT) & EFUSE_SPICONFIG_RET_SPID_MASK)
  302. #define EFUSE_SPICONFIG_RET_SPICS0_MASK 0x3f
  303. #define EFUSE_SPICONFIG_RET_SPICS0_SHIFT 18
  304. #define EFUSE_SPICONFIG_RET_SPICS0(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPICS0_SHIFT) & EFUSE_SPICONFIG_RET_SPICS0_MASK)
  305. #define EFUSE_SPICONFIG_RET_SPIHD_MASK 0x3f
  306. #define EFUSE_SPICONFIG_RET_SPIHD_SHIFT 24
  307. #define EFUSE_SPICONFIG_RET_SPIHD(ret) (((ret) >> EFUSE_SPICONFIG_RET_SPIHD_SHIFT) & EFUSE_SPICONFIG_RET_SPIHD_MASK)
  308. /**
  309. * @brief Enable JTAG temporarily by writing a JTAG HMAC "key" into
  310. * the JTAG_CTRL registers.
  311. *
  312. * Works if JTAG has been "soft" disabled by burning the EFUSE_SOFT_DIS_JTAG efuse.
  313. *
  314. * Will enable the HMAC module to generate a "downstream" HMAC value from a key already saved in efuse, and then write the JTAG HMAC "key" which will enable JTAG if the two keys match.
  315. *
  316. * @param jtag_hmac_key Pointer to a 32 byte array containing a valid key. Supplied by user.
  317. * @param key_block Index of a key block containing the source for this key.
  318. *
  319. * @return ETS_FAILED if HMAC operation fails or invalid parameter, ETS_OK otherwise. ETS_OK doesn't necessarily mean that JTAG was enabled.
  320. */
  321. int ets_jtag_enable_temporarily(const uint8_t *jtag_hmac_key, ets_efuse_block_t key_block);
  322. /**
  323. * @brief A crc8 algorithm used for MAC addresses in efuse
  324. *
  325. * @param unsigned char const *p : Pointer to original data.
  326. *
  327. * @param unsigned int len : Data length in byte.
  328. *
  329. * @return unsigned char: Crc value.
  330. */
  331. unsigned char esp_crc8(unsigned char const *p, unsigned int len);
  332. /**
  333. * @}
  334. */
  335. #ifdef __cplusplus
  336. }
  337. #endif
  338. #endif /* _ROM_EFUSE_H_ */