spi_flash_hal_iram.c 6.2 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "hal/spi_flash_hal.h"
  8. #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  9. void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host);
  10. void spi_flash_hal_disable_auto_resume_mode(spi_flash_host_inst_t *host);
  11. void spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t *host);
  12. void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host);
  13. #endif //SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  14. #ifndef CONFIG_SPI_FLASH_ROM_IMPL
  15. #include "spi_flash_hal_common.inc"
  16. // HAL for
  17. // - MEMSPI
  18. // - SPI1~3 on ESP32/S2/S3/C3/H2/C2
  19. // The common part is in spi_flash_hal_common.inc
  20. void spi_flash_hal_erase_chip(spi_flash_host_inst_t *host)
  21. {
  22. spi_dev_t *dev = get_spi_dev(host);
  23. spi_flash_ll_erase_chip(dev);
  24. #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
  25. if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
  26. host->driver->poll_cmd_done(host);
  27. }
  28. #else
  29. host->driver->poll_cmd_done(host);
  30. #endif
  31. }
  32. // Only support 24bit address
  33. void spi_flash_hal_erase_sector(spi_flash_host_inst_t *host, uint32_t start_address)
  34. {
  35. spi_dev_t *dev = get_spi_dev(host);
  36. spi_flash_ll_set_addr_bitlen(dev, 24);
  37. spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
  38. spi_flash_ll_erase_sector(dev);
  39. #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
  40. if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
  41. host->driver->poll_cmd_done(host);
  42. }
  43. #else
  44. host->driver->poll_cmd_done(host);
  45. #endif
  46. }
  47. // Only support 24bit address
  48. void spi_flash_hal_erase_block(spi_flash_host_inst_t *host, uint32_t start_address)
  49. {
  50. spi_dev_t *dev = get_spi_dev(host);
  51. spi_flash_ll_set_addr_bitlen(dev, 24);
  52. spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
  53. spi_flash_ll_erase_block(dev);
  54. #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
  55. if((((spi_flash_hal_context_t*)host)->flags & SPI_FLASH_HOST_CONTEXT_FLAG_AUTO_SUSPEND) == 0) {
  56. host->driver->poll_cmd_done(host);
  57. }
  58. #else
  59. host->driver->poll_cmd_done(host);
  60. #endif
  61. }
  62. // Only support 24bit address
  63. void spi_flash_hal_program_page(spi_flash_host_inst_t *host, const void *buffer, uint32_t address, uint32_t length)
  64. {
  65. spi_dev_t *dev = get_spi_dev(host);
  66. spi_flash_ll_set_addr_bitlen(dev, 24);
  67. spi_flash_ll_set_address(dev, (address & ADDRESS_MASK_24BIT) | (length << 24));
  68. spi_flash_ll_program_page(dev, buffer, length);
  69. host->driver->poll_cmd_done(host);
  70. }
  71. esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_inst_t *host, bool wp)
  72. {
  73. spi_dev_t *dev = get_spi_dev(host);
  74. spi_flash_ll_set_write_protect(dev, wp);
  75. host->driver->poll_cmd_done(host);
  76. return ESP_OK;
  77. }
  78. #else // defined CONFIG_SPI_FLASH_ROM_IMPL
  79. static inline spi_dev_t *get_spi_dev(spi_flash_host_inst_t *host)
  80. {
  81. return ((spi_flash_hal_context_t*)host)->spi;
  82. }
  83. static inline int get_host_id(spi_flash_host_inst_t* host)
  84. {
  85. spi_dev_t *dev = get_spi_dev(host);
  86. return spi_flash_ll_hw_get_id(dev);
  87. }
  88. #endif // !CONFIG_SPI_FLASH_ROM_IMPL
  89. uint32_t spi_flash_hal_check_status(spi_flash_host_inst_t *host)
  90. {
  91. spi_dev_t *dev = get_spi_dev(host);
  92. uint32_t status = spi_flash_ll_host_idle(dev);
  93. #if SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
  94. uint32_t sus_status = spimem_flash_ll_sus_status((spi_mem_dev_t*)dev) << 1;
  95. #else
  96. uint32_t sus_status = 0;
  97. #endif
  98. // Not clear if this is necessary, or only necessary if
  99. // chip->spi == SPI1. But probably doesn't hurt...
  100. if ((void*) dev == spi_flash_ll_get_hw(SPI1_HOST)) {
  101. #if CONFIG_IDF_TARGET_ESP32
  102. status &= spi_flash_ll_host_idle(&SPI0);
  103. #endif
  104. }
  105. //status and sus_status should be mutual exclusion
  106. return (status | sus_status);
  107. }
  108. esp_err_t spi_flash_hal_setup_read_suspend(spi_flash_host_inst_t *host, const spi_flash_sus_cmd_conf *sus_conf)
  109. {
  110. #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  111. spi_mem_dev_t *dev = (spi_mem_dev_t *)spi_flash_ll_get_hw(SPI1_HOST);
  112. spi_flash_hal_context_t* ctx = (spi_flash_hal_context_t*)host;
  113. memcpy(&(ctx->sus_cfg), sus_conf, sizeof(spi_flash_sus_cmd_conf));
  114. spimem_flash_ll_set_read_sus_status(dev, sus_conf->sus_mask);
  115. spimem_flash_ll_suspend_cmd_setup(dev, sus_conf->sus_cmd);
  116. spimem_flash_ll_resume_cmd_setup(dev, sus_conf->res_cmd);
  117. spimem_flash_ll_rd_sus_cmd_setup(dev, sus_conf->cmd_rdsr);
  118. #endif // SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  119. return ESP_OK;
  120. }
  121. #if SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  122. void spi_flash_hal_setup_auto_suspend_mode(spi_flash_host_inst_t *host)
  123. {
  124. spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
  125. spimem_flash_ll_auto_wait_idle_init(dev, true);
  126. spimem_flash_ll_auto_suspend_init(dev, true);
  127. #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
  128. spimem_flash_ll_sus_check_sus_setup(dev, true);
  129. #endif
  130. }
  131. void spi_flash_hal_setup_auto_resume_mode(spi_flash_host_inst_t *host)
  132. {
  133. spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
  134. spimem_flash_ll_auto_resume_init(dev, true);
  135. #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
  136. spimem_flash_ll_res_check_sus_setup(dev, true);
  137. #endif
  138. }
  139. void spi_flash_hal_disable_auto_suspend_mode(spi_flash_host_inst_t *host)
  140. {
  141. spi_mem_dev_t *dev = (spi_mem_dev_t *)spi_flash_ll_get_hw(SPI1_HOST);
  142. spimem_flash_ll_auto_wait_idle_init(dev, false);
  143. spimem_flash_ll_auto_suspend_init(dev, false);
  144. #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
  145. spimem_flash_ll_sus_check_sus_setup(dev, false);
  146. #endif
  147. }
  148. void spi_flash_hal_disable_auto_resume_mode(spi_flash_host_inst_t *host)
  149. {
  150. spi_mem_dev_t *dev = (spi_mem_dev_t*)spi_flash_ll_get_hw(SPI1_HOST);
  151. spimem_flash_ll_auto_resume_init(dev, false);
  152. #if SOC_SPI_MEM_SUPPORT_CHECK_SUS
  153. spimem_flash_ll_res_check_sus_setup(dev, false);
  154. #endif
  155. }
  156. #endif // SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
  157. void spi_flash_hal_resume(spi_flash_host_inst_t *host)
  158. {
  159. #if SOC_SPI_MEM_SUPPORT_SW_SUSPEND
  160. spimem_flash_ll_resume((spi_mem_dev_t*)(((spi_flash_hal_context_t *)host)->spi));
  161. #else
  162. abort();
  163. #endif
  164. }
  165. void spi_flash_hal_suspend(spi_flash_host_inst_t *host)
  166. {
  167. #if SOC_SPI_MEM_SUPPORT_SW_SUSPEND
  168. spimem_flash_ll_suspend((spi_mem_dev_t *)(((spi_flash_hal_context_t *)host)->spi));
  169. #else
  170. abort();
  171. #endif
  172. }