wdt_hal_iram.c 6.3 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include <string.h>
  7. #include <stdbool.h>
  8. #include "hal/wdt_types.h"
  9. #include "hal/wdt_hal.h"
  10. /* ---------------------------- Init and Config ----------------------------- */
  11. void wdt_hal_init(wdt_hal_context_t *hal, wdt_inst_t wdt_inst, uint32_t prescaler, bool enable_intr)
  12. {
  13. //Initialize HAL context
  14. memset(hal, 0, sizeof(wdt_hal_context_t));
  15. if (wdt_inst == WDT_MWDT0) {
  16. hal->mwdt_dev = &TIMERG0;
  17. }
  18. #if SOC_TIMER_GROUPS >= 2
  19. else if (wdt_inst == WDT_MWDT1) {
  20. hal->mwdt_dev = &TIMERG1;
  21. }
  22. #endif
  23. else {
  24. hal->rwdt_dev = &RTCCNTL;
  25. }
  26. hal->inst = wdt_inst;
  27. if (hal->inst == WDT_RWDT) {
  28. //Unlock RTC WDT
  29. rwdt_ll_write_protect_disable(hal->rwdt_dev);
  30. //Disable RTC WDT, all stages, and all interrupts.
  31. rwdt_ll_disable(hal->rwdt_dev);
  32. rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE0);
  33. rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE1);
  34. rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE2);
  35. rwdt_ll_disable_stage(hal->rwdt_dev, WDT_STAGE3);
  36. #ifdef CONFIG_IDF_TARGET_ESP32
  37. //Enable or disable level interrupt. Edge interrupt is always disabled.
  38. rwdt_ll_set_edge_intr(hal->rwdt_dev, false);
  39. rwdt_ll_set_level_intr(hal->rwdt_dev, enable_intr);
  40. #else
  41. //Enable or disable chip reset on timeout, and length of chip reset signal
  42. rwdt_ll_set_chip_reset_width(hal->rwdt_dev, 0);
  43. rwdt_ll_set_chip_reset_en(hal->rwdt_dev, false);
  44. #endif
  45. rwdt_ll_clear_intr_status(hal->rwdt_dev);
  46. rwdt_ll_set_intr_enable(hal->rwdt_dev, enable_intr);
  47. //Set default values
  48. #if SOC_CPU_CORES_NUM > 1
  49. rwdt_ll_set_appcpu_reset_en(hal->rwdt_dev, true);
  50. #endif
  51. rwdt_ll_set_procpu_reset_en(hal->rwdt_dev, true);
  52. rwdt_ll_set_pause_in_sleep_en(hal->rwdt_dev, true);
  53. rwdt_ll_set_cpu_reset_length(hal->rwdt_dev, WDT_RESET_SIG_LENGTH_3_2us);
  54. rwdt_ll_set_sys_reset_length(hal->rwdt_dev, WDT_RESET_SIG_LENGTH_3_2us);
  55. //Lock RTC WDT
  56. rwdt_ll_write_protect_enable(hal->rwdt_dev);
  57. } else {
  58. //Unlock WDT
  59. mwdt_ll_write_protect_disable(hal->mwdt_dev);
  60. //Disable WDT and stages.
  61. mwdt_ll_disable(hal->mwdt_dev);
  62. mwdt_ll_disable_stage(hal->mwdt_dev, 0);
  63. mwdt_ll_disable_stage(hal->mwdt_dev, 1);
  64. mwdt_ll_disable_stage(hal->mwdt_dev, 2);
  65. mwdt_ll_disable_stage(hal->mwdt_dev, 3);
  66. #if !CONFIG_IDF_TARGET_ESP32C3 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32C2
  67. //Enable or disable level interrupt. Edge interrupt is always disabled.
  68. mwdt_ll_set_edge_intr(hal->mwdt_dev, false);
  69. mwdt_ll_set_level_intr(hal->mwdt_dev, enable_intr);
  70. #endif
  71. mwdt_ll_clear_intr_status(hal->mwdt_dev);
  72. mwdt_ll_set_intr_enable(hal->mwdt_dev, enable_intr);
  73. //Set default values
  74. mwdt_ll_set_cpu_reset_length(hal->mwdt_dev, WDT_RESET_SIG_LENGTH_3_2us);
  75. mwdt_ll_set_sys_reset_length(hal->mwdt_dev, WDT_RESET_SIG_LENGTH_3_2us);
  76. //Set tick period
  77. mwdt_ll_set_prescaler(hal->mwdt_dev, prescaler);
  78. //Lock WDT
  79. mwdt_ll_write_protect_enable(hal->mwdt_dev);
  80. }
  81. }
  82. void wdt_hal_deinit(wdt_hal_context_t *hal)
  83. {
  84. if (hal->inst == WDT_RWDT) {
  85. //Unlock WDT
  86. rwdt_ll_write_protect_disable(hal->rwdt_dev);
  87. //Disable WDT and clear any interrupts
  88. rwdt_ll_feed(hal->rwdt_dev);
  89. rwdt_ll_disable(hal->rwdt_dev);
  90. rwdt_ll_clear_intr_status(hal->rwdt_dev);
  91. rwdt_ll_set_intr_enable(hal->rwdt_dev, false);
  92. //Lock WDT
  93. rwdt_ll_write_protect_enable(hal->rwdt_dev);
  94. } else {
  95. //Unlock WDT
  96. mwdt_ll_write_protect_disable(hal->mwdt_dev);
  97. //Disable WDT and clear/disable any interrupts
  98. mwdt_ll_feed(hal->mwdt_dev);
  99. mwdt_ll_disable(hal->mwdt_dev);
  100. mwdt_ll_clear_intr_status(hal->mwdt_dev);
  101. mwdt_ll_set_intr_enable(hal->mwdt_dev, false);
  102. //Lock WDT
  103. mwdt_ll_write_protect_enable(hal->mwdt_dev);
  104. }
  105. //Deinit HAL context
  106. hal->mwdt_dev = NULL;
  107. }
  108. void wdt_hal_config_stage(wdt_hal_context_t *hal, wdt_stage_t stage, uint32_t timeout_ticks, wdt_stage_action_t behavior)
  109. {
  110. if (hal->inst == WDT_RWDT) {
  111. rwdt_ll_config_stage(hal->rwdt_dev, stage, timeout_ticks, behavior);
  112. } else {
  113. mwdt_ll_config_stage(hal->mwdt_dev, stage, timeout_ticks, behavior);
  114. }
  115. }
  116. /* -------------------------------- Runtime --------------------------------- */
  117. void wdt_hal_write_protect_disable(wdt_hal_context_t *hal)
  118. {
  119. if (hal->inst == WDT_RWDT) {
  120. rwdt_ll_write_protect_disable(hal->rwdt_dev);
  121. } else {
  122. mwdt_ll_write_protect_disable(hal->mwdt_dev);
  123. }
  124. }
  125. void wdt_hal_write_protect_enable(wdt_hal_context_t *hal)
  126. {
  127. if (hal->inst == WDT_RWDT) {
  128. rwdt_ll_write_protect_enable(hal->rwdt_dev);
  129. } else {
  130. mwdt_ll_write_protect_enable(hal->mwdt_dev);
  131. }
  132. }
  133. void wdt_hal_enable(wdt_hal_context_t *hal)
  134. {
  135. if (hal->inst == WDT_RWDT) {
  136. rwdt_ll_feed(hal->rwdt_dev);
  137. rwdt_ll_enable(hal->rwdt_dev);
  138. } else {
  139. mwdt_ll_feed(hal->mwdt_dev);
  140. mwdt_ll_enable(hal->mwdt_dev);
  141. }
  142. }
  143. void wdt_hal_disable(wdt_hal_context_t *hal)
  144. {
  145. if (hal->inst == WDT_RWDT) {
  146. rwdt_ll_disable(hal->rwdt_dev);
  147. } else {
  148. mwdt_ll_disable(hal->mwdt_dev);
  149. }
  150. }
  151. void wdt_hal_handle_intr(wdt_hal_context_t *hal)
  152. {
  153. if (hal->inst == WDT_RWDT) {
  154. rwdt_ll_feed(hal->rwdt_dev);
  155. rwdt_ll_clear_intr_status(hal->rwdt_dev);
  156. } else {
  157. mwdt_ll_feed(hal->mwdt_dev);
  158. mwdt_ll_clear_intr_status(hal->mwdt_dev);
  159. }
  160. }
  161. void wdt_hal_feed(wdt_hal_context_t *hal)
  162. {
  163. if (hal->inst == WDT_RWDT) {
  164. rwdt_ll_feed(hal->rwdt_dev);
  165. } else {
  166. mwdt_ll_feed(hal->mwdt_dev);
  167. }
  168. }
  169. void wdt_hal_set_flashboot_en(wdt_hal_context_t *hal, bool enable)
  170. {
  171. if (hal->inst == WDT_RWDT) {
  172. rwdt_ll_set_flashboot_en(hal->rwdt_dev, enable);
  173. } else {
  174. mwdt_ll_set_flashboot_en(hal->mwdt_dev, enable);
  175. }
  176. }
  177. bool wdt_hal_is_enabled(wdt_hal_context_t *hal)
  178. {
  179. if (hal->inst == WDT_RWDT) {
  180. return rwdt_ll_check_if_enabled(hal->rwdt_dev);
  181. } else {
  182. return mwdt_ll_check_if_enabled(hal->mwdt_dev);
  183. }
  184. }