spi_flash_os.h 8.7 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. /**
  7. * System level MSPI APIs (private)
  8. */
  9. /**
  10. * Currently the MSPI timing tuning related APIs are designed to be private.
  11. * Because:
  12. * 1. now we don't split SPI0 and SPI1, we don't have a component for SPI0, including PSRAM, Cache, etc..
  13. * 2. SPI0 and SPI1 are strongly coupling.
  14. *
  15. * In the future, we may consider creating a component for SPI0, and spi_flash component will only work on SPI1 (and it
  16. * can rely on SPI0). Therefore, we can put these APIs there.
  17. *
  18. */
  19. #pragma once
  20. #include <stdint.h>
  21. #include <stdbool.h>
  22. #include "sdkconfig.h"
  23. #include "esp_rom_spiflash.h"
  24. #include "esp_err.h"
  25. #include "esp_flash.h"
  26. #include "hal/spi_flash_hal.h"
  27. #include "spi_flash_override.h"
  28. #include "soc/soc_caps.h"
  29. #ifdef __cplusplus
  30. extern "C" {
  31. #endif
  32. // Type of MSPI IO
  33. typedef enum {
  34. ESP_MSPI_IO_CLK = 0,
  35. ESP_MSPI_IO_Q,
  36. ESP_MSPI_IO_D,
  37. ESP_MSPI_IO_CS0, /* cs for spi flash */
  38. ESP_MSPI_IO_HD,
  39. ESP_MSPI_IO_WP,
  40. #if SOC_SPI_MEM_SUPPORT_OPI_MODE
  41. ESP_MSPI_IO_DQS,
  42. ESP_MSPI_IO_D4,
  43. ESP_MSPI_IO_D5,
  44. ESP_MSPI_IO_D6,
  45. ESP_MSPI_IO_D7,
  46. #endif // SOC_SPI_MEM_SUPPORT_OPI_MODE
  47. #if CONFIG_SPIRAM
  48. ESP_MSPI_IO_CS1 /* cs for spi ram */
  49. #endif
  50. } esp_mspi_io_t;
  51. /**
  52. * @brief To setup Flash chip
  53. */
  54. esp_err_t spi_flash_init_chip_state(void);
  55. /**
  56. * @brief Make MSPI work under 20Mhz, remove the timing tuning required delays.
  57. * @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
  58. */
  59. void spi_timing_enter_mspi_low_speed_mode(bool control_spi1);
  60. /**
  61. * @brief Make MSPI work under the frequency as users set, may add certain delays to MSPI RX direction to meet timing requirements.
  62. * @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
  63. */
  64. void spi_timing_enter_mspi_high_speed_mode(bool control_spi1);
  65. /**
  66. * @brief Switch MSPI into low speed mode / high speed mode.
  67. * @note This API is cache safe, it will freeze both D$ and I$ and restore them after MSPI is switched
  68. * @note For some of the MSPI high frequency settings (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
  69. * Certain delays will be added to the MSPI RX direction. When CPU clock switches from PLL to XTAL, should call
  70. * this API first to enter MSPI low speed mode to remove the delays, and vice versa.
  71. */
  72. void spi_timing_change_speed_mode_cache_safe(bool switch_down);
  73. /**
  74. * @brief Tune MSPI flash timing to make it work under high frequency
  75. */
  76. void spi_timing_flash_tuning(void);
  77. /**
  78. * @brief Tune MSPI psram timing to make it work under high frequency
  79. */
  80. void spi_timing_psram_tuning(void);
  81. /**
  82. * @brief To initislize the MSPI pins
  83. */
  84. void esp_mspi_pin_init(void);
  85. /**
  86. * @brief Get the number of the GPIO corresponding to the given MSPI io
  87. *
  88. * @param[in] io MSPI io
  89. *
  90. * @return MSPI IO number
  91. */
  92. uint8_t esp_mspi_get_io(esp_mspi_io_t io);
  93. /**
  94. * @brief Set SPI1 registers to make ROM functions work
  95. * @note This function is used for setting SPI1 registers to the state that ROM SPI functions work
  96. */
  97. void spi_flash_set_rom_required_regs(void);
  98. /**
  99. * @brief Initialize main flash
  100. * @param chip Pointer to main SPI flash(SPI1 CS0) chip to use..
  101. */
  102. esp_err_t esp_flash_init_main(esp_flash_t *chip);
  103. /**
  104. * @brief Should be only used by SPI1 Flash driver to know the necessary timing registers
  105. * @param out_timing_config Pointer to timing_tuning parameters.
  106. */
  107. void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config);
  108. /**
  109. * @brief Get the knowledge if the MSPI timing is tuned or not
  110. */
  111. bool spi_timing_is_tuned(void);
  112. /**
  113. * @brief Set Flash chip specifically required MSPI register settings here
  114. */
  115. void spi_flash_set_vendor_required_regs(void);
  116. /**
  117. * @brief Judge whether need to reset flash when brownout.
  118. * Set` flash_brownout_needs_reset` inside the function if really need reset.
  119. */
  120. void spi_flash_needs_reset_check(void);
  121. /**
  122. * @brief Set flag to reset flash. set when erase chip or program chip
  123. *
  124. * @param bool status. True if flash is eraing. False if flash is not erasing.
  125. *
  126. * @return None.
  127. */
  128. void spi_flash_set_erasing_flag(bool status);
  129. /**
  130. * @brief Judge whether need to reset flash when brownout.
  131. *
  132. * @return true if need reset, otherwise false.
  133. */
  134. bool spi_flash_brownout_need_reset(void);
  135. /**
  136. * @brief Enable SPI flash high performance mode.
  137. *
  138. * @return ESP_OK if success.
  139. */
  140. esp_err_t spi_flash_enable_high_performance_mode(void);
  141. /**
  142. * @brief Get the flash dummy through this function
  143. * This can be used when one flash has several dummy configurations to enable the high performance mode.
  144. * @note Don't forget to subtract one when assign to the register of mspi e.g. if the value you get is 4, (4-1=3) should be assigned to the register.
  145. *
  146. * @return Pointer to spi_flash_hpm_dummy_conf_t.
  147. */
  148. const spi_flash_hpm_dummy_conf_t *spi_flash_hpm_get_dummy(void);
  149. /**
  150. * @brief Used to judge whether flash works under HPM mode with dummy adjustment.
  151. *
  152. * @return true Yes, and work under HPM with adjusting dummy. Otherwise, false.
  153. */
  154. bool spi_flash_hpm_dummy_adjust(void);
  155. typedef enum {
  156. FLASH_WRAP_MODE_8B = 0,
  157. FLASH_WRAP_MODE_16B = 2,
  158. FLASH_WRAP_MODE_32B = 4,
  159. FLASH_WRAP_MODE_64B = 6,
  160. FLASH_WRAP_MODE_DISABLE = 1
  161. } spi_flash_wrap_mode_t;
  162. /**
  163. * @brief set wrap mode of flash
  164. *
  165. * @param mode: wrap mode support disable, 16 32, 64 byte
  166. *
  167. * @return esp_err_t : ESP_OK for successful.
  168. *
  169. */
  170. esp_err_t spi_flash_wrap_set(spi_flash_wrap_mode_t mode);
  171. /**
  172. * @brief SPI flash critical section enter function.
  173. *
  174. */
  175. typedef void (*spi_flash_guard_start_func_t)(void);
  176. /**
  177. * @brief SPI flash critical section exit function.
  178. */
  179. typedef void (*spi_flash_guard_end_func_t)(void);
  180. /**
  181. * Structure holding SPI flash access critical sections management functions.
  182. *
  183. * Flash API uses two types of flash access management functions:
  184. * 1) Functions which prepare/restore flash cache and interrupts before calling
  185. * appropriate ROM functions (SPIWrite, SPIRead and SPIEraseBlock):
  186. * - 'start' function should disables flash cache and non-IRAM interrupts and
  187. * is invoked before the call to one of ROM function above.
  188. * - 'end' function should restore state of flash cache and non-IRAM interrupts and
  189. * is invoked after the call to one of ROM function above.
  190. * These two functions are not recursive.
  191. *
  192. * Different versions of the guarding functions should be used depending on the context of
  193. * execution (with or without functional OS). In normal conditions when flash API is called
  194. * from task the functions use OS primitives. When there is no OS at all or when
  195. * it is not guaranteed that OS is functional (accessing flash from exception handler) these
  196. * functions cannot use OS primitives or even does not need them (multithreaded access is not possible).
  197. *
  198. * @note Structure and corresponding guard functions should not reside in flash.
  199. * For example structure can be placed in DRAM and functions in IRAM sections.
  200. */
  201. typedef struct {
  202. spi_flash_guard_start_func_t start; /**< critical section start function. */
  203. spi_flash_guard_end_func_t end; /**< critical section end function. */
  204. } spi_flash_guard_funcs_t;
  205. /**
  206. * @brief Sets guard functions to access flash.
  207. *
  208. * @note Pointed structure and corresponding guard functions should not reside in flash.
  209. * For example structure can be placed in DRAM and functions in IRAM sections.
  210. *
  211. * @param funcs pointer to structure holding flash access guard functions.
  212. */
  213. void spi_flash_guard_set(const spi_flash_guard_funcs_t* funcs);
  214. /**
  215. * @brief Get the guard functions used for flash access
  216. *
  217. * @return The guard functions that were set via spi_flash_guard_set(). These functions
  218. * can be called if implementing custom low-level SPI flash operations.
  219. */
  220. const spi_flash_guard_funcs_t *spi_flash_guard_get(void);
  221. /**
  222. * @brief Default OS-aware flash access guard functions
  223. */
  224. extern const spi_flash_guard_funcs_t g_flash_guard_default_ops;
  225. /**
  226. * @brief Non-OS flash access guard functions
  227. *
  228. * @note This version of flash guard functions is to be used when no OS is present or from panic handler.
  229. * It does not use any OS primitives and IPC and implies that only calling CPU is active.
  230. */
  231. extern const spi_flash_guard_funcs_t g_flash_guard_no_os_ops;
  232. /**
  233. * @brief This function is used to re-initialize the flash mmap when using ROM flash
  234. * implementations.
  235. *
  236. * @note Only called in startup. User should not call this function.
  237. */
  238. void spi_flash_rom_impl_init(void);
  239. #ifdef __cplusplus
  240. }
  241. #endif