test_pwm.c 34 KB

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  1. /**
  2. * To test PWM, use the PCNT to calculateit to judge it work right or not.
  3. * e.g: judge the start and stop.
  4. * If started right, the PCNT will count the pulse.
  5. * If stopped right, the PCNT will count no pulse.
  6. *
  7. *
  8. * test environment UT_T1_MCPWM:
  9. * 1. connect GPIO4 to GPIO5
  10. * 2. connect GPIO13 to GPIO12
  11. * 3. connect GPIO27 to GPIO14
  12. *
  13. * all of case separate different timer to test in case that one case cost too much time
  14. */
  15. #include <stdio.h>
  16. #include "esp_system.h"
  17. #include "driver/mcpwm.h"
  18. #include "driver/pcnt.h"
  19. #include "unity.h"
  20. #include "test_utils.h"
  21. #include "freertos/FreeRTOS.h"
  22. #include "freertos/task.h"
  23. #include "soc/mcpwm_reg.h"
  24. #include "soc/mcpwm_struct.h"
  25. #include "freertos/queue.h"
  26. #include "esp_attr.h"
  27. #include "esp_log.h"
  28. #include "soc/rtc.h"
  29. #include "rom/ets_sys.h"
  30. #define GPIO_PWMA_OUT 4
  31. #define GPIO_PWMB_OUT 13
  32. #define GPIO_CAP_IN 27
  33. #define GPIO_SYNC_IN 27
  34. #define GPIO_FAULT_IN 27
  35. #define CAP_SIG_NUM 14
  36. #define SYN_SIG_NUM 14
  37. #define FAULT_SIG_NUM 14
  38. #define GPIO_PWMA_PCNT_INPUT 5
  39. #define GPIO_PWMB_PCNT_INPUT 12
  40. #define PCNT_CTRL_FLOATING_IO1 25
  41. #define PCNT_CTRL_FLOATING_IO2 26
  42. #define CAP0_INT_EN BIT(27)
  43. #define CAP1_INT_EN BIT(28)
  44. #define CAP2_INT_EN BIT(29)
  45. #define INITIAL_DUTY 10.0
  46. #define MCPWM_GPIO_INIT 0
  47. #define HIGHEST_LIMIT 10000
  48. #define LOWEST_LIMIT -10000
  49. static mcpwm_dev_t *MCPWM[2] = {&MCPWM0, &MCPWM1};
  50. static xQueueHandle cap_queue;
  51. static volatile int cap0_times = 0;
  52. static volatile int cap1_times = 0;
  53. static volatile int cap2_times = 0;
  54. typedef struct {
  55. uint32_t capture_signal;
  56. mcpwm_capture_signal_t sel_cap_signal;
  57. } capture;
  58. // universal settings of mcpwm
  59. static void mcpwm_basic_config(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer)
  60. {
  61. mcpwm_gpio_init(unit, mcpwm_a, GPIO_PWMA_OUT);
  62. mcpwm_gpio_init(unit, mcpwm_b, GPIO_PWMB_OUT);
  63. mcpwm_config_t pwm_config = {
  64. .frequency = 1000,
  65. .cmpr_a = 50.0, //duty cycle of PWMxA = 50.0%
  66. .cmpr_b = 50.0, //duty cycle of PWMxb = 50.0%
  67. .counter_mode = MCPWM_UP_COUNTER,
  68. .duty_mode = MCPWM_DUTY_MODE_0,
  69. };
  70. mcpwm_init(unit, timer, &pwm_config);
  71. }
  72. static void pcnt_init(int pulse_gpio_num, int ctrl_gpio_num)
  73. {
  74. pcnt_config_t pcnt_config = {
  75. .pulse_gpio_num = pulse_gpio_num,
  76. .ctrl_gpio_num = ctrl_gpio_num,
  77. .channel = PCNT_CHANNEL_0,
  78. .unit = PCNT_UNIT_0,
  79. .pos_mode = PCNT_COUNT_INC,
  80. .neg_mode = PCNT_COUNT_DIS,
  81. .lctrl_mode = PCNT_MODE_REVERSE,
  82. .hctrl_mode = PCNT_MODE_KEEP,
  83. .counter_h_lim = HIGHEST_LIMIT,
  84. .counter_l_lim = LOWEST_LIMIT,
  85. };
  86. TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
  87. }
  88. // initialize the PCNT
  89. // PCNT is used to count the MCPWM pulse
  90. static int16_t pcnt_count(int pulse_gpio_num, int ctrl_gpio_num, int last_time)
  91. {
  92. pcnt_config_t pcnt_config = {
  93. .pulse_gpio_num = pulse_gpio_num,
  94. .ctrl_gpio_num = ctrl_gpio_num,
  95. .channel = PCNT_CHANNEL_0,
  96. .unit = PCNT_UNIT_0,
  97. .pos_mode = PCNT_COUNT_INC,
  98. .neg_mode = PCNT_COUNT_DIS,
  99. .lctrl_mode = PCNT_MODE_REVERSE,
  100. .hctrl_mode = PCNT_MODE_KEEP,
  101. .counter_h_lim = HIGHEST_LIMIT,
  102. .counter_l_lim = LOWEST_LIMIT,
  103. };
  104. TEST_ESP_OK(pcnt_unit_config(&pcnt_config));
  105. int16_t test_counter;
  106. TEST_ESP_OK(pcnt_counter_pause(PCNT_UNIT_0));
  107. TEST_ESP_OK(pcnt_counter_clear(PCNT_UNIT_0));
  108. TEST_ESP_OK(pcnt_counter_resume(PCNT_UNIT_0));
  109. TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
  110. printf("COUNT: %d\n", test_counter);
  111. vTaskDelay(last_time / portTICK_RATE_MS);
  112. TEST_ESP_OK(pcnt_get_counter_value(PCNT_UNIT_0, &test_counter));
  113. printf("COUNT: %d\n", test_counter);
  114. return test_counter;
  115. }
  116. // judge the counting value right or not in specific error
  117. static void judge_count_value(int allow_error ,int expect_freq)
  118. {
  119. int16_t countA, countB;
  120. countA = pcnt_count(GPIO_PWMA_PCNT_INPUT, PCNT_CTRL_FLOATING_IO1, 1000);
  121. countB = pcnt_count(GPIO_PWMB_PCNT_INPUT, PCNT_CTRL_FLOATING_IO2, 1000);
  122. TEST_ASSERT_INT16_WITHIN(allow_error, countA, expect_freq);
  123. TEST_ASSERT_INT16_WITHIN(allow_error, countB, expect_freq);
  124. }
  125. // test the duty configuration
  126. static void timer_duty_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer)
  127. {
  128. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  129. vTaskDelay(1000 / portTICK_RATE_MS); // stay this status for a while so that can view its waveform by logic anylyzer
  130. TEST_ESP_OK(mcpwm_set_duty(unit, timer, MCPWM_OPR_A, (INITIAL_DUTY * 1)));
  131. TEST_ESP_OK(mcpwm_set_duty(unit, timer, MCPWM_OPR_B, (INITIAL_DUTY * 2)));
  132. TEST_ASSERT_EQUAL_INT(mcpwm_get_duty(unit, timer, MCPWM_OPR_A), INITIAL_DUTY * 1);
  133. TEST_ASSERT_EQUAL_INT(mcpwm_get_duty(unit, timer, MCPWM_OPR_B), INITIAL_DUTY * 2);
  134. vTaskDelay(1000 / portTICK_RATE_MS); // stay this status for a while so that can view its waveform by logic anylyzer
  135. mcpwm_set_duty(unit, timer, MCPWM_OPR_A, 55.5f);
  136. mcpwm_set_duty_type(unit, timer, MCPWM_OPR_A, MCPWM_DUTY_MODE_0);
  137. printf("mcpwm check = %f\n", mcpwm_get_duty(unit, timer, MCPWM_OPR_A));
  138. mcpwm_set_duty_in_us(unit, timer, MCPWM_OPR_B, 500);
  139. printf("mcpwm check = %f\n", mcpwm_get_duty(unit, timer, MCPWM_OPR_B));
  140. vTaskDelay(1000 / portTICK_RATE_MS); // stay this status for a while so that can view its waveform by logic anylyzer
  141. }
  142. // test the start and stop function work or not
  143. static void start_stop_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer)
  144. {
  145. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  146. judge_count_value(2, 1000);
  147. TEST_ESP_OK(mcpwm_stop(unit, timer));
  148. vTaskDelay(10 / portTICK_RATE_MS); // wait for a while, stop totally
  149. judge_count_value(0, 0);
  150. TEST_ESP_OK(mcpwm_start(unit, timer));
  151. vTaskDelay(10 / portTICK_RATE_MS); // wait for a while, start totally
  152. judge_count_value(2, 1000);
  153. }
  154. // test the deadtime
  155. static void deadtime_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer)
  156. {
  157. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  158. mcpwm_deadtime_type_t deadtime_type[8] = {MCPWM_BYPASS_RED, MCPWM_BYPASS_FED, MCPWM_ACTIVE_HIGH_MODE,
  159. MCPWM_ACTIVE_LOW_MODE, MCPWM_ACTIVE_HIGH_COMPLIMENT_MODE, MCPWM_ACTIVE_LOW_COMPLIMENT_MODE,
  160. MCPWM_ACTIVE_RED_FED_FROM_PWMXA, MCPWM_ACTIVE_RED_FED_FROM_PWMXB};
  161. for(int i=0; i<8; i++) {
  162. mcpwm_deadtime_enable(unit, timer, deadtime_type[i], 1000, 1000);
  163. vTaskDelay(1000 / portTICK_RATE_MS);
  164. mcpwm_deadtime_disable(unit, timer);
  165. }
  166. }
  167. /**
  168. * there are two kind of methods to set the carrier:
  169. * 1. by mcpwm_carrier_init
  170. * 2. by different single setting function
  171. */
  172. static void carrier_with_set_function_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer,
  173. mcpwm_carrier_out_ivt_t invert_or_not, uint8_t period, uint8_t duty, uint8_t os_width)
  174. {
  175. // no inversion and no one shot
  176. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  177. TEST_ESP_OK(mcpwm_carrier_enable(unit, timer));
  178. TEST_ESP_OK(mcpwm_carrier_set_period(unit, timer, period)); //carrier revolution
  179. TEST_ESP_OK(mcpwm_carrier_set_duty_cycle(unit, timer, duty)); // carrier duty
  180. judge_count_value(500, 50000/5.6);
  181. // with invert
  182. TEST_ESP_OK(mcpwm_carrier_output_invert(unit, timer, invert_or_not));
  183. vTaskDelay(2000 / portTICK_RATE_MS);
  184. }
  185. static void carrier_with_configuration_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer,
  186. mcpwm_carrier_os_t oneshot_or_not, mcpwm_carrier_out_ivt_t invert_or_not, uint8_t period, uint8_t duty, uint8_t os_width)
  187. {
  188. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  189. mcpwm_carrier_config_t chop_config;
  190. chop_config.carrier_period = period; //carrier period = (period + 1)*800ns
  191. chop_config.carrier_duty = duty; // carrier duty cycle, carrier_duty should be less then 8(increment every 12.5%). carrier duty = (3)*12.5%
  192. chop_config.carrier_os_mode = oneshot_or_not; //If one shot mode is enabled then set pulse width, if disabled no need to set pulse width
  193. chop_config.pulse_width_in_os = os_width; //pulse width of first pulse in one shot mode = (carrier period)*(pulse_width_in_os + 1), should be less then 16.first pulse width = (3 + 1)*carrier_period
  194. chop_config.carrier_ivt_mode = invert_or_not; //output signal inversion enable
  195. mcpwm_carrier_init(unit, timer, &chop_config);
  196. if(!oneshot_or_not) {
  197. // the pwm frequency is 1000
  198. // the carrrier duration in one second is 500ms
  199. // the carrier wave count is: 500ms/carrier_period = 500ms/(period + 1)*800ns
  200. // = 62500/(period + 1)
  201. judge_count_value(500, 62500/(period + 1));
  202. } else {
  203. judge_count_value(500, 40000/((period + 1))); // (500-500*0.125*3)/((period + 1)*800)
  204. }
  205. TEST_ESP_OK(mcpwm_carrier_disable(unit, timer));
  206. judge_count_value(2, 1000);
  207. }
  208. static void get_action_level(mcpwm_fault_input_level_t input_sig, mcpwm_action_on_pwmxa_t action_a, mcpwm_action_on_pwmxb_t action_b, int freq, int allow_err)
  209. {
  210. if(action_a == MCPWM_NO_CHANGE_IN_MCPWMXA) {
  211. TEST_ASSERT_INT16_WITHIN(allow_err, pcnt_count(GPIO_PWMA_PCNT_INPUT, PCNT_CTRL_FLOATING_IO1, 1000), freq);
  212. } else if(action_a == MCPWM_FORCE_MCPWMXA_LOW) {
  213. TEST_ASSERT(gpio_get_level(GPIO_PWMA_PCNT_INPUT) == 0);
  214. } else if(action_a == MCPWM_FORCE_MCPWMXA_HIGH) {
  215. TEST_ASSERT(gpio_get_level(GPIO_PWMA_PCNT_INPUT) == 1);
  216. }else {
  217. int level = gpio_get_level(GPIO_PWMA_PCNT_INPUT);
  218. vTaskDelay(100 / portTICK_RATE_MS);
  219. TEST_ASSERT(gpio_get_level(GPIO_PWMA_PCNT_INPUT) == level);
  220. }
  221. if(action_b == MCPWM_NO_CHANGE_IN_MCPWMXB) {
  222. TEST_ASSERT_INT16_WITHIN(allow_err, pcnt_count(GPIO_PWMB_PCNT_INPUT, PCNT_CTRL_FLOATING_IO1, 1000), freq);
  223. } else if(action_b == MCPWM_FORCE_MCPWMXB_LOW) {
  224. TEST_ASSERT(gpio_get_level(GPIO_PWMB_PCNT_INPUT) == 0);
  225. } else if(action_b == MCPWM_FORCE_MCPWMXB_HIGH) {
  226. TEST_ASSERT(gpio_get_level(GPIO_PWMB_PCNT_INPUT) == 1);
  227. }else {
  228. int level = gpio_get_level(GPIO_PWMB_PCNT_INPUT);
  229. vTaskDelay(100 / portTICK_RATE_MS);
  230. TEST_ASSERT(gpio_get_level(GPIO_PWMB_PCNT_INPUT) == level);
  231. }
  232. }
  233. // test the fault event
  234. static void cycle_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer,
  235. mcpwm_fault_signal_t fault_sig, mcpwm_fault_input_level_t input_sig, mcpwm_io_signals_t fault_io,
  236. mcpwm_action_on_pwmxa_t action_a, mcpwm_action_on_pwmxb_t action_b)
  237. {
  238. gpio_config_t gp;
  239. gp.intr_type = GPIO_INTR_DISABLE;
  240. gp.mode = GPIO_MODE_OUTPUT;
  241. gp.pin_bit_mask = (1 << FAULT_SIG_NUM);
  242. gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
  243. gpio_set_level(FAULT_SIG_NUM, !input_sig);
  244. pcnt_init(GPIO_PWMA_PCNT_INPUT, PCNT_CTRL_FLOATING_IO1);
  245. pcnt_init(GPIO_PWMB_PCNT_INPUT, PCNT_CTRL_FLOATING_IO2);
  246. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  247. mcpwm_gpio_init(unit, fault_io, GPIO_FAULT_IN);
  248. // cycle mode, it can be triggered more than once
  249. printf("cyc test:\n");
  250. gpio_set_level(FAULT_SIG_NUM, !input_sig);
  251. TEST_ESP_OK(mcpwm_fault_init(unit, input_sig, fault_sig));
  252. TEST_ESP_OK(mcpwm_fault_set_cyc_mode(unit, timer, fault_sig, action_a, action_b));
  253. vTaskDelay(1000 / portTICK_RATE_MS);
  254. gpio_set_level(FAULT_SIG_NUM, input_sig); // trigger the fault event
  255. vTaskDelay(1000 / portTICK_RATE_MS);
  256. get_action_level(input_sig, action_a, action_b, 1000, 5);
  257. TEST_ESP_OK(mcpwm_fault_deinit(unit, fault_sig));
  258. }
  259. static void oneshot_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer,
  260. mcpwm_fault_signal_t fault_sig, mcpwm_fault_input_level_t input_sig, mcpwm_io_signals_t fault_io,
  261. mcpwm_action_on_pwmxa_t action_a, mcpwm_action_on_pwmxb_t action_b)
  262. {
  263. gpio_config_t gp;
  264. gp.intr_type = GPIO_INTR_DISABLE;
  265. gp.mode = GPIO_MODE_OUTPUT;
  266. gp.pin_bit_mask = (1 << FAULT_SIG_NUM);
  267. gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
  268. gpio_set_level(FAULT_SIG_NUM, !input_sig);
  269. pcnt_init(GPIO_PWMA_PCNT_INPUT, PCNT_CTRL_FLOATING_IO1);
  270. pcnt_init(GPIO_PWMB_PCNT_INPUT, PCNT_CTRL_FLOATING_IO2);
  271. mcpwm_basic_config(unit, mcpwm_a, mcpwm_b, timer);
  272. mcpwm_gpio_init(unit, fault_io, GPIO_FAULT_IN);
  273. // one shot mode, it just can be triggered once
  274. TEST_ESP_OK(mcpwm_fault_init(unit, input_sig, fault_sig));
  275. TEST_ESP_OK(mcpwm_fault_set_oneshot_mode(unit, timer, fault_sig, action_a, action_b));
  276. vTaskDelay(10/ portTICK_RATE_MS);
  277. // trigger it
  278. gpio_set_level(FAULT_SIG_NUM, input_sig);
  279. vTaskDelay(10/ portTICK_RATE_MS);
  280. get_action_level(input_sig, action_a, action_b, 1000, 5);
  281. TEST_ESP_OK(mcpwm_fault_deinit(unit, fault_sig));
  282. }
  283. // test the sync event
  284. static void sync_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_timer_t timer,
  285. mcpwm_sync_signal_t sync_sig, mcpwm_io_signals_t sync_io)
  286. {
  287. gpio_config_t gp;
  288. gp.intr_type = GPIO_INTR_DISABLE;
  289. gp.mode = GPIO_MODE_OUTPUT;
  290. gp.pin_bit_mask = (1 << SYN_SIG_NUM);
  291. gpio_config(&gp);
  292. gpio_set_level(SYN_SIG_NUM, 0);
  293. mcpwm_gpio_init(unit, mcpwm_a, GPIO_PWMA_OUT);
  294. mcpwm_gpio_init(unit, mcpwm_b, GPIO_PWMB_OUT);
  295. mcpwm_gpio_init(unit, sync_io, GPIO_SYNC_IN);
  296. mcpwm_config_t pwm_config = {
  297. .frequency = 1000,
  298. .cmpr_a = 50.0, //duty cycle of PWMxA = 50.0%
  299. .cmpr_b = 50.0, //duty cycle of PWMxb = 50.0%
  300. .counter_mode = MCPWM_UP_COUNTER,
  301. .duty_mode = MCPWM_DUTY_MODE_0,
  302. };
  303. mcpwm_init(unit, timer, &pwm_config);
  304. gpio_pulldown_en(GPIO_SYNC_IN);
  305. mcpwm_sync_enable(unit, timer, sync_sig, 200);
  306. gpio_set_level(SYN_SIG_NUM, 1);
  307. vTaskDelay(2000 / portTICK_RATE_MS);
  308. mcpwm_sync_disable(unit, timer);
  309. vTaskDelay(2000 / portTICK_RATE_MS);
  310. }
  311. /**
  312. * use interruption to test the capture event
  313. * there are two kinds of methods to trigger the capture event:
  314. * 1. high level trigger
  315. * 2. low level trigger
  316. */
  317. static volatile int flag = 0;
  318. // once capture event happens, will show it
  319. static void disp_captured_signal(void *arg)
  320. {
  321. uint32_t *current_cap_value = (uint32_t *)malloc(sizeof(uint32_t) * CAP_SIG_NUM);
  322. uint32_t *previous_cap_value = (uint32_t *)malloc(sizeof(uint32_t) * CAP_SIG_NUM);
  323. capture evt;
  324. for (int i=0; i<1000; i++) {
  325. xQueueReceive(cap_queue, &evt, portMAX_DELAY);
  326. if (evt.sel_cap_signal == MCPWM_SELECT_CAP0) {
  327. current_cap_value[0] = evt.capture_signal - previous_cap_value[0];
  328. previous_cap_value[0] = evt.capture_signal;
  329. current_cap_value[0] = (current_cap_value[0] / 10000) * (10000000000 / rtc_clk_apb_freq_get());
  330. printf("CAP0 : %d us\n", current_cap_value[0]);
  331. cap0_times++;
  332. }
  333. if (evt.sel_cap_signal == MCPWM_SELECT_CAP1) {
  334. current_cap_value[1] = evt.capture_signal - previous_cap_value[1];
  335. previous_cap_value[1] = evt.capture_signal;
  336. current_cap_value[1] = (current_cap_value[1] / 10000) * (10000000000 / rtc_clk_apb_freq_get());
  337. printf("CAP1 : %d us\n", current_cap_value[1]);
  338. cap1_times++;
  339. }
  340. if (evt.sel_cap_signal == MCPWM_SELECT_CAP2) {
  341. current_cap_value[2] = evt.capture_signal - previous_cap_value[2];
  342. previous_cap_value[2] = evt.capture_signal;
  343. current_cap_value[2] = (current_cap_value[2] / 10000) * (10000000000 / rtc_clk_apb_freq_get());
  344. printf("CAP2 : %d us\n", current_cap_value[2]);
  345. cap2_times++;
  346. }
  347. }
  348. free(current_cap_value);
  349. free(previous_cap_value);
  350. vTaskDelete(NULL);
  351. }
  352. // mcpwm event
  353. static void IRAM_ATTR isr_handler(void *arg)
  354. {
  355. mcpwm_unit_t unit = (mcpwm_unit_t)arg;
  356. uint32_t mcpwm_intr_status;
  357. capture evt;
  358. mcpwm_intr_status = MCPWM[unit]->int_st.val; //Read interrupt status
  359. if (mcpwm_intr_status & CAP0_INT_EN) { //Check for interrupt on rising edge on CAP0 signal
  360. evt.capture_signal = mcpwm_capture_signal_get_value(unit, MCPWM_SELECT_CAP0); //get capture signal counter value
  361. evt.sel_cap_signal = MCPWM_SELECT_CAP0;
  362. xQueueSendFromISR(cap_queue, &evt, NULL);
  363. }
  364. if (mcpwm_intr_status & CAP1_INT_EN) { //Check for interrupt on rising edge on CAP0 signal
  365. evt.capture_signal = mcpwm_capture_signal_get_value(unit, MCPWM_SELECT_CAP1); //get capture signal counter value
  366. evt.sel_cap_signal = MCPWM_SELECT_CAP1;
  367. xQueueSendFromISR(cap_queue, &evt, NULL);
  368. }
  369. if (mcpwm_intr_status & CAP2_INT_EN) { //Check for interrupt on rising edge on CAP0 signal
  370. evt.capture_signal = mcpwm_capture_signal_get_value(unit, MCPWM_SELECT_CAP2); //get capture signal counter value
  371. evt.sel_cap_signal = MCPWM_SELECT_CAP2;
  372. xQueueSendFromISR(cap_queue, &evt, NULL);
  373. }
  374. MCPWM[unit]->int_clr.val = mcpwm_intr_status;
  375. }
  376. // the produce the capture triggering signal to trigger the capture event
  377. static void gpio_test_signal(void *arg)
  378. {
  379. printf("intializing test signal...\n");
  380. gpio_config_t gp;
  381. gp.intr_type = GPIO_INTR_DISABLE;
  382. gp.mode = GPIO_MODE_OUTPUT;
  383. gp.pin_bit_mask = 1<<CAP_SIG_NUM;
  384. gpio_config(&gp);
  385. for (int i=0; i<1000; i++) {
  386. //here the period of test signal is 20ms
  387. gpio_set_level(CAP_SIG_NUM, 1); //Set high
  388. vTaskDelay(10); //delay of 10ms
  389. gpio_set_level(CAP_SIG_NUM, 0); //Set low
  390. vTaskDelay(10); //delay of 10ms
  391. }
  392. flag = 1;
  393. vTaskDelete(NULL);
  394. }
  395. // capture event test function
  396. static void capture_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_signals_t mcpwm_b, mcpwm_io_signals_t cap_io, mcpwm_timer_t timer,
  397. mcpwm_capture_signal_t cap_sig, mcpwm_capture_on_edge_t cap_edge)
  398. {
  399. // initialize the capture times
  400. cap0_times = 0;
  401. cap1_times = 0;
  402. cap2_times = 0;
  403. mcpwm_gpio_init(unit, cap_io, GPIO_CAP_IN);
  404. cap_queue = xQueueCreate(1, sizeof(capture));
  405. xTaskCreate(disp_captured_signal, "mcpwm_config", 4096, (void *)unit, 5, NULL);
  406. xTaskCreate(gpio_test_signal, "gpio_test_signal", 4096, NULL, 5, NULL);
  407. mcpwm_capture_enable(unit, cap_sig, cap_edge, 0);
  408. MCPWM[unit]->int_ena.val = CAP0_INT_EN | CAP1_INT_EN | CAP2_INT_EN; //Enable interrupt on CAP0, CAP1 and CAP2 signal
  409. mcpwm_isr_register(unit, isr_handler, (void *)unit, ESP_INTR_FLAG_IRAM, NULL);
  410. while(flag != 1) {
  411. vTaskDelay(10 / portTICK_RATE_MS);
  412. }
  413. if(cap_sig == MCPWM_SELECT_CAP0) {
  414. TEST_ASSERT(1000 == cap0_times);
  415. } else if(cap_sig == MCPWM_SELECT_CAP1) {
  416. TEST_ASSERT(1000 == cap1_times);
  417. }else {
  418. TEST_ASSERT(1000 == cap2_times);
  419. }
  420. flag = 0; // set flag to 0 that it can be used in other case
  421. mcpwm_capture_disable(unit, cap_sig);
  422. }
  423. /**
  424. * duty test:
  425. * 1. mcpwm_set_duty
  426. * 2. mcpwm_get_duty
  427. *
  428. * This case's phenomenon should be viewed by logic analyzer
  429. * so set it ignore
  430. */
  431. TEST_CASE("MCPWM timer0 duty test and each timer works or not test(logic analyzer)", "[mcpwm][ignore]")
  432. {
  433. timer_duty_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  434. timer_duty_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  435. }
  436. TEST_CASE("MCPWM timer1 duty test and each timer works or not test(logic analyzer)", "[mcpwm][ignore]")
  437. {
  438. timer_duty_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  439. timer_duty_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  440. }
  441. TEST_CASE("MCPWM timer2 duty test and each timer works or not test(logic analyzer)", "[mcpwm][ignore]")
  442. {
  443. timer_duty_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  444. timer_duty_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  445. }
  446. // the deadtime configuration test
  447. // use the logic analyzer to make sure it goes right
  448. TEST_CASE("MCPWM timer0 deadtime configuration(logic analyzer)", "[mcpwm][ignore]")
  449. {
  450. deadtime_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  451. deadtime_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  452. }
  453. TEST_CASE("MCPWM timer1 deadtime configuration(logic analyzer)", "[mcpwm][ignore]")
  454. {
  455. deadtime_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  456. deadtime_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  457. }
  458. TEST_CASE("MCPWM timer2 deadtime configuration(logic analyzer)", "[mcpwm][ignore]")
  459. {
  460. deadtime_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  461. deadtime_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  462. }
  463. TEST_CASE("MCPWM timer0 start and stop test", "[mcpwm][test_env=UT_T1_MCPWM]")
  464. {
  465. start_stop_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  466. start_stop_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0);
  467. }
  468. // mcpwm start and stop test
  469. TEST_CASE("MCPWM timer1 start and stop test", "[mcpwm][test_env=UT_T1_MCPWM]")
  470. {
  471. start_stop_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  472. start_stop_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1);
  473. }
  474. TEST_CASE("MCPWM timer2 start and stop test", "[mcpwm][test_env=UT_T1_MCPWM]")
  475. {
  476. start_stop_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  477. start_stop_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2);
  478. }
  479. TEST_CASE("MCPWM timer0 carrier test with set function", "[mcpwm][test_env=UT_T1_MCPWM]")
  480. {
  481. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  482. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  483. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  484. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  485. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  486. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  487. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  488. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  489. }
  490. TEST_CASE("MCPWM timer1 carrier test with set function", "[mcpwm][test_env=UT_T1_MCPWM]")
  491. {
  492. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  493. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  494. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  495. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  496. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  497. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  498. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  499. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  500. }
  501. TEST_CASE("MCPWM timer2 carrier test with set function", "[mcpwm][test_env=UT_T1_MCPWM]")
  502. {
  503. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  504. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  505. carrier_with_set_function_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  506. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  507. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  508. MCPWM_CARRIER_OUT_IVT_DIS, 6, 3, 3);
  509. carrier_with_set_function_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  510. MCPWM_CARRIER_OUT_IVT_EN, 6, 3, 3);
  511. }
  512. TEST_CASE("MCPWM timer0 carrier test with configuration function", "[mcpwm][test_env=UT_T1_MCPWM][timeout=120]")
  513. {
  514. mcpwm_carrier_os_t oneshot[2] = {MCPWM_ONESHOT_MODE_DIS, MCPWM_ONESHOT_MODE_EN};
  515. mcpwm_carrier_out_ivt_t invert[2] = {MCPWM_CARRIER_OUT_IVT_DIS, MCPWM_CARRIER_OUT_IVT_EN};
  516. for(int i=0; i<2; i++){
  517. for(int j=0; j<2; j++) {
  518. printf("i=%d, j=%d\n", i, j);
  519. carrier_with_configuration_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  520. oneshot[i], invert[j], 6, 3, 3);
  521. carrier_with_configuration_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  522. oneshot[i], invert[j], 6, 3, 3);
  523. }
  524. }
  525. }
  526. TEST_CASE("MCPWM timer1 carrier test with configuration function", "[mcpwm][test_env=UT_T1_MCPWM][timeout=120]")
  527. {
  528. mcpwm_carrier_os_t oneshot[2] = {MCPWM_ONESHOT_MODE_DIS, MCPWM_ONESHOT_MODE_EN};
  529. mcpwm_carrier_out_ivt_t invert[2] = {MCPWM_CARRIER_OUT_IVT_DIS, MCPWM_CARRIER_OUT_IVT_EN};
  530. for(int i=0; i<2; i++){
  531. for(int j=0; j<2; j++) {
  532. carrier_with_configuration_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  533. oneshot[i], invert[j], 6, 3, 3);
  534. carrier_with_configuration_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  535. oneshot[i], invert[j], 6, 3, 3);
  536. }
  537. }
  538. }
  539. TEST_CASE("MCPWM timer2 carrier test with configuration function", "[mcpwm][test_env=UT_T1_MCPWM][timeout=120]")
  540. {
  541. mcpwm_carrier_os_t oneshot[2] = {MCPWM_ONESHOT_MODE_DIS, MCPWM_ONESHOT_MODE_EN};
  542. mcpwm_carrier_out_ivt_t invert[2] = {MCPWM_CARRIER_OUT_IVT_DIS, MCPWM_CARRIER_OUT_IVT_EN};
  543. for(int i=0; i<2; i++){
  544. for(int j=0; j<2; j++) {
  545. carrier_with_configuration_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  546. oneshot[i], invert[j], 6, 3, 3);
  547. carrier_with_configuration_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  548. oneshot[i], invert[j], 6, 3, 3);
  549. }
  550. }
  551. }
  552. /**
  553. * Fault event:
  554. * Just support high level triggering
  555. * There are two types fault event:
  556. * 1. one-shot: it just can be triggered once, its effect is forever and it will never be changed although the fault signal change
  557. * 2. cycle: it can be triggered more than once, it will changed just as the fault signal changes. If set it triggered by high level,
  558. * when the fault signal is high level, the event will be triggered. But the event will disappear as the fault signal disappears
  559. */
  560. TEST_CASE("MCPWM timer0 cycle fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=180]")
  561. {
  562. // API just supports the high level trigger now, so comment it
  563. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  564. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  565. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  566. for(int i=0; i<4; i++){
  567. for(int j=0; j<4; j++) {
  568. printf("i=%d, j=%d\n",i, j);
  569. cycle_fault_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  570. MCPWM_SELECT_F0, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_0,
  571. action_a[i], action_b[j]);
  572. cycle_fault_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  573. MCPWM_SELECT_F0, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_0,
  574. action_a[i], action_b[j]);
  575. }
  576. }
  577. }
  578. TEST_CASE("MCPWM timer1 cycle fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=180]")
  579. {
  580. // API just supports the high level trigger now, so comment it
  581. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  582. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  583. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  584. for(int i=0; i<4; i++){
  585. for(int j=0; j<4; j++) {
  586. cycle_fault_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  587. MCPWM_SELECT_F1, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_1,
  588. action_a[i], action_b[j]);
  589. cycle_fault_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  590. MCPWM_SELECT_F1, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_1,
  591. action_a[i], action_b[j]);
  592. }
  593. }
  594. }
  595. TEST_CASE("MCPWM timer2 cycle fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=180]")
  596. {
  597. // API just supports the high level trigger now, so comment it
  598. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  599. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  600. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  601. for(int i=0; i<4; i++){
  602. for(int j=0; j<4; j++) {
  603. cycle_fault_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  604. MCPWM_SELECT_F2, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_2,
  605. action_a[i], action_b[j]);
  606. cycle_fault_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  607. MCPWM_SELECT_F2, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_2,
  608. action_a[i], action_b[j]);
  609. }
  610. }
  611. }
  612. TEST_CASE("MCPWM timer0 one shot fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  613. {
  614. // API just supports the high level trigger now, so comment it
  615. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  616. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  617. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  618. for(int i=0; i<4; i++){
  619. for(int j=0; j<4; j++) {
  620. printf("i=%d, j=%d\n",i, j);
  621. oneshot_fault_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  622. MCPWM_SELECT_F0, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_0,
  623. action_a[i], action_b[j]);
  624. oneshot_fault_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0,
  625. MCPWM_SELECT_F0, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_0,
  626. action_a[i], action_b[j]);
  627. }
  628. }
  629. }
  630. TEST_CASE("MCPWM timer1 one shot fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  631. {
  632. // API just supports the high level trigger now, so comment it
  633. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  634. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  635. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  636. for(int i=0; i<4; i++){
  637. for(int j=0; j<4; j++) {
  638. oneshot_fault_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  639. MCPWM_SELECT_F1, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_1,
  640. action_a[i], action_b[j]);
  641. oneshot_fault_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1,
  642. MCPWM_SELECT_F1, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_1,
  643. action_a[i], action_b[j]);
  644. }
  645. }
  646. }
  647. TEST_CASE("MCPWM timer2 one shot fault test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  648. {
  649. // API just supports the high level trigger now, so comment it
  650. // mcpwm_fault_input_level_t fault_input[2] = {MCPWM_LOW_LEVEL_TGR, MCPWM_HIGH_LEVEL_TGR};
  651. mcpwm_action_on_pwmxa_t action_a[4] = {MCPWM_NO_CHANGE_IN_MCPWMXA, MCPWM_FORCE_MCPWMXA_LOW, MCPWM_FORCE_MCPWMXA_HIGH, MCPWM_TOG_MCPWMXA};
  652. mcpwm_action_on_pwmxb_t action_b[4] = {MCPWM_NO_CHANGE_IN_MCPWMXB, MCPWM_FORCE_MCPWMXB_LOW, MCPWM_FORCE_MCPWMXB_HIGH, MCPWM_TOG_MCPWMXB};
  653. for(int i=0; i<4; i++){
  654. for(int j=0; j<4; j++) {
  655. oneshot_fault_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  656. MCPWM_SELECT_F2, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_2,
  657. action_a[i], action_b[j]);
  658. oneshot_fault_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2,
  659. MCPWM_SELECT_F2, MCPWM_HIGH_LEVEL_TGR, MCPWM_FAULT_2,
  660. action_a[i], action_b[j]);
  661. }
  662. }
  663. }
  664. // need to view its phenomenon in logic analyzer
  665. // set it ignore
  666. TEST_CASE("MCPWM timer0 sync test(logic analyzer)", "[mcpwm][ignore]")
  667. {
  668. sync_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_TIMER_0, MCPWM_SELECT_SYNC0, MCPWM_SYNC_0);
  669. TEST_ESP_OK(mcpwm_stop(MCPWM_UNIT_0, MCPWM_TIMER_0)); // make sure can view the next sync signal clearly
  670. vTaskDelay(1000 / portTICK_RATE_MS);
  671. TEST_ESP_OK(mcpwm_start(MCPWM_UNIT_0, MCPWM_TIMER_0));
  672. sync_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_TIMER_0, MCPWM_SELECT_SYNC0, MCPWM_SYNC_0);
  673. }
  674. // need to view its phenomenon in logic analyzer
  675. // set it ignore
  676. TEST_CASE("MCPWM timer1 sync test(logic analyzer)", "[mcpwm][ignore]")
  677. {
  678. sync_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_TIMER_1, MCPWM_SELECT_SYNC1, MCPWM_SYNC_1);
  679. TEST_ESP_OK(mcpwm_stop(MCPWM_UNIT_0, MCPWM_TIMER_1)); // make sure can view the next sync signal clearly
  680. vTaskDelay(1000 / portTICK_RATE_MS);
  681. TEST_ESP_OK(mcpwm_start(MCPWM_UNIT_0, MCPWM_TIMER_1));
  682. sync_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_TIMER_1, MCPWM_SELECT_SYNC1, MCPWM_SYNC_1);
  683. }
  684. // need to view its phenomenon in logic analyzer
  685. // set it ignore
  686. TEST_CASE("MCPWM timer2 sync test(logic analyzer)", "[mcpwm][ignore]")
  687. {
  688. sync_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_TIMER_2, MCPWM_SELECT_SYNC2, MCPWM_SYNC_2);
  689. TEST_ESP_OK(mcpwm_stop(MCPWM_UNIT_0, MCPWM_TIMER_2)); // make sure can view the next sync signal clearly
  690. vTaskDelay(1000 / portTICK_RATE_MS);
  691. TEST_ESP_OK(mcpwm_start(MCPWM_UNIT_0, MCPWM_TIMER_2));
  692. sync_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_TIMER_2, MCPWM_SELECT_SYNC2, MCPWM_SYNC_2);
  693. }
  694. TEST_CASE("MCPWM unit0, timer0 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  695. {
  696. capture_test(MCPWM_UNIT_0, MCPWM0A, MCPWM0B, MCPWM_CAP_0, MCPWM_TIMER_0, MCPWM_SELECT_CAP0, MCPWM_POS_EDGE);
  697. }
  698. TEST_CASE("MCPWM uni0, timer1 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  699. {
  700. capture_test(MCPWM_UNIT_0, MCPWM1A, MCPWM1B, MCPWM_CAP_1, MCPWM_TIMER_1, MCPWM_SELECT_CAP1, MCPWM_POS_EDGE);
  701. }
  702. TEST_CASE("MCPWM unit0, timer2 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  703. {
  704. capture_test(MCPWM_UNIT_0, MCPWM2A, MCPWM2B, MCPWM_CAP_2, MCPWM_TIMER_2, MCPWM_SELECT_CAP2, MCPWM_POS_EDGE);
  705. }
  706. TEST_CASE("MCPWM unit1, timer0 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  707. {
  708. capture_test(MCPWM_UNIT_1, MCPWM0A, MCPWM0B, MCPWM_CAP_0, MCPWM_TIMER_0, MCPWM_SELECT_CAP0, MCPWM_NEG_EDGE);
  709. }
  710. TEST_CASE("MCPWM unit1, timer1 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  711. {
  712. capture_test(MCPWM_UNIT_1, MCPWM1A, MCPWM1B, MCPWM_CAP_1, MCPWM_TIMER_1, MCPWM_SELECT_CAP1, MCPWM_POS_EDGE);
  713. }
  714. TEST_CASE("MCPWM unit1, timer2 capture test", "[mcpwm][test_env=UT_T1_MCPWM][timeout=60]")
  715. {
  716. capture_test(MCPWM_UNIT_1, MCPWM2A, MCPWM2B, MCPWM_CAP_2, MCPWM_TIMER_2, MCPWM_SELECT_CAP2, MCPWM_POS_EDGE);
  717. }