test_spi_param.c 35 KB

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  1. #include "test/test_common_spi.h"
  2. #include "driver/spi_master.h"
  3. #include "driver/spi_slave.h"
  4. #include "esp_log.h"
  5. #include "soc/spi_periph.h"
  6. #include "test/test_common_spi.h"
  7. /********************************************************************************
  8. * Test By Internal Connections
  9. ********************************************************************************/
  10. static void local_test_init(void** context);
  11. static void local_test_deinit(void* context);
  12. static void local_test_loop(const void *test_param, void* context);
  13. static const ptest_func_t local_test_func = {
  14. .pre_test = local_test_init,
  15. .post_test = local_test_deinit,
  16. .loop = local_test_loop,
  17. .def_param = spitest_def_param,
  18. };
  19. #define TEST_SPI_LOCAL(name, param_set) \
  20. PARAM_GROUP_DECLARE(name, param_set) \
  21. TEST_LOCAL(name, param_set, "[spi][timeout=120]", &local_test_func)
  22. static void local_test_init(void** arg)
  23. {
  24. TEST_ASSERT(*arg==NULL);
  25. *arg = malloc(sizeof(spitest_context_t));
  26. spitest_context_t* context = (spitest_context_t*)*arg;
  27. TEST_ASSERT(context!=NULL);
  28. context->slave_context = (spi_slave_task_context_t){};
  29. esp_err_t err = init_slave_context( &context->slave_context);
  30. TEST_ASSERT(err == ESP_OK);
  31. xTaskCreate(spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
  32. }
  33. static void local_test_deinit(void* arg)
  34. {
  35. spitest_context_t* context = arg;
  36. vTaskDelete(context->handle_slave);
  37. context->handle_slave = 0;
  38. deinit_slave_context(&context->slave_context);
  39. }
  40. static void local_test_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
  41. {
  42. //master config
  43. spi_bus_config_t buscfg = SPI_BUS_TEST_DEFAULT_CONFIG();
  44. spi_device_interface_config_t devcfg = SPI_DEVICE_TEST_DEFAULT_CONFIG();
  45. spi_slave_interface_config_t slvcfg = SPI_SLAVE_TEST_DEFAULT_CONFIG();
  46. //pin config & initialize
  47. //we can't have two sets of iomux pins on the same pins
  48. assert(!pset->master_iomux || !pset->slave_iomux);
  49. if (pset->slave_iomux) {
  50. //only in this case, use VSPI iomux pins
  51. buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO;
  52. buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI;
  53. buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK;
  54. devcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
  55. slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
  56. } else {
  57. buscfg.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO;
  58. buscfg.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI;
  59. buscfg.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK;
  60. devcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
  61. slvcfg.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
  62. }
  63. //this does nothing, but avoid the driver from using iomux pins if required
  64. buscfg.quadhd_io_num = (!pset->master_iomux && !pset->slave_iomux ? VSPI_IOMUX_PIN_NUM_MISO : -1);
  65. devcfg.mode = pset->mode;
  66. const int cs_pretrans_max = 15;
  67. if (pset->dup == HALF_DUPLEX_MISO) {
  68. devcfg.cs_ena_pretrans = cs_pretrans_max;
  69. devcfg.flags |= SPI_DEVICE_HALFDUPLEX;
  70. } else if (pset->dup == HALF_DUPLEX_MOSI) {
  71. devcfg.cs_ena_pretrans = cs_pretrans_max;
  72. devcfg.flags |= SPI_DEVICE_NO_DUMMY;
  73. } else {
  74. devcfg.cs_ena_pretrans = cs_pretrans_max;
  75. }
  76. const int cs_posttrans_max = 15;
  77. devcfg.cs_ena_posttrans = cs_posttrans_max;
  78. devcfg.input_delay_ns = pset->slave_tv_ns;
  79. devcfg.clock_speed_hz = freq;
  80. if (pset->master_limit != 0 && freq > pset->master_limit) devcfg.flags |= SPI_DEVICE_NO_DUMMY;
  81. //slave config
  82. slvcfg.mode = pset->mode;
  83. slave_pull_up(&buscfg, slvcfg.spics_io_num);
  84. TEST_ESP_OK(spi_bus_initialize(HSPI_HOST, &buscfg, pset->master_dma_chan));
  85. TEST_ESP_OK(spi_bus_add_device(HSPI_HOST, &devcfg, spi));
  86. //slave automatically use iomux pins if pins are on VSPI_* pins
  87. buscfg.quadhd_io_num = -1;
  88. TEST_ESP_OK(spi_slave_initialize(VSPI_HOST, &buscfg, &slvcfg, pset->slave_dma_chan));
  89. //initialize master and slave on the same pins break some of the output configs, fix them
  90. if (pset->master_iomux) {
  91. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_SPI, HSPID_OUT_IDX);
  92. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX);
  93. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_SPI, HSPICS0_OUT_IDX);
  94. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_SPI, HSPICLK_OUT_IDX);
  95. } else if (pset->slave_iomux) {
  96. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX);
  97. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_SPI, VSPIQ_OUT_IDX);
  98. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX);
  99. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX);
  100. } else {
  101. spitest_gpio_output_sel(buscfg.mosi_io_num, FUNC_GPIO, HSPID_OUT_IDX);
  102. spitest_gpio_output_sel(buscfg.miso_io_num, FUNC_GPIO, VSPIQ_OUT_IDX);
  103. spitest_gpio_output_sel(devcfg.spics_io_num, FUNC_GPIO, HSPICS0_OUT_IDX);
  104. spitest_gpio_output_sel(buscfg.sclk_io_num, FUNC_GPIO, HSPICLK_OUT_IDX);
  105. }
  106. //prepare slave tx data
  107. for (int k = 0; k < pset->test_size; k++)
  108. xQueueSend(context->slave_context.data_to_send, &context->slave_trans[k], portMAX_DELAY);
  109. //clear master receive buffer
  110. memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
  111. }
  112. static void local_test_loop(const void* arg1, void* arg2)
  113. {
  114. const spitest_param_set_t *pset = arg1;
  115. spitest_context_t *context = arg2;
  116. spi_device_handle_t spi;
  117. spitest_init_transactions(pset, context);
  118. const int *timing_speed_array = pset->freq_list;
  119. ESP_LOGI(MASTER_TAG, "****************** %s ***************", pset->pset_name);
  120. for (int i = 0; ; i++) {
  121. const int freq = timing_speed_array[i];
  122. if (freq==0) break;
  123. if (pset->freq_limit && freq > pset->freq_limit) break;
  124. ESP_LOGI(MASTER_TAG, "======> %dk", freq / 1000);
  125. local_test_start(&spi, freq, pset, context);
  126. for (int k = 0; k < pset->test_size; k++) {
  127. //wait for both master and slave end
  128. ESP_LOGI(MASTER_TAG, "=> test%d", k);
  129. //send master tx data
  130. vTaskDelay(9);
  131. spi_transaction_t *t = &context->master_trans[k];
  132. TEST_ESP_OK(spi_device_transmit(spi, t));
  133. int len = get_trans_len(pset->dup, t);
  134. spitest_master_print_data(t, len);
  135. size_t rcv_len;
  136. slave_rxdata_t *rcv_data = xRingbufferReceive(context->slave_context.data_received, &rcv_len, portMAX_DELAY);
  137. spitest_slave_print_data(rcv_data, true);
  138. //check result
  139. bool check_master_data = (pset->dup!=HALF_DUPLEX_MOSI &&
  140. (pset->master_limit==0 || freq <= pset->master_limit));
  141. bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
  142. const bool check_len = true;
  143. if (!check_master_data) ESP_LOGI(MASTER_TAG, "skip master data check");
  144. if (!check_slave_data) ESP_LOGI(SLAVE_TAG, "skip slave data check");
  145. TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
  146. //clean
  147. vRingbufferReturnItem(context->slave_context.data_received, rcv_data);
  148. }
  149. master_free_device_bus(spi);
  150. TEST_ASSERT(spi_slave_free(VSPI_HOST) == ESP_OK);
  151. }
  152. }
  153. /************ Timing Test ***********************************************/
  154. static spitest_param_set_t timing_pgroup[] = {
  155. { .pset_name = "FULL_DUP, MASTER IOMUX",
  156. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  157. .master_limit = SPI_MASTER_FREQ_13M,
  158. .dup = FULL_DUPLEX,
  159. .master_iomux = true,
  160. .slave_iomux = false,
  161. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  162. },
  163. { .pset_name = "FULL_DUP, SLAVE IOMUX",
  164. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  165. .master_limit = SPI_MASTER_FREQ_13M,
  166. .dup = FULL_DUPLEX,
  167. .master_iomux = false,
  168. .slave_iomux = true,
  169. .slave_tv_ns = TV_INT_CONNECT,
  170. },
  171. { .pset_name = "FULL_DUP, BOTH GPIO",
  172. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  173. .master_limit = SPI_MASTER_FREQ_10M,
  174. .dup = FULL_DUPLEX,
  175. .master_iomux = false,
  176. .slave_iomux = false,
  177. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  178. },
  179. { .pset_name = "MISO_DUP, MASTER IOMUX",
  180. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  181. .master_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  182. .dup = HALF_DUPLEX_MISO,
  183. .master_iomux = true,
  184. .slave_iomux = false,
  185. .slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
  186. //for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
  187. },
  188. { .pset_name = "MISO_DUP, SLAVE IOMUX",
  189. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  190. //.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  191. .dup = HALF_DUPLEX_MISO,
  192. .master_iomux = false,
  193. .slave_iomux = true,
  194. .slave_tv_ns = TV_INT_CONNECT+12.5,
  195. //for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
  196. },
  197. { .pset_name = "MISO_DUP, BOTH GPIO",
  198. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  199. //.freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  200. .dup = HALF_DUPLEX_MISO,
  201. .master_iomux = false,
  202. .slave_iomux = false,
  203. .slave_tv_ns = TV_INT_CONNECT_GPIO+12.5,
  204. //for freq lower than 20M, the delay is 60(62.5)ns, however, the delay becomes 75ns over 26M
  205. },
  206. { .pset_name = "MOSI_DUP, MASTER IOMUX",
  207. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  208. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  209. .dup = HALF_DUPLEX_MOSI,
  210. .master_iomux = true,
  211. .slave_iomux = false,
  212. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  213. },
  214. { .pset_name = "MOSI_DUP, SLAVE IOMUX",
  215. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  216. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  217. .dup = HALF_DUPLEX_MOSI,
  218. .master_iomux = false,
  219. .slave_iomux = true,
  220. .slave_tv_ns = TV_INT_CONNECT,
  221. },
  222. { .pset_name = "MOSI_DUP, BOTH GPIO",
  223. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  224. //.freq_limit = ESP_SPI_SLAVE_MAX_READ_FREQ, //ESP_SPI_SLAVE_MAX_FREQ_SYNC,
  225. .dup = HALF_DUPLEX_MOSI,
  226. .master_iomux = false,
  227. .slave_iomux = false,
  228. .slave_tv_ns = TV_INT_CONNECT_GPIO,
  229. },
  230. };
  231. TEST_SPI_LOCAL(TIMING, timing_pgroup)
  232. /************ Mode Test ***********************************************/
  233. #define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
  234. static int test_freq_mode_local[]={
  235. 1*1000*1000,
  236. SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
  237. SPI_MASTER_FREQ_13M,
  238. SPI_MASTER_FREQ_16M,
  239. SPI_MASTER_FREQ_20M,
  240. SPI_MASTER_FREQ_26M,
  241. SPI_MASTER_FREQ_40M,
  242. 0,
  243. };
  244. static spitest_param_set_t mode_pgroup[] = {
  245. { .pset_name = "Mode 0",
  246. .freq_list = test_freq_mode_local,
  247. .master_limit = SPI_MASTER_FREQ_13M,
  248. .dup = FULL_DUPLEX,
  249. .mode = 0,
  250. .master_iomux = false,
  251. .slave_iomux = true,
  252. .slave_tv_ns = TV_INT_CONNECT,
  253. },
  254. { .pset_name = "Mode 1",
  255. .freq_list = test_freq_mode_local,
  256. .freq_limit = SPI_MASTER_FREQ_26M,
  257. .master_limit = SPI_MASTER_FREQ_13M,
  258. .dup = FULL_DUPLEX,
  259. .mode = 1,
  260. .master_iomux = false,
  261. .slave_iomux = true,
  262. .slave_tv_ns = TV_INT_CONNECT,
  263. },
  264. { .pset_name = "Mode 2",
  265. .freq_list = test_freq_mode_local,
  266. .master_limit = SPI_MASTER_FREQ_13M,
  267. .dup = FULL_DUPLEX,
  268. .mode = 2,
  269. .master_iomux = false,
  270. .slave_iomux = true,
  271. .slave_tv_ns = TV_INT_CONNECT,
  272. },
  273. { .pset_name = "Mode 3",
  274. .freq_list = test_freq_mode_local,
  275. .freq_limit = SPI_MASTER_FREQ_26M,
  276. .master_limit = SPI_MASTER_FREQ_13M,
  277. .dup = FULL_DUPLEX,
  278. .mode = 3,
  279. .master_iomux = false,
  280. .slave_iomux = true,
  281. .slave_tv_ns = TV_INT_CONNECT,
  282. },
  283. { .pset_name = "Mode 0, DMA",
  284. .freq_list = test_freq_mode_local,
  285. .master_limit = SPI_MASTER_FREQ_13M,
  286. .dup = FULL_DUPLEX,
  287. .mode = 0,
  288. .slave_dma_chan = 2,
  289. .master_iomux = false,
  290. .slave_iomux = true,
  291. .slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
  292. .length_aligned = true,
  293. },
  294. { .pset_name = "Mode 1, DMA",
  295. .freq_list = test_freq_mode_local,
  296. .freq_limit = SPI_MASTER_FREQ_26M,
  297. .master_limit = SPI_MASTER_FREQ_13M,
  298. .dup = FULL_DUPLEX,
  299. .mode = 1,
  300. .slave_dma_chan = 2,
  301. .master_iomux = false,
  302. .slave_iomux = true,
  303. .slave_tv_ns = TV_INT_CONNECT,
  304. .length_aligned = true,
  305. },
  306. { .pset_name = "Mode 2, DMA",
  307. .freq_list = test_freq_mode_local,
  308. .master_limit = SPI_MASTER_FREQ_13M,
  309. .dup = FULL_DUPLEX,
  310. .mode = 2,
  311. .slave_dma_chan = 2,
  312. .master_iomux = false,
  313. .slave_iomux = true,
  314. .slave_tv_ns = TV_INT_CONNECT, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
  315. .length_aligned = true,
  316. },
  317. { .pset_name = "Mode 3, DMA",
  318. .freq_list = test_freq_mode_local,
  319. .freq_limit = SPI_MASTER_FREQ_26M,
  320. .master_limit = SPI_MASTER_FREQ_13M,
  321. .dup = FULL_DUPLEX,
  322. .mode = 3,
  323. .slave_dma_chan = 2,
  324. .master_iomux = false,
  325. .slave_iomux = true,
  326. .slave_tv_ns = TV_INT_CONNECT,
  327. .length_aligned = true,
  328. },
  329. // MISO ////////////////////////////////////
  330. { .pset_name = "MISO, Mode 0",
  331. .freq_list = test_freq_mode_local,
  332. .dup = HALF_DUPLEX_MISO,
  333. .mode = 0,
  334. .master_iomux = false,
  335. .slave_iomux = true,
  336. .slave_tv_ns = TV_INT_CONNECT,
  337. },
  338. { .pset_name = "MISO, Mode 1",
  339. .freq_list = test_freq_mode_local,
  340. .dup = HALF_DUPLEX_MISO,
  341. .mode = 1,
  342. .master_iomux = false,
  343. .slave_iomux = true,
  344. .slave_tv_ns = TV_INT_CONNECT,
  345. },
  346. { .pset_name = "MISO, Mode 2",
  347. .freq_list = test_freq_mode_local,
  348. .dup = HALF_DUPLEX_MISO,
  349. .mode = 2,
  350. .master_iomux = false,
  351. .slave_iomux = true,
  352. .slave_tv_ns = TV_INT_CONNECT,
  353. },
  354. { .pset_name = "MISO, Mode 3",
  355. .freq_list = test_freq_mode_local,
  356. .dup = HALF_DUPLEX_MISO,
  357. .mode = 3,
  358. .master_iomux = false,
  359. .slave_iomux = true,
  360. .slave_tv_ns = TV_INT_CONNECT,
  361. },
  362. { .pset_name = "MISO, Mode 0, DMA",
  363. .freq_list = test_freq_mode_local,
  364. .dup = HALF_DUPLEX_MISO,
  365. .mode = 0,
  366. .slave_dma_chan = 2,
  367. .master_iomux = false,
  368. .slave_iomux = true,
  369. .slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
  370. .length_aligned = true,
  371. },
  372. { .pset_name = "MISO, Mode 1, DMA",
  373. .freq_list = test_freq_mode_local,
  374. .dup = HALF_DUPLEX_MISO,
  375. .mode = 1,
  376. .slave_dma_chan = 2,
  377. .master_iomux = false,
  378. .slave_iomux = true,
  379. .slave_tv_ns = TV_INT_CONNECT,
  380. .length_aligned = true,
  381. },
  382. { .pset_name = "MISO, Mode 2, DMA",
  383. .freq_list = test_freq_mode_local,
  384. .dup = HALF_DUPLEX_MISO,
  385. .mode = 2,
  386. .slave_dma_chan = 2,
  387. .master_iomux = false,
  388. .slave_iomux = true,
  389. .slave_tv_ns = TV_INT_CONNECT+12.5, //at 16M, the MISO delay (-0.5T+(3+2)apb) equals to non-DMA mode delay (3apb).
  390. .length_aligned = true,
  391. },
  392. { .pset_name = "MISO, Mode 3, DMA",
  393. .freq_list = test_freq_mode_local,
  394. .dup = HALF_DUPLEX_MISO,
  395. .mode = 3,
  396. .slave_dma_chan = 2,
  397. .master_iomux = false,
  398. .slave_iomux = true,
  399. .slave_tv_ns = TV_INT_CONNECT,
  400. .length_aligned = true,
  401. },
  402. };
  403. TEST_SPI_LOCAL(MODE, mode_pgroup)
  404. /********************************************************************************
  405. * Test By Master & Slave (2 boards)
  406. *
  407. * Wiring:
  408. * | Master | Slave |
  409. * | ------ | ----- |
  410. * | 12 | 19 |
  411. * | 13 | 23 |
  412. * | 14 | 18 |
  413. * | 15 | 5 |
  414. * | GND | GND |
  415. *
  416. ********************************************************************************/
  417. static void test_master_init(void** context);
  418. static void test_master_deinit(void* context);
  419. static void test_master_loop(const void *test_cfg, void* context);
  420. static const ptest_func_t master_test_func = {
  421. .pre_test = test_master_init,
  422. .post_test = test_master_deinit,
  423. .loop = test_master_loop,
  424. .def_param = spitest_def_param,
  425. };
  426. static void test_slave_init(void** context);
  427. static void test_slave_deinit(void* context);
  428. static void test_slave_loop(const void *test_cfg, void* context);
  429. static const ptest_func_t slave_test_func = {
  430. .pre_test = test_slave_init,
  431. .post_test = test_slave_deinit,
  432. .loop = test_slave_loop,
  433. .def_param = spitest_def_param,
  434. };
  435. #define TEST_SPI_MASTER_SLAVE(name, param_group, extra_tag) \
  436. PARAM_GROUP_DECLARE(name, param_group) \
  437. TEST_MASTER_SLAVE(name, param_group, "[spi_ms][test_env=Example_SPI_Multi_device][timeout=120]"#extra_tag, &master_test_func, &slave_test_func)
  438. /************ Master Code ***********************************************/
  439. static void test_master_init(void** arg)
  440. {
  441. TEST_ASSERT(*arg==NULL);
  442. *arg = malloc(sizeof(spitest_context_t));
  443. spitest_context_t* context = *arg;
  444. TEST_ASSERT(context!=NULL);
  445. context->slave_context = (spi_slave_task_context_t){};
  446. esp_err_t err = init_slave_context(&context->slave_context);
  447. TEST_ASSERT(err == ESP_OK);
  448. }
  449. static void test_master_deinit(void* arg)
  450. {
  451. spitest_context_t* context = (spitest_context_t*)arg;
  452. deinit_slave_context(&context->slave_context);
  453. }
  454. static void test_master_start(spi_device_handle_t *spi, int freq, const spitest_param_set_t* pset, spitest_context_t* context)
  455. {
  456. //master config
  457. spi_bus_config_t buspset=SPI_BUS_TEST_DEFAULT_CONFIG();
  458. buspset.miso_io_num = HSPI_IOMUX_PIN_NUM_MISO;
  459. buspset.mosi_io_num = HSPI_IOMUX_PIN_NUM_MOSI;
  460. buspset.sclk_io_num = HSPI_IOMUX_PIN_NUM_CLK;
  461. //this does nothing, but avoid the driver from using native pins
  462. if (!pset->master_iomux) buspset.quadhd_io_num = VSPI_IOMUX_PIN_NUM_MISO;
  463. spi_device_interface_config_t devpset=SPI_DEVICE_TEST_DEFAULT_CONFIG();
  464. devpset.spics_io_num = HSPI_IOMUX_PIN_NUM_CS;
  465. devpset.mode = pset->mode;
  466. const int cs_pretrans_max = 15;
  467. if (pset->dup==HALF_DUPLEX_MISO) {
  468. devpset.cs_ena_pretrans = cs_pretrans_max;
  469. devpset.flags |= SPI_DEVICE_HALFDUPLEX;
  470. } else if (pset->dup == HALF_DUPLEX_MOSI) {
  471. devpset.cs_ena_pretrans = cs_pretrans_max;
  472. devpset.flags |= SPI_DEVICE_NO_DUMMY;
  473. } else {
  474. devpset.cs_ena_pretrans = cs_pretrans_max;//20;
  475. }
  476. const int cs_posttrans_max = 15;
  477. devpset.cs_ena_posttrans = cs_posttrans_max;
  478. devpset.input_delay_ns = pset->slave_tv_ns;
  479. devpset.clock_speed_hz = freq;
  480. if (pset->master_limit != 0 && freq > pset->master_limit) devpset.flags |= SPI_DEVICE_NO_DUMMY;
  481. TEST_ESP_OK(spi_bus_initialize(HSPI_HOST, &buspset, pset->master_dma_chan));
  482. TEST_ESP_OK(spi_bus_add_device(HSPI_HOST, &devpset, spi));
  483. //prepare data for the slave
  484. for (int i = 0; i < pset->test_size; i ++) {
  485. /* in the single board, the data is send to the slave task, then to the driver.
  486. * However, in this test we don't know the data received by the slave.
  487. * So we send to the return queue of the slave directly.
  488. */
  489. //xQueueSend( slave_context.data_to_send, &slave_txdata[i], portMAX_DELAY );
  490. uint8_t slave_buffer[320+8];
  491. int length;
  492. if (pset->dup!=HALF_DUPLEX_MISO) {
  493. length = context->master_trans[i].length;
  494. } else {
  495. length = context->master_trans[i].rxlength;
  496. }
  497. uint32_t* ptr = (uint32_t*)slave_buffer;
  498. ptr[0] = length;
  499. ptr[1] = (uint32_t)context->slave_trans[i].start;
  500. if (context->master_trans[i].tx_buffer!=NULL) {
  501. memcpy(ptr+2, context->master_trans[i].tx_buffer, (context->master_trans[i].length+7)/8);
  502. }
  503. //Send to return queue directly
  504. xRingbufferSend(context->slave_context.data_received, slave_buffer, 8+(length+7)/8, portMAX_DELAY);
  505. }
  506. memset(context->master_rxbuf, 0x66, sizeof(context->master_rxbuf));
  507. }
  508. static void test_master_loop(const void *arg1, void* arg2)
  509. {
  510. const spitest_param_set_t *test_cfg = (spitest_param_set_t*)arg1;
  511. spitest_context_t* context = (spitest_context_t*)arg2;
  512. spi_device_handle_t spi;
  513. spitest_init_transactions(test_cfg, context);
  514. const int *timing_speed_array = test_cfg->freq_list;
  515. ESP_LOGI(MASTER_TAG, "****************** %s ***************", test_cfg->pset_name);
  516. for (int i=0; ; i++ ) {
  517. const int freq = timing_speed_array[i];
  518. if (freq==0) break;
  519. if (test_cfg->freq_limit && freq > test_cfg->freq_limit) break;
  520. ESP_LOGI(MASTER_TAG, "==============> %dk", freq/1000);
  521. test_master_start(&spi, freq, test_cfg, context);
  522. unity_wait_for_signal("slave ready");
  523. for( int j= 0; j < test_cfg->test_size; j ++ ) {
  524. //wait for both master and slave end
  525. ESP_LOGI( MASTER_TAG, "=> test%d", j );
  526. //send master tx data
  527. vTaskDelay(20);
  528. spi_transaction_t *t = &context->master_trans[j];
  529. TEST_ESP_OK (spi_device_transmit(spi, t) );
  530. int len = get_trans_len(test_cfg->dup, t);
  531. spitest_master_print_data(t, len);
  532. size_t rcv_len;
  533. slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
  534. spitest_slave_print_data(rcv_data, false);
  535. //check result
  536. bool check_master_data = (test_cfg->dup != HALF_DUPLEX_MOSI &&
  537. (test_cfg->master_limit == 0 || freq <= test_cfg->master_limit));
  538. const bool check_slave_data = false;
  539. const bool check_len = false;
  540. if (!check_master_data) {
  541. ESP_LOGI(MASTER_TAG, "skip data check due to duplex mode or freq.");
  542. } else {
  543. TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data,
  544. check_len, check_slave_data));
  545. }
  546. //clean
  547. vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
  548. }
  549. master_free_device_bus(spi);
  550. }
  551. }
  552. /************ Slave Code ***********************************************/
  553. static void test_slave_init(void** arg)
  554. {
  555. TEST_ASSERT(*arg==NULL);
  556. *arg = malloc(sizeof(spitest_context_t));
  557. spitest_context_t* context = (spitest_context_t*)*arg;
  558. TEST_ASSERT(context!=NULL);
  559. context->slave_context = (spi_slave_task_context_t){};
  560. esp_err_t err = init_slave_context( &context->slave_context );
  561. TEST_ASSERT( err == ESP_OK );
  562. xTaskCreate( spitest_slave_task, "spi_slave", 4096, &context->slave_context, 0, &context->handle_slave);
  563. }
  564. static void test_slave_deinit(void* arg)
  565. {
  566. spitest_context_t* context = (spitest_context_t*)arg;
  567. vTaskDelete( context->handle_slave );
  568. context->handle_slave = 0;
  569. deinit_slave_context(&context->slave_context);
  570. }
  571. static void timing_slave_start(int speed, const spitest_param_set_t* pset, spitest_context_t *context)
  572. {
  573. //slave config
  574. spi_bus_config_t slv_buscfg=SPI_BUS_TEST_DEFAULT_CONFIG();
  575. slv_buscfg.miso_io_num = VSPI_IOMUX_PIN_NUM_MISO;
  576. slv_buscfg.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI;
  577. slv_buscfg.sclk_io_num = VSPI_IOMUX_PIN_NUM_CLK;
  578. //this does nothing, but avoid the driver from using native pins
  579. if (!pset->slave_iomux) slv_buscfg.quadhd_io_num = HSPI_IOMUX_PIN_NUM_CLK;
  580. spi_slave_interface_config_t slvcfg=SPI_SLAVE_TEST_DEFAULT_CONFIG();
  581. slvcfg.spics_io_num = VSPI_IOMUX_PIN_NUM_CS;
  582. slvcfg.mode = pset->mode;
  583. //Enable pull-ups on SPI lines so we don't detect rogue pulses when no master is connected.
  584. slave_pull_up(&slv_buscfg, slvcfg.spics_io_num);
  585. TEST_ESP_OK( spi_slave_initialize(VSPI_HOST, &slv_buscfg, &slvcfg, pset->slave_dma_chan) );
  586. //prepare data for the master
  587. for (int i = 0; i < pset->test_size; i++) {
  588. if (pset->dup==FULL_DUPLEX) {
  589. memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
  590. } else if (pset->dup==HALF_DUPLEX_MISO) {
  591. memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].rxlength+7)/8);
  592. }
  593. }
  594. }
  595. static void test_slave_loop(const void *arg1, void* arg2)
  596. {
  597. const spitest_param_set_t *pset = (spitest_param_set_t*)arg1;
  598. spitest_context_t* context = (spitest_context_t*)arg2;
  599. ESP_LOGI(SLAVE_TAG, "****************** %s ***************", pset->pset_name);
  600. spitest_init_transactions(pset, context);
  601. const int *timing_speed_array = pset->freq_list;
  602. for (int i=0; ; i++ ) {
  603. const int freq = timing_speed_array[i];
  604. if (freq==0) break;
  605. if (pset->freq_limit != 0 && freq > pset->freq_limit) break;
  606. ESP_LOGI(MASTER_TAG, "==============> %dk", timing_speed_array[i]/1000);
  607. //Initialize SPI slave interface
  608. timing_slave_start(freq, pset, context);
  609. //prepare slave tx data
  610. for (int i = 0; i < pset->test_size; i ++) {
  611. xQueueSend( context->slave_context.data_to_send, &context->slave_trans[i], portMAX_DELAY );
  612. //memcpy(context->master_trans[i].rx_buffer, context->slave_trans[i].start, (context->master_trans[i].length+7)/8);
  613. }
  614. vTaskDelay(50/portTICK_PERIOD_MS);
  615. unity_send_signal("slave ready");
  616. for( int i= 0; i < pset->test_size; i ++ ) {
  617. //wait for both master and slave end
  618. ESP_LOGI( MASTER_TAG, "===== test%d =====", i );
  619. //send master tx data
  620. vTaskDelay(20);
  621. spi_transaction_t *t = &context->master_trans[i];
  622. int len = get_trans_len(pset->dup, t);
  623. spitest_master_print_data(t, FULL_DUPLEX);
  624. size_t rcv_len;
  625. slave_rxdata_t *rcv_data = xRingbufferReceive( context->slave_context.data_received, &rcv_len, portMAX_DELAY );
  626. spitest_slave_print_data(rcv_data, true);
  627. //check result
  628. const bool check_master_data = false;
  629. bool check_slave_data = (pset->dup!=HALF_DUPLEX_MISO);
  630. const bool check_len = true;
  631. TEST_ESP_OK(spitest_check_data(len, t, rcv_data, check_master_data, check_len, check_slave_data));
  632. //clean
  633. vRingbufferReturnItem( context->slave_context.data_received, rcv_data );
  634. }
  635. TEST_ASSERT(spi_slave_free(VSPI_HOST) == ESP_OK);
  636. }
  637. }
  638. /************ Timing Test ***********************************************/
  639. static spitest_param_set_t timing_conf[] = {
  640. { .pset_name = "FULL_DUP, BOTH IOMUX",
  641. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  642. .master_limit = SPI_MASTER_FREQ_16M,
  643. .dup = FULL_DUPLEX,
  644. .master_iomux= true,
  645. .slave_iomux = true,
  646. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  647. },
  648. { .pset_name = "FULL_DUP, MASTER IOMUX",
  649. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  650. .master_limit = SPI_MASTER_FREQ_11M,
  651. .dup = FULL_DUPLEX,
  652. .master_iomux = true,
  653. .slave_iomux = false,
  654. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  655. },
  656. { .pset_name = "FULL_DUP, SLAVE IOMUX",
  657. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  658. .master_limit = SPI_MASTER_FREQ_11M,
  659. .dup = FULL_DUPLEX,
  660. .master_iomux = false,
  661. .slave_iomux = true,
  662. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  663. },
  664. { .pset_name = "FULL_DUP, BOTH GPIO",
  665. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  666. .master_limit = SPI_MASTER_FREQ_9M,
  667. .dup = FULL_DUPLEX,
  668. .master_iomux = false,
  669. .slave_iomux = false,
  670. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  671. },
  672. { .pset_name = "MOSI_DUP, BOTH IOMUX",
  673. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  674. .dup = HALF_DUPLEX_MOSI,
  675. .master_iomux= true,
  676. .slave_iomux = true,
  677. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  678. },
  679. { .pset_name = "MOSI_DUP, MASTER IOMUX",
  680. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  681. .dup = HALF_DUPLEX_MOSI,
  682. .master_iomux= true,
  683. .slave_iomux = false,
  684. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  685. },
  686. { .pset_name = "MOSI_DUP, SLAVE IOMUX",
  687. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  688. .dup = HALF_DUPLEX_MOSI,
  689. .master_iomux= false,
  690. .slave_iomux = true,
  691. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  692. },
  693. { .pset_name = "MOSI_DUP, BOTH GPIO",
  694. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  695. .dup = HALF_DUPLEX_MOSI,
  696. .master_iomux= false,
  697. .slave_iomux = false,
  698. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  699. },
  700. { .pset_name = "MISO_DUP, BOTH IOMUX",
  701. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  702. .dup = HALF_DUPLEX_MISO,
  703. .master_iomux = true,
  704. .slave_iomux = true,
  705. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  706. },
  707. { .pset_name = "MISO_DUP, MASTER IOMUX",
  708. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  709. .dup = HALF_DUPLEX_MISO,
  710. .master_iomux = true,
  711. .slave_iomux = false,
  712. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  713. },
  714. { .pset_name = "MISO_DUP, SLAVE IOMUX",
  715. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  716. .dup = HALF_DUPLEX_MISO,
  717. .master_iomux = false,
  718. .slave_iomux = true,
  719. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  720. },
  721. { .pset_name = "MISO_DUP, BOTH GPIO",
  722. .freq_limit = ESP_SPI_SLAVE_MAX_FREQ,
  723. .dup = HALF_DUPLEX_MISO,
  724. .master_iomux = false,
  725. .slave_iomux = false,
  726. .slave_tv_ns = TV_WITH_ESP_SLAVE_GPIO,
  727. },
  728. };
  729. TEST_SPI_MASTER_SLAVE(TIMING, timing_conf, "")
  730. /************ Mode Test ***********************************************/
  731. #define FREQ_LIMIT_MODE SPI_MASTER_FREQ_16M
  732. //Set to this input delay so that the master will read with delay until 7M
  733. #define DELAY_HCLK_UNTIL_7M 12.5*3
  734. static int test_freq_mode_ms[]={
  735. 100*1000,
  736. 6*1000*1000,
  737. 7*1000*1000,
  738. SPI_MASTER_FREQ_8M, //maximum freq MISO stable before next latch edge
  739. SPI_MASTER_FREQ_9M, //maximum freq MISO stable before next latch edge
  740. SPI_MASTER_FREQ_10M,
  741. SPI_MASTER_FREQ_11M,
  742. SPI_MASTER_FREQ_13M,
  743. SPI_MASTER_FREQ_16M,
  744. SPI_MASTER_FREQ_20M,
  745. 0,
  746. };
  747. static int test_freq_20M_only[]={
  748. SPI_MASTER_FREQ_20M,
  749. 0,
  750. };
  751. spitest_param_set_t mode_conf[] = {
  752. //non-DMA tests
  753. { .pset_name = "mode 0, no DMA",
  754. .freq_list = test_freq_mode_ms,
  755. .master_limit = FREQ_LIMIT_MODE,
  756. .dup = FULL_DUPLEX,
  757. .master_iomux= true,
  758. .slave_iomux = true,
  759. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  760. .mode = 0,
  761. },
  762. { .pset_name = "mode 1, no DMA",
  763. .freq_list = test_freq_mode_ms,
  764. .master_limit = FREQ_LIMIT_MODE,
  765. .dup = FULL_DUPLEX,
  766. .master_iomux= true,
  767. .slave_iomux = true,
  768. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  769. .mode = 1,
  770. },
  771. { .pset_name = "mode 2, no DMA",
  772. .freq_list = test_freq_mode_ms,
  773. .master_limit = FREQ_LIMIT_MODE,
  774. .dup = FULL_DUPLEX,
  775. .master_iomux= true,
  776. .slave_iomux = true,
  777. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  778. .mode = 2,
  779. },
  780. { .pset_name = "mode 3, no DMA",
  781. .freq_list = test_freq_mode_ms,
  782. .master_limit = FREQ_LIMIT_MODE,
  783. .dup = FULL_DUPLEX,
  784. .master_iomux= true,
  785. .slave_iomux = true,
  786. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  787. .mode = 3,
  788. },
  789. //the master can only read to 16MHz, use half-duplex mode to read at 20.
  790. { .pset_name = "mode 0, no DMA, 20M",
  791. .freq_list = test_freq_20M_only,
  792. .dup = HALF_DUPLEX_MISO,
  793. .master_iomux= true,
  794. .slave_iomux = true,
  795. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  796. .mode = 0,
  797. },
  798. { .pset_name = "mode 1, no DMA, 20M",
  799. .freq_list = test_freq_20M_only,
  800. .dup = HALF_DUPLEX_MISO,
  801. .master_iomux= true,
  802. .slave_iomux = true,
  803. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  804. .mode = 1,
  805. },
  806. { .pset_name = "mode 2, no DMA, 20M",
  807. .freq_list = test_freq_20M_only,
  808. .dup = HALF_DUPLEX_MISO,
  809. .master_iomux= true,
  810. .slave_iomux = true,
  811. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  812. .mode = 2,
  813. },
  814. { .pset_name = "mode 3, no DMA, 20M",
  815. .freq_list = test_freq_20M_only,
  816. .dup = HALF_DUPLEX_MISO,
  817. .master_iomux= true,
  818. .slave_iomux = true,
  819. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  820. .mode = 3,
  821. },
  822. //DMA tests
  823. { .pset_name = "mode 0, DMA",
  824. .freq_list = test_freq_mode_ms,
  825. .master_limit = FREQ_LIMIT_MODE,
  826. .dup = FULL_DUPLEX,
  827. .master_iomux= true,
  828. .slave_iomux = true,
  829. .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
  830. .mode = 0,
  831. .master_dma_chan = 1,
  832. .slave_dma_chan = 1,
  833. .length_aligned = true,
  834. },
  835. { .pset_name = "mode 1, DMA",
  836. .freq_list = test_freq_mode_ms,
  837. .master_limit = FREQ_LIMIT_MODE,
  838. .dup = FULL_DUPLEX,
  839. .master_iomux= true,
  840. .slave_iomux = true,
  841. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  842. .mode = 1,
  843. .master_dma_chan = 1,
  844. .slave_dma_chan = 1,
  845. .length_aligned = true,
  846. },
  847. { .pset_name = "mode 2, DMA",
  848. .freq_list = test_freq_mode_ms,
  849. .master_limit = FREQ_LIMIT_MODE,
  850. .dup = FULL_DUPLEX,
  851. .master_iomux= true,
  852. .slave_iomux = true,
  853. .slave_tv_ns = DELAY_HCLK_UNTIL_7M,
  854. .mode = 2,
  855. .master_dma_chan = 1,
  856. .slave_dma_chan = 1,
  857. .length_aligned = true,
  858. },
  859. { .pset_name = "mode 3, DMA",
  860. .freq_list = test_freq_mode_ms,
  861. .master_limit = FREQ_LIMIT_MODE,
  862. .dup = FULL_DUPLEX,
  863. .master_iomux= true,
  864. .slave_iomux = true,
  865. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  866. .mode = 3,
  867. .master_dma_chan = 1,
  868. .slave_dma_chan = 1,
  869. .length_aligned = true,
  870. },
  871. //the master can only read to 16MHz, use half-duplex mode to read at 20.
  872. { .pset_name = "mode 0, DMA, 20M",
  873. .freq_list = test_freq_20M_only,
  874. .dup = HALF_DUPLEX_MISO,
  875. .master_iomux= true,
  876. .slave_iomux = true,
  877. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  878. .mode = 0,
  879. .master_dma_chan = 1,
  880. .slave_dma_chan = 1,
  881. },
  882. { .pset_name = "mode 1, DMA, 20M",
  883. .freq_list = test_freq_20M_only,
  884. .dup = HALF_DUPLEX_MISO,
  885. .master_iomux= true,
  886. .slave_iomux = true,
  887. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  888. .mode = 1,
  889. .master_dma_chan = 1,
  890. .slave_dma_chan = 1,
  891. },
  892. { .pset_name = "mode 2, DMA, 20M",
  893. .freq_list = test_freq_20M_only,
  894. .dup = HALF_DUPLEX_MISO,
  895. .master_iomux= true,
  896. .slave_iomux = true,
  897. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  898. .mode = 2,
  899. .master_dma_chan = 1,
  900. .slave_dma_chan = 1,
  901. },
  902. { .pset_name = "mode 3, DMA, 20M",
  903. .freq_list = test_freq_20M_only,
  904. .dup = HALF_DUPLEX_MISO,
  905. .master_iomux= true,
  906. .slave_iomux = true,
  907. .slave_tv_ns = TV_WITH_ESP_SLAVE,
  908. .mode = 3,
  909. .master_dma_chan = 1,
  910. .slave_dma_chan = 1,
  911. },
  912. };
  913. TEST_SPI_MASTER_SLAVE(MODE, mode_conf, "[ignore]")