test_timer.c 28 KB

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  1. #include <stdio.h>
  2. #include "freertos/FreeRTOS.h"
  3. #include "freertos/task.h"
  4. #include "esp_system.h"
  5. #include "unity.h"
  6. #include "nvs_flash.h"
  7. #include "driver/timer.h"
  8. #define TIMER_DIVIDER 16
  9. #define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
  10. #define TIMER_DELTA 0.001
  11. static bool alarm_flag;
  12. // group0 interruption
  13. static void test_timer_group0_isr(void *para)
  14. {
  15. int timer_idx = (int) para;
  16. uint64_t timer_val;
  17. double time;
  18. uint64_t alarm_value;
  19. alarm_flag = true;
  20. if (TIMERG0.hw_timer[timer_idx].config.autoreload == 1) {
  21. if (timer_idx == 0) {
  22. TIMERG0.int_clr_timers.t0 = 1;
  23. } else {
  24. TIMERG0.int_clr_timers.t1 = 1;
  25. }
  26. ets_printf("This is TG0 timer[%d] reload-timer alarm!\n", timer_idx);
  27. timer_get_counter_value(TIMER_GROUP_0, timer_idx, &timer_val);
  28. timer_get_counter_time_sec(TIMER_GROUP_0, timer_idx, &time);
  29. ets_printf("time: %.8f S\n", time);
  30. } else {
  31. if (timer_idx == 0) {
  32. TIMERG0.int_clr_timers.t0 = 1;
  33. } else {
  34. TIMERG0.int_clr_timers.t1 = 1;
  35. }
  36. ets_printf("This is TG0 timer[%d] count-up-timer alarm!\n", timer_idx);
  37. timer_get_counter_value(TIMER_GROUP_0, timer_idx, &timer_val);
  38. timer_get_counter_time_sec(TIMER_GROUP_0, timer_idx, &time);
  39. timer_get_alarm_value(TIMER_GROUP_0, timer_idx, &alarm_value);
  40. ets_printf("time: %.8f S\n", time);
  41. double alarm_time = (double) alarm_value / TIMER_SCALE;
  42. ets_printf("alarm_time: %.8f S\n", alarm_time);
  43. }
  44. }
  45. // group1 interruption
  46. static void test_timer_group1_isr(void *para)
  47. {
  48. int timer_idx = (int) para;
  49. uint64_t timer_val;
  50. double time;
  51. uint64_t alarm_value;
  52. alarm_flag = true;
  53. if (TIMERG1.hw_timer[timer_idx].config.autoreload == 1) {
  54. if (timer_idx == 0) {
  55. TIMERG1.int_clr_timers.t0 = 1;
  56. } else {
  57. TIMERG1.int_clr_timers.t1 = 1;
  58. }
  59. ets_printf("This is TG1 timer[%d] reload-timer alarm!\n", timer_idx);
  60. timer_get_counter_value(TIMER_GROUP_1, timer_idx, &timer_val);
  61. timer_get_counter_time_sec(TIMER_GROUP_1, timer_idx, &time);
  62. ets_printf("time: %.8f S\n", time);
  63. } else {
  64. if (timer_idx == 0) {
  65. TIMERG1.int_clr_timers.t0 = 1;
  66. } else {
  67. TIMERG1.int_clr_timers.t1 = 1;
  68. }
  69. ets_printf("This is TG1 timer[%d] count-up-timer alarm!\n", timer_idx);
  70. timer_get_counter_value(TIMER_GROUP_1, timer_idx, &timer_val);
  71. timer_get_counter_time_sec(TIMER_GROUP_1, timer_idx, &time);
  72. timer_get_alarm_value(TIMER_GROUP_1, timer_idx, &alarm_value);
  73. ets_printf("time: %.8f S\n", time);
  74. double alarm_time = (double) alarm_value / TIMER_SCALE;
  75. ets_printf("alarm_time: %.8f S\n", alarm_time);
  76. }
  77. }
  78. // initialize exact timer group
  79. static void tg_timer_init(int timer_group, int timer_idx, double alarm_time)
  80. {
  81. timer_pause(timer_group, timer_idx);
  82. timer_set_counter_value(timer_group, timer_idx, 0x0);
  83. timer_set_alarm_value(timer_group, timer_idx, alarm_time * TIMER_SCALE);
  84. timer_enable_intr(timer_group, timer_idx);
  85. if (timer_group == 0) {
  86. timer_isr_register(timer_group, timer_idx, test_timer_group0_isr,
  87. (void *) timer_idx, ESP_INTR_FLAG_LOWMED, NULL);
  88. } else {
  89. timer_isr_register(timer_group, timer_idx, test_timer_group1_isr,
  90. (void *) timer_idx, ESP_INTR_FLAG_LOWMED, NULL);
  91. }
  92. timer_start(timer_group, timer_idx);
  93. }
  94. // initialize all timer
  95. static void all_timer_init(timer_config_t config, bool flag)
  96. {
  97. esp_err_t ret;
  98. ret = timer_init(TIMER_GROUP_0, TIMER_0, &config);
  99. if (flag) {
  100. TEST_ASSERT(ret == ESP_OK);
  101. } else {
  102. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  103. }
  104. ret = timer_init(TIMER_GROUP_0, TIMER_1, &config);
  105. if (flag) {
  106. TEST_ASSERT(ret == ESP_OK);
  107. } else {
  108. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  109. }
  110. ret = timer_init(TIMER_GROUP_1, TIMER_0, &config);
  111. if (flag) {
  112. TEST_ASSERT(ret == ESP_OK);
  113. } else {
  114. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  115. }
  116. ret = timer_init(TIMER_GROUP_1, TIMER_1, &config);
  117. if (flag) {
  118. TEST_ASSERT(ret == ESP_OK);
  119. } else {
  120. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  121. }
  122. }
  123. // start all of timer
  124. static void all_timer_start()
  125. {
  126. esp_err_t ret;
  127. ret = timer_start(TIMER_GROUP_0, TIMER_0);
  128. TEST_ASSERT(ret == ESP_OK);
  129. ret = timer_start(TIMER_GROUP_0, TIMER_1);
  130. TEST_ASSERT(ret == ESP_OK);
  131. ret = timer_start(TIMER_GROUP_1, TIMER_0);
  132. TEST_ASSERT(ret == ESP_OK);
  133. ret = timer_start(TIMER_GROUP_1, TIMER_1);
  134. TEST_ASSERT(ret == ESP_OK);
  135. }
  136. static void all_timer_set_counter_value(uint64_t set_timer_val)
  137. {
  138. esp_err_t ret;
  139. ret = timer_set_counter_value(TIMER_GROUP_0, TIMER_0, set_timer_val);
  140. TEST_ASSERT(ret == ESP_OK);
  141. ret = timer_set_counter_value(TIMER_GROUP_0, TIMER_1, set_timer_val);
  142. TEST_ASSERT(ret == ESP_OK);
  143. ret = timer_set_counter_value(TIMER_GROUP_1, TIMER_0, set_timer_val);
  144. TEST_ASSERT(ret == ESP_OK);
  145. ret = timer_set_counter_value(TIMER_GROUP_1, TIMER_1, set_timer_val);
  146. TEST_ASSERT(ret == ESP_OK);
  147. }
  148. static void all_timer_pause()
  149. {
  150. esp_err_t ret;
  151. ret = timer_pause(TIMER_GROUP_0, TIMER_0);
  152. TEST_ASSERT(ret == ESP_OK);
  153. ret = timer_pause(TIMER_GROUP_0, TIMER_1);
  154. TEST_ASSERT(ret == ESP_OK);
  155. ret = timer_pause(TIMER_GROUP_1, TIMER_0);
  156. TEST_ASSERT(ret == ESP_OK);
  157. ret = timer_pause(TIMER_GROUP_1, TIMER_1);
  158. TEST_ASSERT(ret == ESP_OK);
  159. }
  160. static void all_timer_get_counter_value(uint64_t set_timer_val, bool flag,
  161. uint64_t *counter_val)
  162. {
  163. esp_err_t ret;
  164. uint64_t time_val;
  165. ret = timer_get_counter_value(TIMER_GROUP_0, TIMER_0, &time_val);
  166. TEST_ASSERT(ret == ESP_OK);
  167. if (flag == true) {
  168. TEST_ASSERT(set_timer_val == time_val);
  169. } else {
  170. TEST_ASSERT(set_timer_val != time_val);
  171. if (counter_val != NULL) {
  172. counter_val[0] = time_val;
  173. }
  174. }
  175. ret = timer_get_counter_value(TIMER_GROUP_0, TIMER_1, &time_val);
  176. TEST_ASSERT(ret == ESP_OK);
  177. if (flag) {
  178. TEST_ASSERT(set_timer_val == time_val);
  179. } else {
  180. TEST_ASSERT(set_timer_val != time_val);
  181. if (counter_val != NULL) {
  182. counter_val[1] = time_val;
  183. }
  184. }
  185. ret = timer_get_counter_value(TIMER_GROUP_1, TIMER_0, &time_val);
  186. TEST_ASSERT(ret == ESP_OK);
  187. if (flag) {
  188. TEST_ASSERT(set_timer_val == time_val);
  189. } else {
  190. TEST_ASSERT(set_timer_val != time_val);
  191. if (counter_val != NULL) {
  192. counter_val[2] = time_val;
  193. }
  194. }
  195. ret = timer_get_counter_value(TIMER_GROUP_1, TIMER_1, &time_val);
  196. TEST_ASSERT(ret == ESP_OK);
  197. if (flag) {
  198. TEST_ASSERT(set_timer_val == time_val);
  199. } else {
  200. TEST_ASSERT(set_timer_val != time_val);
  201. if (counter_val != NULL) {
  202. counter_val[3] = time_val;
  203. }
  204. }
  205. }
  206. static void all_timer_get_counter_time_sec(bool flag, int delay_time)
  207. {
  208. double time;
  209. esp_err_t ret;
  210. ret = timer_get_counter_time_sec(TIMER_GROUP_0, TIMER_0, &time);
  211. TEST_ASSERT(ret == ESP_OK);
  212. if (!flag) {
  213. TEST_ASSERT_FLOAT_WITHIN(TIMER_DELTA, delay_time, time);
  214. }
  215. ret = timer_get_counter_time_sec(TIMER_GROUP_0, TIMER_1, &time);
  216. TEST_ASSERT(ret == ESP_OK);
  217. if (!flag) {
  218. TEST_ASSERT_FLOAT_WITHIN(TIMER_DELTA, delay_time, time);
  219. }
  220. ret = timer_get_counter_time_sec(TIMER_GROUP_1, TIMER_0, &time);
  221. TEST_ASSERT(ret == ESP_OK);
  222. if (!flag) {
  223. TEST_ASSERT_FLOAT_WITHIN(TIMER_DELTA, delay_time, time);
  224. }
  225. ret = timer_get_counter_time_sec(TIMER_GROUP_1, TIMER_1, &time);
  226. TEST_ASSERT(ret == ESP_OK);
  227. if (!flag) {
  228. TEST_ASSERT_FLOAT_WITHIN(TIMER_DELTA, delay_time, time);
  229. }
  230. }
  231. static void all_timer_set_counter_mode(timer_count_dir_t counter_dir)
  232. {
  233. esp_err_t ret;
  234. ret = timer_set_counter_mode(TIMER_GROUP_0, TIMER_0, counter_dir);
  235. TEST_ASSERT(ret == ESP_OK);
  236. ret = timer_set_counter_mode(TIMER_GROUP_0, TIMER_1, counter_dir);
  237. TEST_ASSERT(ret == ESP_OK);
  238. ret = timer_set_counter_mode(TIMER_GROUP_1, TIMER_0, counter_dir);
  239. TEST_ASSERT(ret == ESP_OK);
  240. ret = timer_set_counter_mode(TIMER_GROUP_1, TIMER_1, counter_dir);
  241. TEST_ASSERT(ret == ESP_OK);
  242. }
  243. static void all_timer_set_divider(uint32_t divider)
  244. {
  245. esp_err_t ret;
  246. ret = timer_set_divider(TIMER_GROUP_0, TIMER_0, divider);
  247. TEST_ASSERT(ret == ESP_OK);
  248. ret = timer_set_divider(TIMER_GROUP_0, TIMER_1, divider);
  249. TEST_ASSERT(ret == ESP_OK);
  250. ret = timer_set_divider(TIMER_GROUP_1, TIMER_0, divider);
  251. TEST_ASSERT(ret == ESP_OK);
  252. ret = timer_set_divider(TIMER_GROUP_1, TIMER_1, divider);
  253. TEST_ASSERT(ret == ESP_OK);
  254. }
  255. static void all_timer_set_alarm_value(double alarm_time)
  256. {
  257. esp_err_t ret;
  258. ret = timer_set_alarm_value(TIMER_GROUP_0, TIMER_0,
  259. alarm_time * TIMER_SCALE);
  260. TEST_ASSERT(ret == ESP_OK);
  261. ret = timer_set_alarm_value(TIMER_GROUP_0, TIMER_1,
  262. alarm_time * TIMER_SCALE);
  263. TEST_ASSERT(ret == ESP_OK);
  264. ret = timer_set_alarm_value(TIMER_GROUP_1, TIMER_0,
  265. alarm_time * TIMER_SCALE);
  266. TEST_ASSERT(ret == ESP_OK);
  267. ret = timer_set_alarm_value(TIMER_GROUP_1, TIMER_1,
  268. alarm_time * TIMER_SCALE);
  269. TEST_ASSERT(ret == ESP_OK);
  270. }
  271. TEST_CASE("Timer init", "[hw_timer]")
  272. {
  273. esp_err_t ret;
  274. // Test init 1:config para
  275. // empty para
  276. timer_config_t config0 = { };
  277. all_timer_init(config0, false);
  278. // only one para
  279. timer_config_t config1 = {
  280. .auto_reload = 1
  281. };
  282. all_timer_init(config1, false);
  283. // lack one para
  284. timer_config_t config2 = {
  285. .auto_reload = 1,
  286. .counter_dir = TIMER_COUNT_UP,
  287. .divider = TIMER_DIVIDER,
  288. .counter_en = 1,
  289. .intr_type = TIMER_INTR_LEVEL
  290. };
  291. all_timer_init(config2, true);
  292. config2.counter_en = 0;
  293. all_timer_init(config2, true);
  294. // error config para
  295. timer_config_t config3 = {
  296. .alarm_en = 3, //error para
  297. .auto_reload = 1,
  298. .counter_dir = TIMER_COUNT_UP,
  299. .divider = TIMER_DIVIDER,
  300. .counter_en = 1,
  301. .intr_type = TIMER_INTR_LEVEL
  302. };
  303. all_timer_init(config3, true);
  304. timer_config_t get_config;
  305. timer_get_config(TIMER_GROUP_1, TIMER_1, &get_config);
  306. printf("Error config alarm_en is %d\n", get_config.alarm_en);
  307. TEST_ASSERT(config3.alarm_en != get_config.alarm_en);
  308. // Test init 2: init
  309. uint64_t set_timer_val = 0x0;
  310. timer_config_t config = {
  311. .alarm_en = 0,
  312. .auto_reload = 1,
  313. .counter_dir = TIMER_COUNT_UP,
  314. .divider = TIMER_DIVIDER,
  315. .counter_en = 1,
  316. .intr_type = TIMER_INTR_LEVEL
  317. };
  318. // judge get config parameters
  319. timer_init(TIMER_GROUP_0, TIMER_0, &config);
  320. timer_get_config(TIMER_GROUP_0, TIMER_0, &get_config);
  321. TEST_ASSERT(config.alarm_en == get_config.alarm_en);
  322. TEST_ASSERT(config.auto_reload == get_config.auto_reload);
  323. TEST_ASSERT(config.counter_dir == get_config.counter_dir);
  324. TEST_ASSERT(config.counter_en == get_config.counter_en);
  325. TEST_ASSERT(config.intr_type == get_config.intr_type);
  326. TEST_ASSERT(config.divider == get_config.divider);
  327. all_timer_init(config, true);
  328. all_timer_pause();
  329. all_timer_set_counter_value(set_timer_val);
  330. all_timer_start();
  331. all_timer_get_counter_value(set_timer_val, false, NULL);
  332. // Test init 3: wrong para
  333. ret = timer_init(-1, TIMER_1, &config);
  334. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  335. ret = timer_init(TIMER_GROUP_1, 2, &config);
  336. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  337. ret = timer_init(TIMER_GROUP_1, -1, &config);
  338. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  339. ret = timer_init(2, TIMER_1, &config);
  340. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  341. }
  342. /**
  343. * read count case:
  344. * 1. start timer compare value
  345. * 2. pause timer compare value
  346. * 3. delay some time */
  347. TEST_CASE("Timer read counter value", "[hw_timer]")
  348. {
  349. timer_config_t config = {
  350. .alarm_en = 1,
  351. .auto_reload = 1,
  352. .counter_dir = TIMER_COUNT_UP,
  353. .divider = TIMER_DIVIDER,
  354. .counter_en = 1,
  355. .intr_type = TIMER_INTR_LEVEL
  356. };
  357. uint64_t set_timer_val = 0x0;
  358. all_timer_init(config, true);
  359. // Test read value 1: start timer get counter value
  360. all_timer_set_counter_value(set_timer_val);
  361. all_timer_start();
  362. all_timer_get_counter_value(set_timer_val, false, NULL);
  363. // Test read value 2: pause timer get counter value
  364. all_timer_pause();
  365. set_timer_val = 0x30405000ULL;
  366. all_timer_set_counter_value(set_timer_val);
  367. all_timer_get_counter_value(set_timer_val, true, NULL);
  368. // Test read value 3:delay 1s get counter value
  369. set_timer_val = 0x0;
  370. all_timer_set_counter_value(set_timer_val);
  371. all_timer_start();
  372. vTaskDelay(1000 / portTICK_PERIOD_MS);
  373. all_timer_get_counter_time_sec(true, 1);
  374. }
  375. /**
  376. * start timer case:
  377. * 1. normal start
  378. * 2. error start para
  379. * */
  380. TEST_CASE("Timer start", "[hw_timer]")
  381. {
  382. esp_err_t ret;
  383. timer_config_t config = {
  384. .alarm_en = 1,
  385. .auto_reload = 1,
  386. .counter_dir = TIMER_COUNT_UP,
  387. .divider = TIMER_DIVIDER,
  388. .counter_en = 1,
  389. .intr_type = TIMER_INTR_LEVEL
  390. };
  391. uint64_t set_timer_val = 0x0;
  392. all_timer_init(config, true);
  393. //Test start 1: normal start
  394. all_timer_start();
  395. all_timer_set_counter_value(set_timer_val);
  396. all_timer_get_counter_value(set_timer_val, false, NULL);
  397. //Test start 2:wrong para
  398. ret = timer_start(2, TIMER_1);
  399. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  400. ret = timer_start(-1, TIMER_1);
  401. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  402. ret = timer_start(TIMER_GROUP_1, 2);
  403. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  404. ret = timer_start(TIMER_GROUP_1, -1);
  405. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  406. }
  407. /**
  408. * pause timer case:
  409. * 1. normal pause, read value
  410. * 2. error pause error
  411. */
  412. TEST_CASE("Timer pause", "[hw_timer]")
  413. {
  414. esp_err_t ret;
  415. timer_config_t config = {
  416. .alarm_en = 1,
  417. .auto_reload = 1,
  418. .counter_dir = TIMER_COUNT_UP,
  419. .divider = TIMER_DIVIDER,
  420. .counter_en = 1,
  421. .intr_type = TIMER_INTR_LEVEL
  422. };
  423. uint64_t set_timer_val = 0x0;
  424. all_timer_init(config, true);
  425. //Test pause 1: right para
  426. all_timer_pause();
  427. all_timer_set_counter_value(set_timer_val);
  428. all_timer_get_counter_value(set_timer_val, true, NULL);
  429. //Test pause 2: wrong para
  430. ret = timer_pause(-1, TIMER_0);
  431. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  432. ret = timer_pause(TIMER_GROUP_0, -1);
  433. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  434. ret = timer_pause(2, TIMER_0);
  435. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  436. ret = timer_pause(TIMER_GROUP_1, 2);
  437. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  438. }
  439. // positive mode and negative mode
  440. TEST_CASE("Timer counter mode (up / down)", "[hw_timer]")
  441. {
  442. esp_err_t ret;
  443. timer_config_t config = {
  444. .alarm_en = 1,
  445. .auto_reload = 1,
  446. .counter_dir = TIMER_COUNT_UP,
  447. .divider = TIMER_DIVIDER,
  448. .counter_en = 1,
  449. .intr_type = TIMER_INTR_LEVEL
  450. };
  451. uint64_t set_timer_val = 0x0;
  452. all_timer_init(config, true);
  453. all_timer_pause();
  454. // Test counter mode 1: TIMER_COUNT_UP
  455. all_timer_set_counter_mode(TIMER_COUNT_UP);
  456. all_timer_set_counter_value(set_timer_val);
  457. all_timer_start();
  458. vTaskDelay(1000 / portTICK_PERIOD_MS);
  459. all_timer_get_counter_time_sec(true, 1);
  460. // Test counter mode 2: TIMER_COUNT_DOWN
  461. all_timer_pause();
  462. set_timer_val = 0x00E4E1C0ULL; // 3s clock counter value
  463. all_timer_set_counter_mode(TIMER_COUNT_DOWN);
  464. all_timer_set_counter_value(set_timer_val);
  465. all_timer_start();
  466. vTaskDelay(1000 / portTICK_PERIOD_MS);
  467. all_timer_get_counter_time_sec(true, 2);
  468. // Test counter mode 3 : wrong para
  469. ret = timer_set_counter_mode(TIMER_GROUP_0, TIMER_0, -1);
  470. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  471. ret = timer_set_counter_mode(TIMER_GROUP_0, TIMER_0, 2);
  472. TEST_ASSERT(ret == ESP_ERR_INVALID_ARG);
  473. }
  474. /**
  475. * divider case:
  476. * 1. different divider, read value
  477. * Note: divide 0 = divide max, divide 1 = divide 2
  478. * 2. error para
  479. *
  480. * the frequency(timer counts in one sec):
  481. * 80M/divider = 800*100000
  482. * max divider value is 65536, its frequency is 1220 (nearly about 1KHz)
  483. */
  484. TEST_CASE("Timer divider", "[hw_timer]")
  485. {
  486. int i;
  487. timer_config_t config = {
  488. .alarm_en = 1,
  489. .auto_reload = 1,
  490. .counter_dir = TIMER_COUNT_UP,
  491. .divider = TIMER_DIVIDER,
  492. .counter_en = 1,
  493. .intr_type = TIMER_INTR_LEVEL
  494. };
  495. uint64_t set_timer_val = 0;
  496. uint64_t time_val[4];
  497. uint64_t comp_time_val[4];
  498. all_timer_init(config, true);
  499. all_timer_pause();
  500. all_timer_set_counter_value(set_timer_val);
  501. all_timer_start();
  502. vTaskDelay(1000 / portTICK_PERIOD_MS);
  503. all_timer_get_counter_value(set_timer_val, false, time_val);
  504. // compare divider 16 and 8, value should be double
  505. all_timer_pause();
  506. all_timer_set_divider(8);
  507. all_timer_set_counter_value(set_timer_val);
  508. all_timer_start();
  509. vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
  510. all_timer_get_counter_value(set_timer_val, false, comp_time_val);
  511. for (i = 0; i < 4; i++) {
  512. TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
  513. TEST_ASSERT_INT_WITHIN(10000, 10000000, comp_time_val[i]);
  514. }
  515. // divider is 256, value should be 2^4
  516. all_timer_pause();
  517. all_timer_set_divider(256);
  518. all_timer_set_counter_value(set_timer_val);
  519. all_timer_start();
  520. vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
  521. all_timer_get_counter_value(set_timer_val, false, comp_time_val);
  522. for (i = 0; i < 4; i++) {
  523. TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
  524. TEST_ASSERT_INT_WITHIN(3126, 312500, comp_time_val[i]);
  525. }
  526. // extrem value test
  527. all_timer_pause();
  528. all_timer_set_divider(2);
  529. all_timer_set_counter_value(set_timer_val);
  530. all_timer_start();
  531. vTaskDelay(1000 / portTICK_PERIOD_MS);
  532. all_timer_get_counter_value(set_timer_val, false, comp_time_val);
  533. for (i = 0; i < 4; i++) {
  534. TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
  535. TEST_ASSERT_INT_WITHIN(40000 , 40000000, comp_time_val[i]);
  536. }
  537. all_timer_pause();
  538. all_timer_set_divider(65536);
  539. all_timer_set_counter_value(set_timer_val);
  540. all_timer_start();
  541. vTaskDelay(1000 / portTICK_PERIOD_MS); //delay the same time
  542. all_timer_get_counter_value(set_timer_val, false, comp_time_val);
  543. for (i = 0; i < 4; i++) {
  544. TEST_ASSERT_INT_WITHIN(5000, 5000000, time_val[i]);
  545. TEST_ASSERT_INT_WITHIN(2 , 1220, comp_time_val[i]);
  546. }
  547. // divider is 1 should be equal with 2
  548. all_timer_pause();
  549. TEST_ASSERT(timer_set_divider(TIMER_GROUP_0, TIMER_0, 1) == ESP_ERR_INVALID_ARG) ;
  550. TEST_ASSERT(timer_set_divider(TIMER_GROUP_1, TIMER_0, 1) == ESP_ERR_INVALID_ARG) ;
  551. TEST_ASSERT(timer_set_divider(TIMER_GROUP_0, TIMER_1, 1) == ESP_ERR_INVALID_ARG) ;
  552. TEST_ASSERT(timer_set_divider(TIMER_GROUP_1, TIMER_1, 1) == ESP_ERR_INVALID_ARG) ;
  553. all_timer_pause();
  554. TEST_ASSERT(timer_set_divider(TIMER_GROUP_0, TIMER_0, 65537) == ESP_ERR_INVALID_ARG) ;
  555. TEST_ASSERT(timer_set_divider(TIMER_GROUP_1, TIMER_0, 65537) == ESP_ERR_INVALID_ARG) ;
  556. TEST_ASSERT(timer_set_divider(TIMER_GROUP_0, TIMER_1, 65537) == ESP_ERR_INVALID_ARG) ;
  557. TEST_ASSERT(timer_set_divider(TIMER_GROUP_1, TIMER_1, 65537) == ESP_ERR_INVALID_ARG) ;
  558. }
  559. /**
  560. * enable alarm case:
  561. * 1. enable alarm ,set alarm value and get value
  562. * 2. disable alarm ,set alarm value and get value
  563. */
  564. TEST_CASE("Timer enable alarm", "[hw_timer]")
  565. {
  566. timer_config_t config_test = {
  567. .alarm_en = 1,
  568. .auto_reload = 1,
  569. .counter_dir = TIMER_COUNT_UP,
  570. .divider = TIMER_DIVIDER,
  571. .counter_en = 1,
  572. .intr_type = TIMER_INTR_LEVEL
  573. };
  574. all_timer_init(config_test, true);
  575. // enable alarm
  576. alarm_flag = false;
  577. tg_timer_init(TIMER_GROUP_0, TIMER_1, 1.2);
  578. vTaskDelay(2000 / portTICK_PERIOD_MS);
  579. TEST_ASSERT(alarm_flag == true);
  580. // disable alarm
  581. alarm_flag = false;
  582. timer_set_alarm(TIMER_GROUP_0, TIMER_1, TIMER_ALARM_DIS);
  583. tg_timer_init(TIMER_GROUP_0, TIMER_1, 1.2);
  584. vTaskDelay(2000 / portTICK_PERIOD_MS);
  585. TEST_ASSERT(alarm_flag == false);
  586. // enable alarm
  587. alarm_flag = false;
  588. timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_EN);
  589. tg_timer_init(TIMER_GROUP_1, TIMER_0, 1.2);
  590. vTaskDelay(2000 / portTICK_PERIOD_MS);
  591. TEST_ASSERT(alarm_flag == true);
  592. // disable alarm
  593. alarm_flag = false;
  594. timer_set_alarm(TIMER_GROUP_1, TIMER_0, TIMER_ALARM_DIS);
  595. tg_timer_init(TIMER_GROUP_1, TIMER_0, 1.2);
  596. vTaskDelay(2000 / portTICK_PERIOD_MS);
  597. TEST_ASSERT(alarm_flag == false);
  598. }
  599. /**
  600. * alarm value case:
  601. * 1. set alarm value and get value
  602. * 2. interrupt test time
  603. */
  604. TEST_CASE("Timer set alarm value", "[hw_timer]")
  605. {
  606. esp_err_t ret;
  607. int i;
  608. uint64_t alarm_val[4];
  609. timer_config_t config = {
  610. .alarm_en = 1,
  611. .auto_reload = TIMER_AUTORELOAD_DIS,
  612. .counter_dir = TIMER_COUNT_UP,
  613. .divider = TIMER_DIVIDER,
  614. .counter_en = 0,
  615. .intr_type = TIMER_INTR_LEVEL
  616. };
  617. all_timer_init(config, true);
  618. // set and get alarm value
  619. all_timer_set_alarm_value(3);
  620. ret = timer_get_alarm_value(TIMER_GROUP_0, TIMER_0, &alarm_val[0]);
  621. TEST_ASSERT(ret == ESP_OK);
  622. ret = timer_get_alarm_value(TIMER_GROUP_0, TIMER_1, &alarm_val[1]);
  623. TEST_ASSERT(ret == ESP_OK);
  624. ret = timer_get_alarm_value(TIMER_GROUP_1, TIMER_0, &alarm_val[2]);
  625. TEST_ASSERT(ret == ESP_OK);
  626. ret = timer_get_alarm_value(TIMER_GROUP_1, TIMER_1, &alarm_val[3]);
  627. TEST_ASSERT(ret == ESP_OK);
  628. for (i = 0; i < 4; i++) {
  629. TEST_ASSERT_EQUAL_UINT32(alarm_val[i] , TIMER_SCALE * 3);
  630. }
  631. // set interrupt read alarm value
  632. tg_timer_init(TIMER_GROUP_0, TIMER_1, 2.4);
  633. tg_timer_init(TIMER_GROUP_1, TIMER_0, 1.4);
  634. vTaskDelay(3000 / portTICK_PERIOD_MS);
  635. }
  636. /**
  637. * auto reload case:
  638. * 1. no reload
  639. * 2. auto reload
  640. */
  641. TEST_CASE("Timer auto reload", "[hw_timer]")
  642. {
  643. timer_config_t config = {
  644. .alarm_en = 1,
  645. .auto_reload = TIMER_AUTORELOAD_DIS,
  646. .counter_dir = TIMER_COUNT_UP,
  647. .divider = TIMER_DIVIDER,
  648. .counter_en = 1,
  649. .intr_type = TIMER_INTR_LEVEL
  650. };
  651. all_timer_init(config, true);
  652. // test disable auto_reload
  653. tg_timer_init(TIMER_GROUP_0, TIMER_0, 1.14);
  654. tg_timer_init(TIMER_GROUP_1, TIMER_1, 1.14);
  655. vTaskDelay(2000 / portTICK_PERIOD_MS);
  656. //test enable auto_reload
  657. timer_set_auto_reload(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_EN);
  658. tg_timer_init(TIMER_GROUP_0, TIMER_1, 1.4);
  659. timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN);
  660. tg_timer_init(TIMER_GROUP_1, TIMER_0, 1.4);
  661. vTaskDelay(2000 / portTICK_PERIOD_MS);
  662. }
  663. /**
  664. * timer_enable_intr case:
  665. * 1. enable timer_intr
  666. * 2. disable timer_intr
  667. */
  668. TEST_CASE("Timer enable timer interrupt", "[hw_timer]")
  669. {
  670. alarm_flag = false;
  671. timer_config_t config = {
  672. .alarm_en = 1,
  673. .auto_reload = TIMER_AUTORELOAD_DIS,
  674. .counter_dir = TIMER_COUNT_UP,
  675. .divider = TIMER_DIVIDER,
  676. .counter_en = TIMER_PAUSE,
  677. .intr_type = TIMER_INTR_LEVEL
  678. };
  679. uint64_t set_timer_val = 0x0;
  680. all_timer_init(config, true);
  681. all_timer_pause();
  682. all_timer_set_counter_value(set_timer_val);
  683. all_timer_set_alarm_value(1.2);
  684. // enable timer_intr0
  685. timer_set_counter_value(TIMER_GROUP_0, TIMER_0, set_timer_val);
  686. timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, 1.2 * TIMER_SCALE);
  687. timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group0_isr,
  688. (void *) TIMER_0, ESP_INTR_FLAG_LOWMED, NULL);
  689. timer_start(TIMER_GROUP_0, TIMER_0);
  690. vTaskDelay(2000 / portTICK_PERIOD_MS);
  691. TEST_ASSERT(alarm_flag == true)
  692. // disable timer_intr0
  693. alarm_flag = false;
  694. timer_set_counter_value(TIMER_GROUP_0, TIMER_0, set_timer_val);
  695. timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, 1.2 * TIMER_SCALE);
  696. timer_disable_intr(TIMER_GROUP_0, TIMER_0);
  697. timer_start(TIMER_GROUP_0, TIMER_0);
  698. vTaskDelay(2000 / portTICK_PERIOD_MS);
  699. TEST_ASSERT(alarm_flag == false)
  700. // enable timer_intr1
  701. timer_set_counter_value(TIMER_GROUP_1, TIMER_1, set_timer_val);
  702. timer_set_alarm_value(TIMER_GROUP_1, TIMER_1, 1.2 * TIMER_SCALE);
  703. timer_isr_register(TIMER_GROUP_1, TIMER_1, test_timer_group1_isr,
  704. (void *) TIMER_1, ESP_INTR_FLAG_LOWMED, NULL);
  705. timer_start(TIMER_GROUP_1, TIMER_1);
  706. vTaskDelay(2000 / portTICK_PERIOD_MS);
  707. TEST_ASSERT(alarm_flag == true)
  708. // disable timer_intr1
  709. alarm_flag = false;
  710. timer_set_counter_value(TIMER_GROUP_1, TIMER_1, set_timer_val);
  711. timer_set_alarm_value(TIMER_GROUP_1, TIMER_1, 1.2 * TIMER_SCALE);
  712. timer_disable_intr(TIMER_GROUP_1, TIMER_1);
  713. timer_start(TIMER_GROUP_1, TIMER_1);
  714. vTaskDelay(2000 / portTICK_PERIOD_MS);
  715. TEST_ASSERT(alarm_flag == false);
  716. //enable timer_intr1 again
  717. timer_init(TIMER_GROUP_1, TIMER_1, &config);
  718. timer_set_counter_value(TIMER_GROUP_1, TIMER_1, set_timer_val);
  719. timer_set_alarm_value(TIMER_GROUP_1, TIMER_1, 1.2 * TIMER_SCALE);
  720. timer_enable_intr(TIMER_GROUP_1, TIMER_1);
  721. timer_start(TIMER_GROUP_1, TIMER_1);
  722. vTaskDelay(2000 / portTICK_PERIOD_MS);
  723. TEST_ASSERT(alarm_flag == true)
  724. }
  725. /**
  726. * enable timer group case:
  727. * 1. enable timer group
  728. * 2. disable timer group
  729. */
  730. TEST_CASE("Timer enable timer group interrupt", "[hw_timer][ignore]")
  731. {
  732. alarm_flag = false;
  733. timer_config_t config = {
  734. .alarm_en = 1,
  735. .auto_reload = TIMER_AUTORELOAD_DIS,
  736. .counter_dir = TIMER_COUNT_UP,
  737. .divider = TIMER_DIVIDER,
  738. .counter_en = 0,
  739. .intr_type = TIMER_INTR_LEVEL
  740. };
  741. uint64_t set_timer_val = 0x0;
  742. all_timer_init(config, true);
  743. all_timer_pause();
  744. all_timer_set_counter_value(set_timer_val);
  745. all_timer_set_alarm_value(1.2);
  746. // enable timer group
  747. timer_group_intr_enable(TIMER_GROUP_0, TIMG_T0_INT_ENA_M);
  748. timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group0_isr,
  749. (void *) TIMER_0, ESP_INTR_FLAG_LOWMED, NULL);
  750. timer_start(TIMER_GROUP_0, TIMER_0);
  751. vTaskDelay(2000 / portTICK_PERIOD_MS);
  752. TEST_ASSERT(alarm_flag == true);
  753. //test enable auto_reload
  754. alarm_flag = false;
  755. timer_group_intr_disable(TIMER_GROUP_0, TIMG_T0_INT_ENA_M);
  756. timer_start(TIMER_GROUP_0, TIMER_0);
  757. vTaskDelay(2000 / portTICK_PERIOD_MS);
  758. TEST_ASSERT(alarm_flag == false);
  759. timer_group_intr_enable(TIMER_GROUP_0, TIMG_T0_INT_ENA_M);
  760. timer_isr_register(TIMER_GROUP_0, TIMER_0, test_timer_group0_isr,
  761. (void *) TIMER_0, ESP_INTR_FLAG_LOWMED, NULL);
  762. timer_start(TIMER_GROUP_0, TIMER_0);
  763. vTaskDelay(2000 / portTICK_PERIOD_MS);
  764. TEST_ASSERT(alarm_flag == true);
  765. }
  766. /**
  767. * isr_register case:
  768. * Cycle register 15 times, compare the heap size to ensure no memory leaks
  769. */
  770. TEST_CASE("Timer interrupt register", "[hw_timer]")
  771. {
  772. int i;
  773. int heap_size = 0;
  774. timer_config_t config = {
  775. .alarm_en = 1,
  776. .auto_reload = TIMER_AUTORELOAD_DIS,
  777. .counter_dir = TIMER_COUNT_UP,
  778. .divider = TIMER_DIVIDER,
  779. .counter_en = TIMER_PAUSE,
  780. .intr_type = TIMER_INTR_LEVEL
  781. };
  782. for (i = 0; i < 15; i++) {
  783. all_timer_init(config, true);
  784. tg_timer_init(TIMER_GROUP_0, TIMER_0, 0.54);
  785. tg_timer_init(TIMER_GROUP_1, TIMER_1, 0.34);
  786. timer_set_auto_reload(TIMER_GROUP_0, TIMER_1, TIMER_AUTORELOAD_EN);
  787. tg_timer_init(TIMER_GROUP_0, TIMER_1, 0.4);
  788. timer_set_auto_reload(TIMER_GROUP_1, TIMER_0, TIMER_AUTORELOAD_EN);
  789. tg_timer_init(TIMER_GROUP_1, TIMER_0, 0.6);
  790. vTaskDelay(1000 / portTICK_PERIOD_MS);
  791. if (heap_size == 0) {
  792. heap_size = esp_get_free_heap_size();
  793. }
  794. }
  795. TEST_ASSERT_INT_WITHIN(100, heap_size, esp_get_free_heap_size());
  796. }