test_rmt.c 25 KB

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  1. /**
  2. * please connect GPIO18 to GPIO19
  3. */
  4. #include "stdio.h"
  5. #include <string.h>
  6. #include "driver/rmt.h"
  7. #include "unity.h"
  8. #include "test_utils.h"
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "freertos/queue.h"
  12. #include "freertos/semphr.h"
  13. #include "esp_err.h"
  14. #include "esp_log.h"
  15. #include "driver/periph_ctrl.h"
  16. #include "soc/rmt_periph.h"
  17. static const char* TAG = "RMT";
  18. #define RMT_RX_ACTIVE_LEVEL 1 /*!< Data bit is active high for self test mode */
  19. #define RMT_TX_CARRIER_EN 0 /*!< Disable carrier for self test mode */
  20. #define RMT_TX_CHANNEL 1 /*!< RMT channel for transmitter */
  21. #define RMT_TX_GPIO_NUM 18 /*!< GPIO number for transmitter signal */
  22. #define RMT_RX_CHANNEL 0 /*!< RMT channel for receiver */
  23. #define RMT_RX_GPIO_NUM 19 /*!< GPIO number for receiver */
  24. #define RMT_CLK_DIV 100 /*!< RMT counter clock divider */
  25. #define RMT_TICK_10_US (80000000/RMT_CLK_DIV/100000) /*!< RMT counter value for 10 us.(Source clock is APB clock) */
  26. #define HEADER_HIGH_US 9000 /*!< NEC protocol header: positive 9ms */
  27. #define HEADER_LOW_US 4500 /*!< NEC protocol header: negative 4.5ms*/
  28. #define BIT_ONE_HIGH_US 560 /*!< NEC protocol data bit 1: positive 0.56ms */
  29. #define BIT_ONE_LOW_US (2250-BIT_ONE_HIGH_US) /*!< NEC protocol data bit 1: negative 1.69ms */
  30. #define BIT_ZERO_HIGH_US 560 /*!< NEC protocol data bit 0: positive 0.56ms */
  31. #define BIT_ZERO_LOW_US (1120-BIT_ZERO_HIGH_US) /*!< NEC protocol data bit 0: negative 0.56ms */
  32. #define BIT_END 560 /*!< NEC protocol end: positive 0.56ms */
  33. #define BIT_MARGIN 20 /*!< NEC parse margin time */
  34. #define ITEM_DURATION(d) ((d & 0x7fff)*10/RMT_TICK_10_US) /*!< Parse duration time from memory register value */
  35. #define DATA_ITEM_NUM 34 /*!< NEC code item number: header + 32bit data + end */
  36. #define RMT_TX_DATA_NUM 100 /*!< NEC tx test data number */
  37. #define RMT_ITEM32_TIMEOUT_US 9500 /*!< RMT receiver timeout value(us) */
  38. /**
  39. * @brief Build register value of waveform for NEC one data bit
  40. */
  41. static inline void fill_item_level(rmt_item32_t* item, int high_us, int low_us)
  42. {
  43. item->level0 = 1;
  44. item->duration0 = (high_us) / 10 * RMT_TICK_10_US;
  45. item->level1 = 0;
  46. item->duration1 = (low_us) / 10 * RMT_TICK_10_US;
  47. }
  48. /**
  49. * @brief Generate NEC header value: active 9ms + negative 4.5ms
  50. */
  51. static void fill_item_header(rmt_item32_t* item)
  52. {
  53. fill_item_level(item, HEADER_HIGH_US, HEADER_LOW_US);
  54. }
  55. /*
  56. * @brief Generate NEC data bit 1: positive 0.56ms + negative 1.69ms
  57. */
  58. static void fill_item_bit_one(rmt_item32_t* item)
  59. {
  60. fill_item_level(item, BIT_ONE_HIGH_US, BIT_ONE_LOW_US);
  61. }
  62. /**
  63. * @brief Generate NEC data bit 0: positive 0.56ms + negative 0.56ms
  64. */
  65. static void fill_item_bit_zero(rmt_item32_t* item)
  66. {
  67. fill_item_level(item, BIT_ZERO_HIGH_US, BIT_ZERO_LOW_US);
  68. }
  69. /**
  70. * @brief Generate NEC end signal: positive 0.56ms
  71. */
  72. static void fill_item_end(rmt_item32_t* item)
  73. {
  74. fill_item_level(item, BIT_END, 0x7fff);
  75. }
  76. /**
  77. * @brief Check whether duration is around target_us
  78. */
  79. static inline bool check_in_range(int duration_ticks, int target_us, int margin_us)
  80. {
  81. if(( ITEM_DURATION(duration_ticks) < (target_us + margin_us))
  82. && ( ITEM_DURATION(duration_ticks) > (target_us - margin_us))) {
  83. return true;
  84. } else {
  85. return false;
  86. }
  87. }
  88. /**
  89. * @brief Check whether this value represents an NEC header
  90. */
  91. static bool header_if(rmt_item32_t* item)
  92. {
  93. if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
  94. && check_in_range(item->duration0, HEADER_HIGH_US, BIT_MARGIN)
  95. && check_in_range(item->duration1, HEADER_LOW_US, BIT_MARGIN)) {
  96. return true;
  97. }
  98. return false;
  99. }
  100. /**
  101. * @brief Check whether this value represents an NEC data bit 1
  102. */
  103. static bool bit_one_if(rmt_item32_t* item)
  104. {
  105. if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
  106. && check_in_range(item->duration0, BIT_ONE_HIGH_US, BIT_MARGIN)
  107. && check_in_range(item->duration1, BIT_ONE_LOW_US, BIT_MARGIN)) {
  108. return true;
  109. }
  110. return false;
  111. }
  112. /**
  113. * @brief Check whether this value represents an NEC data bit 0
  114. */
  115. static bool bit_zero_if(rmt_item32_t* item)
  116. {
  117. if((item->level0 == RMT_RX_ACTIVE_LEVEL && item->level1 != RMT_RX_ACTIVE_LEVEL)
  118. && check_in_range(item->duration0, BIT_ZERO_HIGH_US, BIT_MARGIN)
  119. && check_in_range(item->duration1, BIT_ZERO_LOW_US, BIT_MARGIN)) {
  120. return true;
  121. }
  122. return false;
  123. }
  124. /**
  125. * @brief Parse NEC 32 bit waveform to address and command.
  126. */
  127. static int parse_items(rmt_item32_t* item, int item_num, uint16_t* addr, uint16_t* data)
  128. {
  129. int w_len = item_num;
  130. if(w_len < DATA_ITEM_NUM) {
  131. return -1;
  132. }
  133. int i = 0, j = 0;
  134. if(!header_if(item++)) {
  135. return -1;
  136. }
  137. uint16_t addr_t = 0;
  138. for(j = 0; j < 16; j++) {
  139. if(bit_one_if(item)) {
  140. addr_t |= (1 << j);
  141. } else if(bit_zero_if(item)) {
  142. addr_t |= (0 << j);
  143. } else {
  144. return -1;
  145. }
  146. item++;
  147. i++;
  148. }
  149. uint16_t data_t = 0;
  150. for(j = 0; j < 16; j++) {
  151. if(bit_one_if(item)) {
  152. data_t |= (1 << j);
  153. } else if(bit_zero_if(item)) {
  154. data_t |= (0 << j);
  155. } else {
  156. return -1;
  157. }
  158. item++;
  159. i++;
  160. }
  161. *addr = addr_t;
  162. *data = data_t;
  163. return i;
  164. }
  165. /**
  166. * @brief Build NEC 32bit waveform.
  167. */
  168. static int build_items(int channel, rmt_item32_t* item, int item_num, uint16_t addr, uint16_t cmd_data)
  169. {
  170. int i = 0, j = 0;
  171. if(item_num < DATA_ITEM_NUM) {
  172. return -1;
  173. }
  174. fill_item_header(item++);
  175. i++;
  176. for(j = 0; j < 16; j++) {
  177. if(addr & 0x1) {
  178. fill_item_bit_one(item);
  179. } else {
  180. fill_item_bit_zero(item);
  181. }
  182. item++;
  183. i++;
  184. addr >>= 1;
  185. }
  186. for(j = 0; j < 16; j++) {
  187. if(cmd_data & 0x1) {
  188. fill_item_bit_one(item);
  189. } else {
  190. fill_item_bit_zero(item);
  191. }
  192. item++;
  193. i++;
  194. cmd_data >>= 1;
  195. }
  196. fill_item_end(item);
  197. i++;
  198. return i;
  199. }
  200. static void set_tx_data(int tx_channel, uint16_t cmd, uint16_t addr, int item_num, rmt_item32_t* item, int offset)
  201. {
  202. while(1) {
  203. int i = build_items(tx_channel, item + offset, item_num - offset, ((~addr) << 8) | addr, cmd);
  204. printf("cmd :%d\n", cmd);
  205. if(i < 0) {
  206. break;
  207. }
  208. cmd++;
  209. addr++;
  210. offset += i;
  211. }
  212. }
  213. static int get_rx_data(RingbufHandle_t rb)
  214. {
  215. uint16_t tmp = 0;
  216. while(rb) {
  217. size_t rx_size = 0;
  218. rmt_item32_t* rx_item = (rmt_item32_t*) xRingbufferReceive(rb, &rx_size, 1000);
  219. if(rx_item) {
  220. uint16_t rmt_addr;
  221. uint16_t rmt_cmd;
  222. int rx_offset = 0;
  223. while(1) {
  224. int res = parse_items(rx_item + rx_offset, rx_size / 4 - rx_offset, &rmt_addr, &rmt_cmd);
  225. if(res > 0) {
  226. rx_offset += res + 1;
  227. ESP_LOGI(TAG, "RMT RCV --- addr: 0x%04x cmd: 0x%04x", rmt_addr, rmt_cmd);
  228. TEST_ASSERT(rmt_cmd == tmp);
  229. tmp++;
  230. } else {
  231. break;
  232. }
  233. }
  234. vRingbufferReturnItem(rb, (void*) rx_item);
  235. } else {
  236. break;
  237. }
  238. }
  239. return tmp;
  240. }
  241. /**
  242. * @brief RMT transmitter initialization
  243. */
  244. static void tx_init()
  245. {
  246. // the sender once it send something, its frq is 38kHz, and the duty cycle is 50%
  247. rmt_tx_config_t tx_cfg = {
  248. .loop_en = false,
  249. .carrier_duty_percent = 50,
  250. .carrier_freq_hz = 38000,
  251. .carrier_level = 1,
  252. .carrier_en = RMT_TX_CARRIER_EN,
  253. .idle_level = 0,
  254. .idle_output_en = true,
  255. };
  256. rmt_config_t rmt_tx = {
  257. .channel = RMT_TX_CHANNEL,
  258. .gpio_num = RMT_TX_GPIO_NUM,
  259. .mem_block_num = 1,
  260. .clk_div = RMT_CLK_DIV,
  261. .tx_config = tx_cfg,
  262. .rmt_mode = 0,
  263. };
  264. rmt_config(&rmt_tx);
  265. rmt_driver_install(rmt_tx.channel, 0, 0);
  266. }
  267. /**
  268. * @brief RMT receiver initialization
  269. */
  270. static void rx_init()
  271. {
  272. rmt_rx_config_t rx_cfg = {
  273. .filter_en = true,
  274. .filter_ticks_thresh = 100,
  275. .idle_threshold = RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US),
  276. };
  277. rmt_config_t rmt_rx = {
  278. .channel = RMT_RX_CHANNEL,
  279. .gpio_num = RMT_RX_GPIO_NUM,
  280. .clk_div = RMT_CLK_DIV,
  281. .mem_block_num = 1,
  282. .rmt_mode = RMT_MODE_RX,
  283. .rx_config = rx_cfg,
  284. };
  285. rmt_config(&rmt_rx);
  286. rmt_driver_install(rmt_rx.channel, (sizeof(rmt_item32_t) * DATA_ITEM_NUM * (RMT_TX_DATA_NUM+6)), 0);
  287. }
  288. TEST_CASE("RMT init config", "[rmt][test_env=UT_T1_RMT]")
  289. {
  290. // tx settings
  291. rmt_tx_config_t tx_cfg = {
  292. .loop_en = false,
  293. .carrier_duty_percent = 50,
  294. .carrier_freq_hz = 38000,
  295. .carrier_level = 1,
  296. .carrier_en = RMT_TX_CARRIER_EN,
  297. .idle_level = 0,
  298. .idle_output_en = true,
  299. };
  300. rmt_config_t rmt_tx = {
  301. .channel = RMT_TX_CHANNEL,
  302. .gpio_num = RMT_TX_GPIO_NUM,
  303. .mem_block_num = 1,
  304. .clk_div = RMT_CLK_DIV,
  305. .tx_config = tx_cfg,
  306. };
  307. TEST_ESP_OK(rmt_config(&rmt_tx));
  308. TEST_ESP_OK(rmt_driver_install(rmt_tx.channel, 0, 0));
  309. TEST_ESP_OK(rmt_driver_uninstall(rmt_tx.channel));
  310. //rx settings
  311. rmt_rx_config_t rx_cfg = {
  312. .filter_en = true,
  313. .filter_ticks_thresh = 100,
  314. .idle_threshold = RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US),
  315. };
  316. rmt_config_t rmt_rx = {
  317. .channel = RMT_RX_CHANNEL,
  318. .gpio_num = RMT_RX_GPIO_NUM,
  319. .clk_div = RMT_CLK_DIV,
  320. .mem_block_num = 1,
  321. .rmt_mode = RMT_MODE_RX,
  322. .rx_config = rx_cfg,
  323. };
  324. TEST_ESP_OK(rmt_config(&rmt_rx));
  325. TEST_ESP_OK(rmt_driver_install(rmt_rx.channel, 1000, 0));
  326. TEST_ESP_OK(rmt_driver_uninstall(rmt_rx.channel));
  327. //error param setting
  328. rmt_config_t temp_rmt_rx1 = {
  329. .channel = 2,
  330. .gpio_num = 15,
  331. .clk_div = RMT_CLK_DIV,
  332. .mem_block_num = 1,
  333. .rmt_mode = RMT_MODE_RX,
  334. .rx_config = rx_cfg,
  335. };
  336. rmt_config_t temp_rmt_rx2 = temp_rmt_rx1;
  337. temp_rmt_rx2.clk_div = 0; // only invalid parameter to test
  338. TEST_ASSERT(rmt_config(&temp_rmt_rx2) == ESP_ERR_INVALID_ARG);
  339. temp_rmt_rx2 = temp_rmt_rx1;
  340. temp_rmt_rx2.channel = RMT_CHANNEL_MAX;
  341. TEST_ASSERT(rmt_config(&temp_rmt_rx2) == ESP_ERR_INVALID_ARG);
  342. temp_rmt_rx2 = temp_rmt_rx1;
  343. temp_rmt_rx2.channel = 2;
  344. temp_rmt_rx2.mem_block_num = 8;
  345. TEST_ASSERT(rmt_config(&temp_rmt_rx2) == ESP_ERR_INVALID_ARG);
  346. }
  347. TEST_CASE("RMT init set function", "[rmt][test_env=UT_T1_RMT]")
  348. {
  349. rmt_channel_t channel = 7;
  350. TEST_ESP_OK(rmt_set_pin(channel, RMT_MODE_RX, RMT_RX_GPIO_NUM));
  351. TEST_ESP_OK(rmt_set_clk_div(channel, RMT_CLK_DIV*2));
  352. TEST_ESP_OK(rmt_set_mem_block_num(channel, 1));
  353. TEST_ESP_OK(rmt_set_rx_filter(channel, 1, 100));
  354. TEST_ESP_OK(rmt_set_rx_idle_thresh(channel, RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US)*2));
  355. TEST_ESP_OK(rmt_driver_install(channel, 0, 0));
  356. TEST_ESP_OK(rmt_driver_uninstall(channel));
  357. }
  358. // need to make sure its phenomenon by logic analyzer, can't run in CI
  359. TEST_CASE("RMT clock devider, clock source set(logic analyzer)", "[rmt][ignore]")
  360. {
  361. uint8_t div_cnt;
  362. rmt_source_clk_t src_clk;
  363. rmt_config_t rmt_tx;
  364. rmt_tx.channel = RMT_TX_CHANNEL;
  365. rmt_tx.mem_block_num = 1;
  366. rmt_tx.gpio_num = RMT_TX_GPIO_NUM;
  367. rmt_tx.clk_div = RMT_CLK_DIV;
  368. rmt_tx.tx_config.loop_en = true;
  369. rmt_tx.tx_config.carrier_duty_percent = 50;
  370. rmt_tx.tx_config.carrier_freq_hz = 38000;
  371. rmt_tx.tx_config.carrier_level = 1;
  372. rmt_tx.tx_config.carrier_en = RMT_TX_CARRIER_EN;
  373. rmt_tx.tx_config.idle_level = 0;
  374. rmt_tx.tx_config.idle_output_en = true;
  375. rmt_tx.rmt_mode = RMT_MODE_TX;
  376. TEST_ESP_OK(rmt_config(&rmt_tx));
  377. TEST_ESP_OK(rmt_get_clk_div(RMT_TX_CHANNEL, &div_cnt));
  378. TEST_ESP_OK(rmt_driver_install(rmt_tx.channel, 0, 0));
  379. TEST_ASSERT_EQUAL_UINT8(div_cnt, RMT_CLK_DIV);
  380. vTaskDelay(1000 / portTICK_PERIOD_MS);
  381. // reset it and check it
  382. TEST_ESP_OK(rmt_set_clk_div(RMT_TX_CHANNEL, 160));
  383. TEST_ESP_OK(rmt_get_clk_div(RMT_TX_CHANNEL, &div_cnt));
  384. vTaskDelay(1000 / portTICK_PERIOD_MS);
  385. TEST_ESP_OK(rmt_set_source_clk(RMT_TX_CHANNEL, RMT_BASECLK_APB));
  386. TEST_ESP_OK(rmt_get_source_clk(RMT_TX_CHANNEL, &src_clk));
  387. TEST_ASSERT_EQUAL_UINT8(div_cnt, 160);
  388. TEST_ASSERT_EQUAL_INT(src_clk, RMT_BASECLK_APB);
  389. TEST_ESP_OK(rmt_driver_uninstall(rmt_tx.channel));
  390. }
  391. TEST_CASE("RMT rx set and get properties", "[rmt][test_env=UT_T1_RMT]")
  392. {
  393. rmt_channel_t channel = RMT_RX_CHANNEL;
  394. uint8_t memNum;
  395. uint8_t div_cnt;
  396. uint16_t idleThreshold;
  397. rmt_mem_owner_t owner;
  398. rx_init();
  399. TEST_ESP_OK(rmt_get_clk_div(channel, &div_cnt));
  400. TEST_ESP_OK(rmt_get_mem_block_num(channel, &memNum));
  401. TEST_ESP_OK(rmt_get_rx_idle_thresh(channel, &idleThreshold));
  402. TEST_ESP_OK(rmt_get_memory_owner(channel, &owner));
  403. TEST_ASSERT_EQUAL_UINT8(div_cnt, RMT_CLK_DIV);
  404. TEST_ASSERT_EQUAL_UINT8(memNum, 1);
  405. TEST_ASSERT_EQUAL_UINT16(idleThreshold, RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US));
  406. TEST_ASSERT_EQUAL_INT(owner, RMT_MEM_OWNER_RX);
  407. //eRR
  408. TEST_ESP_OK(rmt_set_pin(channel, RMT_MODE_RX, 22));
  409. TEST_ESP_OK(rmt_set_clk_div(channel, RMT_CLK_DIV*2));
  410. TEST_ESP_OK(rmt_set_mem_block_num(channel, 2));
  411. TEST_ESP_OK(rmt_set_rx_filter(channel, 1, 100));
  412. TEST_ESP_OK(rmt_set_rx_idle_thresh(channel, RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US)*2));
  413. TEST_ESP_OK(rmt_set_memory_owner(channel, RMT_MEM_OWNER_RX));
  414. TEST_ESP_OK(rmt_get_clk_div(channel, &div_cnt));
  415. TEST_ESP_OK(rmt_get_mem_block_num(channel, &memNum));
  416. TEST_ESP_OK(rmt_get_rx_idle_thresh(channel, &idleThreshold));
  417. TEST_ESP_OK(rmt_get_memory_owner(channel, &owner));
  418. TEST_ASSERT_EQUAL_UINT8(div_cnt, RMT_CLK_DIV*2);
  419. TEST_ASSERT_EQUAL_UINT8(memNum, 2);
  420. TEST_ASSERT_EQUAL_UINT16(idleThreshold, RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US)*2);
  421. TEST_ASSERT_EQUAL_INT(owner, RMT_MEM_OWNER_RX);
  422. TEST_ESP_OK(rmt_driver_uninstall(channel));
  423. }
  424. TEST_CASE("RMT tx set and get properties", "[rmt][test_env=UT_T1_RMT]")
  425. {
  426. rmt_channel_t channel = RMT_TX_CHANNEL;
  427. uint8_t memNum;
  428. uint8_t div_cnt;
  429. bool loop_en;
  430. rmt_mem_owner_t owner;
  431. tx_init();
  432. TEST_ESP_OK(rmt_get_clk_div(channel, &div_cnt));
  433. TEST_ESP_OK(rmt_get_mem_block_num(channel, &memNum));
  434. TEST_ESP_OK(rmt_get_tx_loop_mode(channel, &loop_en));
  435. TEST_ESP_OK(rmt_get_memory_owner(channel, &owner));
  436. TEST_ASSERT_EQUAL_INT8(loop_en, 0);
  437. TEST_ASSERT_EQUAL_UINT8(div_cnt, RMT_CLK_DIV);
  438. TEST_ASSERT_EQUAL_UINT8(memNum, 1);
  439. TEST_ASSERT_EQUAL_INT(owner, RMT_MEM_OWNER_TX);
  440. //reset by "set"
  441. TEST_ESP_OK(rmt_set_pin(channel, RMT_MODE_TX, RMT_TX_GPIO_NUM));
  442. TEST_ESP_OK(rmt_set_clk_div(channel, RMT_CLK_DIV*2));
  443. TEST_ESP_OK(rmt_set_mem_block_num(channel, 2));
  444. TEST_ESP_OK(rmt_set_tx_loop_mode(channel, 1));
  445. TEST_ESP_OK(rmt_set_tx_carrier(channel, 0, 1, 0, 1));
  446. TEST_ESP_OK(rmt_set_idle_level(channel, 1, 0));
  447. TEST_ESP_OK(rmt_set_memory_owner(channel, RMT_MEM_OWNER_TX));
  448. TEST_ESP_OK(rmt_get_clk_div(channel, &div_cnt));
  449. TEST_ESP_OK(rmt_get_mem_block_num(channel, &memNum));
  450. TEST_ESP_OK(rmt_get_tx_loop_mode(channel, &loop_en));
  451. TEST_ESP_OK(rmt_get_memory_owner(channel, &owner));
  452. TEST_ASSERT_EQUAL_INT8(loop_en, 1);
  453. TEST_ASSERT_EQUAL_UINT8(div_cnt, RMT_CLK_DIV*2);
  454. TEST_ASSERT_EQUAL_UINT8(memNum, 2);
  455. TEST_ASSERT_EQUAL_INT(owner, RMT_MEM_OWNER_TX);
  456. rmt_item32_t items[1];
  457. items[0].duration0 = 300 / 10 * RMT_TICK_10_US; //300us
  458. items[0].level0 = 1;
  459. items[0].duration1 = 0;
  460. items[0].level1 = 0;
  461. for(int i=0; i<100; i++) {
  462. TEST_ESP_OK(rmt_write_items(RMT_TX_CHANNEL, items,
  463. 1, /* Number of items */
  464. 1 /* wait till done */));
  465. vTaskDelay(10/portTICK_PERIOD_MS); //every 10ms to write the item
  466. }
  467. TEST_ESP_OK(rmt_driver_uninstall(channel));
  468. }
  469. TEST_CASE("RMT memory test", "[rmt][test_env=UT_T1_RMT]")
  470. {
  471. rmt_config_t rmt_rx;
  472. rmt_rx.channel = RMT_RX_CHANNEL;
  473. rmt_rx.gpio_num = RMT_RX_GPIO_NUM;
  474. rmt_rx.clk_div = RMT_CLK_DIV;
  475. rmt_rx.mem_block_num = 1;
  476. rmt_rx.rmt_mode = RMT_MODE_RX;
  477. rmt_rx.rx_config.filter_en = true;
  478. rmt_rx.rx_config.filter_ticks_thresh = 100;
  479. rmt_rx.rx_config.idle_threshold = RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US);
  480. TEST_ESP_OK(rmt_config(&rmt_rx));
  481. for(int i = 0; i<100; i++) {
  482. TEST_ESP_OK(rmt_driver_install(rmt_rx.channel, 1000, 0));
  483. TEST_ESP_OK(rmt_driver_uninstall(rmt_rx.channel));
  484. }
  485. }
  486. // RMT channel num and memory block relationship
  487. TEST_CASE("RMT memory block test", "[rmt][test_env=UT_T1_RMT]")
  488. {
  489. rmt_channel_t channel = 0;
  490. rmt_config_t rmt_rx;
  491. rmt_rx.channel = channel;
  492. rmt_rx.gpio_num = RMT_RX_GPIO_NUM;
  493. rmt_rx.clk_div = RMT_CLK_DIV;
  494. rmt_rx.mem_block_num = 1;
  495. rmt_rx.rmt_mode = RMT_MODE_RX;
  496. rmt_rx.rx_config.filter_en = true;
  497. rmt_rx.rx_config.filter_ticks_thresh = 100;
  498. rmt_rx.rx_config.idle_threshold = RMT_ITEM32_TIMEOUT_US / 10 * (RMT_TICK_10_US);
  499. TEST_ESP_OK(rmt_config(&rmt_rx));
  500. TEST_ESP_OK(rmt_driver_install(rmt_rx.channel, 1000, 0));
  501. TEST_ESP_OK(rmt_set_mem_block_num(channel, 8));
  502. TEST_ASSERT(rmt_set_mem_block_num(channel, 9)==ESP_ERR_INVALID_ARG);
  503. TEST_ASSERT(rmt_set_mem_block_num(channel, -1)==ESP_ERR_INVALID_ARG);
  504. TEST_ESP_OK(rmt_driver_uninstall(rmt_rx.channel));
  505. rmt_rx.channel = 7;
  506. TEST_ESP_OK(rmt_config(&rmt_rx));
  507. TEST_ESP_OK(rmt_driver_install(rmt_rx.channel, 1000, 0));
  508. TEST_ASSERT(rmt_set_mem_block_num(rmt_rx.channel, 2)==ESP_ERR_INVALID_ARG);
  509. TEST_ASSERT(rmt_set_mem_block_num(rmt_rx.channel, -1)==ESP_ERR_INVALID_ARG);
  510. TEST_ESP_OK(rmt_driver_uninstall(rmt_rx.channel));
  511. }
  512. TEST_CASE("RMT send waveform(logic analyzer)", "[rmt][test_env=UT_T1_RMT][ignore]")
  513. {
  514. tx_init();
  515. rmt_item32_t items[1];
  516. items[0].duration0 = 300 / 10 * RMT_TICK_10_US; //300us
  517. items[0].level0 = 1;
  518. for(int i=0; i<500; i++) {
  519. TEST_ESP_OK(rmt_write_items(RMT_TX_CHANNEL, items,
  520. 1, /* Number of items */
  521. 1 /* wait till done */));
  522. vTaskDelay(10/portTICK_PERIOD_MS); //every 10ms to write the item
  523. }
  524. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  525. }
  526. TEST_CASE("RMT basic TX and RX", "[rmt][test_env=UT_T1_RMT]")
  527. {
  528. tx_init();
  529. int tx_channel = RMT_TX_CHANNEL;
  530. uint16_t cmd = 0x0;
  531. uint16_t addr = 0x11;
  532. int tx_num = RMT_TX_DATA_NUM;
  533. ESP_LOGI(TAG, "RMT TX DATA");
  534. size_t size = (sizeof(rmt_item32_t) * DATA_ITEM_NUM * tx_num);
  535. rmt_item32_t* item = (rmt_item32_t*) malloc(size);
  536. int item_num = DATA_ITEM_NUM * tx_num;
  537. memset((void*) item, 0, size);
  538. int offset = 0;
  539. int rx_channel = RMT_RX_CHANNEL;
  540. rx_init();
  541. RingbufHandle_t rb = NULL;
  542. rmt_get_ringbuf_handle(rx_channel, &rb);
  543. rmt_rx_start(rx_channel, 1);
  544. // send data
  545. set_tx_data(tx_channel, cmd, addr, item_num, item, offset);
  546. rmt_write_items(tx_channel, item, item_num, 1);
  547. free(item);
  548. // receive data
  549. uint16_t tmp = get_rx_data(rb);
  550. TEST_ASSERT(tmp == 100);
  551. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  552. TEST_ESP_OK(rmt_driver_uninstall(RMT_RX_CHANNEL));
  553. }
  554. TEST_CASE("RMT TX write item not wait", "[rmt][test_env=UT_T1_RMT]")
  555. {
  556. tx_init();
  557. int tx_channel = RMT_TX_CHANNEL;
  558. uint16_t cmd = 0x0;
  559. uint16_t addr = 0x11;
  560. int tx_num = RMT_TX_DATA_NUM;
  561. ESP_LOGI(TAG, "RMT TX DATA");
  562. size_t size = (sizeof(rmt_item32_t) * DATA_ITEM_NUM * tx_num);
  563. rmt_item32_t* item = (rmt_item32_t*) malloc(size);
  564. int item_num = DATA_ITEM_NUM * tx_num;
  565. memset((void*) item, 0, size);
  566. int offset = 0;
  567. int rx_channel = RMT_RX_CHANNEL;
  568. rx_init();
  569. RingbufHandle_t rb = NULL;
  570. rmt_get_ringbuf_handle(rx_channel, &rb);
  571. rmt_rx_start(rx_channel, 1);
  572. // send data
  573. set_tx_data(tx_channel, cmd, addr, item_num, item, offset);
  574. rmt_write_items(tx_channel, item, item_num, 0);
  575. free(item);
  576. // receive data
  577. uint16_t tmp = get_rx_data(rb);
  578. TEST_ASSERT(tmp < 100);
  579. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  580. TEST_ESP_OK(rmt_driver_uninstall(RMT_RX_CHANNEL));
  581. }
  582. TEST_CASE("RMT TX write item wait some ticks", "[rmt][test_env=UT_T1_RMT]")
  583. {
  584. tx_init();
  585. int tx_channel = RMT_TX_CHANNEL;
  586. uint16_t cmd = 0x0;
  587. uint16_t addr = 0x11;
  588. int tx_num = RMT_TX_DATA_NUM;
  589. ESP_LOGI(TAG, "RMT TX DATA");
  590. size_t size = (sizeof(rmt_item32_t) * DATA_ITEM_NUM * tx_num);
  591. rmt_item32_t* item = (rmt_item32_t*) malloc(size);
  592. int item_num = DATA_ITEM_NUM * tx_num;
  593. memset((void*) item, 0, size);
  594. int offset = 0;
  595. int rx_channel = RMT_RX_CHANNEL;
  596. rx_init();
  597. RingbufHandle_t rb = NULL;
  598. rmt_get_ringbuf_handle(rx_channel, &rb);
  599. rmt_rx_start(rx_channel, 1);
  600. // send data
  601. set_tx_data(tx_channel, cmd, addr, item_num, item, offset);
  602. rmt_write_items(tx_channel, item, item_num, 0);
  603. rmt_wait_tx_done(tx_channel, portMAX_DELAY);
  604. free(item);
  605. // receive data
  606. uint16_t tmp = get_rx_data(rb);
  607. TEST_ASSERT(tmp == 100);
  608. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  609. TEST_ESP_OK(rmt_driver_uninstall(RMT_RX_CHANNEL));
  610. }
  611. TEST_CASE("RMT TX stop test", "[rmt][test_env=UT_T1_RMT]")
  612. {
  613. int rx_channel = RMT_RX_CHANNEL;
  614. rx_init();
  615. RingbufHandle_t rb = NULL;
  616. rmt_get_ringbuf_handle(rx_channel, &rb);
  617. rmt_rx_start(rx_channel, 1);
  618. vTaskDelay(10);
  619. tx_init();
  620. int tx_channel = RMT_TX_CHANNEL;
  621. int tx_num = RMT_TX_DATA_NUM;
  622. ESP_LOGI(TAG, "RMT TX DATA");
  623. size_t size = (sizeof(rmt_item32_t) * DATA_ITEM_NUM * tx_num);
  624. rmt_item32_t* item = (rmt_item32_t*) malloc(size);
  625. int item_num = DATA_ITEM_NUM * tx_num;
  626. memset((void*) item, 0, size);
  627. int offset = 0;
  628. uint16_t cmd = 0x0;
  629. uint16_t addr = 0x11;
  630. // send data
  631. set_tx_data(tx_channel, cmd, addr, item_num, item, offset);
  632. rmt_write_items(tx_channel, item, item_num, 0);
  633. vTaskDelay(1000 / portTICK_PERIOD_MS);
  634. rmt_tx_stop(tx_channel);
  635. free(item);
  636. // receive data
  637. uint16_t tmp = get_rx_data(rb);
  638. TEST_ASSERT(tmp < 100);
  639. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  640. TEST_ESP_OK(rmt_driver_uninstall(RMT_RX_CHANNEL));
  641. }
  642. TEST_CASE("RMT loop_en test", "[rmt][test_env=UT_T1_RMT][ignore]")
  643. {
  644. rmt_tx_config_t tx_cfg = {
  645. .loop_en = true, // set it as true
  646. .carrier_duty_percent = 50,
  647. .carrier_freq_hz = 38000,
  648. .carrier_level = 1,
  649. .carrier_en = RMT_TX_CARRIER_EN,
  650. .idle_level = 0,
  651. .idle_output_en = true,
  652. };
  653. rmt_config_t rmt_tx = {
  654. .channel = RMT_TX_CHANNEL,
  655. .gpio_num = RMT_TX_GPIO_NUM,
  656. .mem_block_num = 1,
  657. .clk_div = RMT_CLK_DIV,
  658. .tx_config = tx_cfg,
  659. .rmt_mode = 0,
  660. };
  661. rmt_config(&rmt_tx);
  662. rmt_driver_install(rmt_tx.channel, 0, 0);
  663. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  664. int rx_channel = RMT_RX_CHANNEL;
  665. rx_init();
  666. RingbufHandle_t rb = NULL;
  667. rmt_get_ringbuf_handle(rx_channel, &rb);
  668. rmt_rx_start(rx_channel, 1);
  669. vTaskDelay(10);
  670. tx_init();
  671. int tx_channel = RMT_TX_CHANNEL;
  672. int tx_num = RMT_TX_DATA_NUM;
  673. ESP_LOGI(TAG, "RMT TX DATA");
  674. size_t size = (sizeof(rmt_item32_t) * DATA_ITEM_NUM * tx_num);
  675. rmt_item32_t* item = (rmt_item32_t*) malloc(size);
  676. int item_num = DATA_ITEM_NUM * tx_num;
  677. memset((void*) item, 0, size);
  678. int offset = 0;
  679. uint16_t cmd = 0x0;
  680. uint16_t addr = 0x11;
  681. // send data
  682. set_tx_data(tx_channel, cmd, addr, item_num, item, offset);
  683. rmt_write_items(tx_channel, item, item_num, 0);
  684. vTaskDelay(1000 / portTICK_PERIOD_MS);
  685. rmt_tx_stop(tx_channel);
  686. free(item);
  687. // receive data
  688. uint16_t tmp = get_rx_data(rb);
  689. TEST_ASSERT(tmp < 100);
  690. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  691. TEST_ESP_OK(rmt_driver_uninstall(RMT_RX_CHANNEL));
  692. }
  693. TEST_CASE("RMT use multi channel", "[rmt][test_env=UT_T1_RMT]")
  694. {
  695. rmt_tx_config_t tx_cfg = {
  696. .loop_en = true, // set it as true
  697. .carrier_duty_percent = 50,
  698. .carrier_freq_hz = 38000,
  699. .carrier_level = 1,
  700. .carrier_en = RMT_TX_CARRIER_EN,
  701. .idle_level = 0,
  702. .idle_output_en = true,
  703. };
  704. rmt_config_t rmt_tx1 = {
  705. .channel = RMT_TX_CHANNEL,
  706. .gpio_num = RMT_TX_GPIO_NUM,
  707. .mem_block_num = 4,
  708. .clk_div = RMT_CLK_DIV,
  709. .tx_config = tx_cfg,
  710. .rmt_mode = 0,
  711. };
  712. rmt_config(&rmt_tx1);
  713. rmt_driver_install(rmt_tx1.channel, 0, 0);
  714. rmt_config_t rmt_tx2 = rmt_tx1;
  715. rmt_tx2.channel = 2;
  716. rmt_config(&rmt_tx2);
  717. rmt_driver_install(rmt_tx2.channel, 0, 0);
  718. rmt_config_t rmt_tx3 = rmt_tx1;
  719. rmt_tx3.channel = 7;
  720. rmt_tx3.mem_block_num = 1;
  721. rmt_config(&rmt_tx3);
  722. rmt_driver_install(rmt_tx3.channel, 0, 0);
  723. TEST_ESP_OK(rmt_driver_uninstall(RMT_TX_CHANNEL));
  724. TEST_ESP_OK(rmt_driver_uninstall(2));
  725. TEST_ESP_OK(rmt_driver_uninstall(7));
  726. }