Kconfig 4.3 KB

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  1. menu "Ethernet"
  2. menuconfig ETH_USE_ESP32_EMAC
  3. depends on IDF_TARGET_ESP32
  4. bool "Support ESP32 internal EMAC controller"
  5. default y
  6. help
  7. ESP32 integrates a 10/100M Ethernet MAC controller.
  8. if ETH_USE_ESP32_EMAC
  9. choice ETH_PHY_INTERFACE
  10. prompt "PHY interface"
  11. default ETH_PHY_INTERFACE_RMII
  12. help
  13. Select the communication interface between MAC and PHY chip.
  14. config ETH_PHY_INTERFACE_RMII
  15. bool "Reduced Media Independent Interface (RMII)"
  16. config ETH_PHY_INTERFACE_MII
  17. bool "Media Independent Interface (MII)"
  18. endchoice
  19. if ETH_PHY_INTERFACE_RMII
  20. choice ETH_RMII_CLK_MODE
  21. prompt "RMII clock mode"
  22. default ETH_RMII_CLK_INPUT
  23. help
  24. Select external or internal RMII clock.
  25. config ETH_RMII_CLK_INPUT
  26. bool "Input RMII clock from external"
  27. help
  28. MAC will get RMII clock from outside.
  29. Note that ESP32 only supports GPIO0 to input the RMII clock.
  30. config ETH_RMII_CLK_OUTPUT
  31. bool "Output RMII clock from internal"
  32. help
  33. ESP32 can generate RMII clock by internal APLL.
  34. This clock can be routed to the external PHY device.
  35. ESP32 supports to route the RMII clock to GPIO0/16/17.
  36. endchoice
  37. endif
  38. if ETH_RMII_CLK_INPUT
  39. config ETH_RMII_CLK_IN_GPIO
  40. int
  41. range 0 0
  42. default 0
  43. help
  44. ESP32 only supports GPIO0 to input the RMII clock.
  45. endif
  46. if ETH_RMII_CLK_OUTPUT
  47. config ETH_RMII_CLK_OUTPUT_GPIO0
  48. bool "Output RMII clock from GPIO0 (Experimental!)"
  49. default n
  50. help
  51. GPIO0 can be set to output a pre-divided PLL clock (test only!).
  52. Enabling this option will configure GPIO0 to output a 50MHz clock.
  53. In fact this clock doesn't have directly relationship with EMAC peripheral.
  54. Sometimes this clock won't work well with your PHY chip. You might need to
  55. add some extra devices after GPIO0 (e.g. inverter).
  56. Note that outputting RMII clock on GPIO0 is an experimental practice.
  57. If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability.
  58. if !ETH_RMII_CLK_OUTPUT_GPIO0
  59. config ETH_RMII_CLK_OUT_GPIO
  60. int "RMII clock GPIO number"
  61. range 16 17
  62. default 17
  63. help
  64. Set the GPIO number to output RMII Clock.
  65. endif
  66. endif
  67. config ETH_DMA_BUFFER_SIZE
  68. int "Ethernet DMA buffer size (Byte)"
  69. range 256 1600
  70. default 512
  71. help
  72. Set the size of each buffer used by Ethernet MAC DMA.
  73. config ETH_DMA_RX_BUFFER_NUM
  74. int "Amount of Ethernet DMA Rx buffers"
  75. range 3 30
  76. default 10
  77. help
  78. Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
  79. Larger number of buffers could increase throughput somehow.
  80. config ETH_DMA_TX_BUFFER_NUM
  81. int "Amount of Ethernet DMA Tx buffers"
  82. range 3 30
  83. default 10
  84. help
  85. Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE.
  86. Larger number of buffers could increase throughput somehow.
  87. endif
  88. menuconfig ETH_USE_SPI_ETHERNET
  89. bool "Support SPI to Ethernet Module"
  90. default y
  91. help
  92. ESP-IDF can also support some SPI-Ethernet module.
  93. if ETH_USE_SPI_ETHERNET
  94. config ETH_SPI_ETHERNET_DM9051
  95. bool "Use DM9051"
  96. default y
  97. help
  98. DM9051 is a fast Ethernet controller with an SPI interface.
  99. It's also integrated with a 10/100M PHY and MAC.
  100. Set true to enable DM9051 driver.
  101. endif
  102. endmenu