adc_hal.h 6.5 KB

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  1. #pragma once
  2. #include "hal/adc_types.h"
  3. #include "hal/adc_ll.h"
  4. typedef struct {
  5. bool conv_limit_en;
  6. uint32_t conv_limit_num;
  7. uint32_t clk_div;
  8. uint32_t adc1_pattern_len;
  9. uint32_t adc2_pattern_len;
  10. adc_ll_pattern_table_t *adc1_pattern;
  11. adc_ll_pattern_table_t *adc2_pattern;
  12. adc_ll_convert_mode_t conv_mode;
  13. adc_ll_dig_output_format_t format;
  14. } adc_hal_dig_config_t;
  15. /*---------------------------------------------------------------
  16. Common setting
  17. ---------------------------------------------------------------*/
  18. /**
  19. * ADC module initialization.
  20. */
  21. void adc_hal_init(void);
  22. /**
  23. * Set adc sample cycle for digital controller.
  24. *
  25. * @note Normally, please use default value.
  26. * @param sample_cycle Cycles between DIG ADC controller start ADC sensor and beginning to receive data from sensor.
  27. * Range: 2 ~ 0xFF.
  28. */
  29. #define adc_hal_dig_set_sample_cycle(sample_cycle) adc_ll_dig_set_sample_cycle(sample_cycle)
  30. /**
  31. * Set ADC module power management.
  32. *
  33. * @prarm manage Set ADC power status.
  34. */
  35. #define adc_hal_set_power_manage(manage) adc_ll_set_power_manage(manage)
  36. /**
  37. * Get ADC module power management.
  38. *
  39. * @return
  40. * - ADC power status.
  41. */
  42. #define adc_hal_get_power_manage() adc_ll_get_power_manage()
  43. /**
  44. * ADC module clock division factor setting. ADC clock devided from APB clock.
  45. *
  46. * @prarm div Division factor.
  47. */
  48. #define adc_hal_set_clk_div(div) adc_ll_set_clk_div(div)
  49. /**
  50. * ADC module output data invert or not.
  51. *
  52. * @prarm adc_n ADC unit.
  53. */
  54. #define adc_hal_output_invert(adc_n, inv_en) adc_ll_output_invert(adc_n, inv_en)
  55. /**
  56. * Set ADC module controller.
  57. * There are five SAR ADC controllers:
  58. * Two digital controller: Continuous conversion mode (DMA). High performance with multiple channel scan modes;
  59. * Two RTC controller: Single conversion modes (Polling). For low power purpose working during deep sleep;
  60. * the other is dedicated for Power detect (PWDET / PKDET), Only support ADC2.
  61. *
  62. * @prarm adc_n ADC unit.
  63. * @prarm ctrl ADC controller.
  64. */
  65. #define adc_hal_set_controller(adc_n, ctrl) adc_ll_set_controller(adc_n, ctrl)
  66. /**
  67. * Set the attenuation of a particular channel on ADCn.
  68. *
  69. * @note For any given channel, this function must be called before the first time conversion.
  70. *
  71. * The default ADC full-scale voltage is 1.1V. To read higher voltages (up to the pin maximum voltage,
  72. * usually 3.3V) requires setting >0dB signal attenuation for that ADC channel.
  73. *
  74. * When VDD_A is 3.3V:
  75. *
  76. * - 0dB attenuaton (ADC_ATTEN_DB_0) gives full-scale voltage 1.1V
  77. * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) gives full-scale voltage 1.5V
  78. * - 6dB attenuation (ADC_ATTEN_DB_6) gives full-scale voltage 2.2V
  79. * - 11dB attenuation (ADC_ATTEN_DB_11) gives full-scale voltage 3.9V (see note below)
  80. *
  81. * @note The full-scale voltage is the voltage corresponding to a maximum reading (depending on ADC1 configured
  82. * bit width, this value is: 4095 for 12-bits, 2047 for 11-bits, 1023 for 10-bits, 511 for 9 bits.)
  83. *
  84. * @note At 11dB attenuation the maximum voltage is limited by VDD_A, not the full scale voltage.
  85. *
  86. * Due to ADC characteristics, most accurate results are obtained within the following approximate voltage ranges:
  87. *
  88. * - 0dB attenuaton (ADC_ATTEN_DB_0) between 100 and 950mV
  89. * - 2.5dB attenuation (ADC_ATTEN_DB_2_5) between 100 and 1250mV
  90. * - 6dB attenuation (ADC_ATTEN_DB_6) between 150 to 1750mV
  91. * - 11dB attenuation (ADC_ATTEN_DB_11) between 150 to 2450mV
  92. *
  93. * For maximum accuracy, use the ADC calibration APIs and measure voltages within these recommended ranges.
  94. *
  95. * @prarm adc_n ADC unit.
  96. * @prarm channel ADCn channel number.
  97. * @prarm atten The attenuation option.
  98. */
  99. #define adc_hal_set_atten(adc_n, channel, atten) adc_ll_set_atten(adc_n, channel, atten)
  100. /**
  101. * Close ADC AMP module if don't use it for power save.
  102. */
  103. #define adc_hal_amp_disable() adc_ll_amp_disable()
  104. /*---------------------------------------------------------------
  105. PWDET(Power detect) controller setting
  106. ---------------------------------------------------------------*/
  107. /**
  108. * Set adc cct for PWDET controller.
  109. *
  110. * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
  111. * @prarm cct Range: 0 ~ 7.
  112. */
  113. #define adc_hal_pwdet_set_cct(cct) adc_ll_pwdet_set_cct(cct)
  114. /**
  115. * Get adc cct for PWDET controller.
  116. *
  117. * @note Capacitor tuning of the PA power monitor. cct set to the same value with PHY.
  118. * @return cct Range: 0 ~ 7.
  119. */
  120. #define adc_hal_pwdet_get_cct() adc_ll_pwdet_get_cct()
  121. /*---------------------------------------------------------------
  122. RTC controller setting
  123. ---------------------------------------------------------------*/
  124. /**
  125. * Set adc output data format for RTC controller.
  126. *
  127. * @prarm adc_n ADC unit.
  128. * @prarm bits Output data bits width option.
  129. */
  130. #define adc_hal_rtc_set_output_format(adc_n, bits) adc_ll_rtc_set_output_format(adc_n, bits)
  131. /**
  132. * Get the converted value for each ADCn for RTC controller.
  133. *
  134. * @note It may be block to wait conversion finish.
  135. * @prarm adc_n ADC unit.
  136. * @return
  137. * - Converted value.
  138. */
  139. int adc_hal_convert(adc_ll_num_t adc_n, int channel);
  140. /*---------------------------------------------------------------
  141. Digital controller setting
  142. ---------------------------------------------------------------*/
  143. /**
  144. * Setting the digital controller.
  145. *
  146. * @prarm adc_hal_dig_config_t cfg Pointer to digital controller paramter.
  147. */
  148. void adc_hal_dig_controller_config(const adc_hal_dig_config_t *cfg);
  149. /**
  150. * Set I2S DMA data source for digital controller.
  151. *
  152. * @param src i2s data source.
  153. */
  154. #define adc_hal_dig_set_data_source(src) adc_ll_dig_set_data_source(src)
  155. /*---------------------------------------------------------------
  156. Hall sensor setting
  157. ---------------------------------------------------------------*/
  158. /**
  159. * Enable hall sensor.
  160. */
  161. #define adc_hal_hall_enable() adc_ll_hall_enable()
  162. /**
  163. * Disable hall sensor.
  164. */
  165. #define adc_hal_hall_disable() adc_ll_hall_disable()
  166. /**
  167. * Start hall convert and return the hall value.
  168. *
  169. * @return Hall value.
  170. */
  171. int adc_hal_hall_convert(void);
  172. /**
  173. * @brief Output ADC2 reference voltage to gpio
  174. *
  175. * This function utilizes the testing mux exclusive to ADC2 to route the
  176. * reference voltage one of ADC2's channels.
  177. *
  178. * @param[in] io GPIO number
  179. * @return
  180. * - true: v_ref successfully routed to selected gpio
  181. * - false: Unsupported gpio
  182. */
  183. #define adc_hal_vref_output(io) adc_ll_vref_output(io)