vfs_uart.c 29 KB

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  1. // Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <string.h>
  15. #include <stdbool.h>
  16. #include <stdarg.h>
  17. #include <sys/errno.h>
  18. #include <sys/lock.h>
  19. #include <sys/fcntl.h>
  20. #include <sys/param.h>
  21. #include "esp_vfs.h"
  22. #include "esp_vfs_dev.h"
  23. #include "esp_attr.h"
  24. #include "soc/uart_periph.h"
  25. #include "driver/uart.h"
  26. #include "sdkconfig.h"
  27. #include "driver/uart_select.h"
  28. #if CONFIG_IDF_TARGET_ESP32
  29. #include "esp32/rom/uart.h"
  30. #elif CONFIG_IDF_TARGET_ESP32S2BETA
  31. #include "esp32s2beta/rom/uart.h"
  32. #endif
  33. // TODO: make the number of UARTs chip dependent
  34. #define UART_NUM SOC_UART_NUM
  35. // Token signifying that no character is available
  36. #define NONE -1
  37. #if CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF
  38. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CRLF
  39. #elif CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR
  40. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CR
  41. #else
  42. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_LF
  43. #endif
  44. #if CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF
  45. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CRLF
  46. #elif CONFIG_NEWLIB_STDIN_LINE_ENDING_CR
  47. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CR
  48. #else
  49. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_LF
  50. #endif
  51. // UART write bytes function type
  52. typedef void (*tx_func_t)(int, int);
  53. // UART read bytes function type
  54. typedef int (*rx_func_t)(int);
  55. // Basic functions for sending and receiving bytes over UART
  56. static void uart_tx_char(int fd, int c);
  57. static int uart_rx_char(int fd);
  58. // Functions for sending and receiving bytes which use UART driver
  59. static void uart_tx_char_via_driver(int fd, int c);
  60. static int uart_rx_char_via_driver(int fd);
  61. typedef struct {
  62. // Pointers to UART peripherals
  63. uart_dev_t* uart;
  64. // One-character buffer used for newline conversion code, per UART
  65. int peek_char;
  66. // per-UART locks, lazily initialized
  67. _lock_t read_lock;
  68. _lock_t write_lock;
  69. // Per-UART non-blocking flag. Note: default implementation does not honor this
  70. // flag, all reads are non-blocking. This option becomes effective if UART
  71. // driver is used.
  72. bool non_blocking;
  73. // Newline conversion mode when transmitting
  74. esp_line_endings_t tx_mode;
  75. // Newline conversion mode when receiving
  76. esp_line_endings_t rx_mode;
  77. // Functions used to write bytes to UART. Default to "basic" functions.
  78. tx_func_t tx_func;
  79. // Functions used to read bytes from UART. Default to "basic" functions.
  80. rx_func_t rx_func;
  81. } vfs_uart_context_t;
  82. #define VFS_CTX_DEFAULT_VAL(uart_dev) (vfs_uart_context_t) {\
  83. .uart = (uart_dev),\
  84. .peek_char = NONE,\
  85. .tx_mode = DEFAULT_TX_MODE,\
  86. .rx_mode = DEFAULT_RX_MODE,\
  87. .tx_func = uart_tx_char,\
  88. .rx_func = uart_rx_char,\
  89. }
  90. //If the context should be dynamically initialized, remove this structure
  91. //and point s_ctx to allocated data.
  92. static vfs_uart_context_t s_context[UART_NUM] = {
  93. VFS_CTX_DEFAULT_VAL(&UART0),
  94. VFS_CTX_DEFAULT_VAL(&UART1),
  95. #if UART_NUM > 2
  96. VFS_CTX_DEFAULT_VAL(&UART2),
  97. #endif
  98. };
  99. static vfs_uart_context_t* s_ctx[UART_NUM] = {
  100. &s_context[0],
  101. &s_context[1],
  102. #if UART_NUM > 2
  103. &s_context[2],
  104. #endif
  105. };
  106. typedef struct {
  107. esp_vfs_select_sem_t select_sem;
  108. fd_set *readfds;
  109. fd_set *writefds;
  110. fd_set *errorfds;
  111. fd_set readfds_orig;
  112. fd_set writefds_orig;
  113. fd_set errorfds_orig;
  114. } uart_select_args_t;
  115. static uart_select_args_t **s_registered_selects = NULL;
  116. static int s_registered_select_num = 0;
  117. static portMUX_TYPE s_registered_select_lock = portMUX_INITIALIZER_UNLOCKED;
  118. static esp_err_t uart_end_select(void *end_select_args);
  119. static int uart_open(const char * path, int flags, int mode)
  120. {
  121. // this is fairly primitive, we should check if file is opened read only,
  122. // and error out if write is requested
  123. int fd = -1;
  124. if (strcmp(path, "/0") == 0) {
  125. fd = 0;
  126. } else if (strcmp(path, "/1") == 0) {
  127. fd = 1;
  128. } else if (strcmp(path, "/2") == 0) {
  129. fd = 2;
  130. } else {
  131. errno = ENOENT;
  132. return fd;
  133. }
  134. s_ctx[fd]->non_blocking = ((flags & O_NONBLOCK) == O_NONBLOCK);
  135. return fd;
  136. }
  137. static void uart_tx_char(int fd, int c)
  138. {
  139. uart_dev_t* uart = s_ctx[fd]->uart;
  140. while (uart->status.txfifo_cnt >= 127) {
  141. ;
  142. }
  143. #if CONFIG_IDF_TARGET_ESP32
  144. uart->fifo.rw_byte = c;
  145. #elif CONFIG_IDF_TARGET_ESP32S2BETA
  146. uart->ahb_fifo.rw_byte = c;
  147. #endif
  148. }
  149. static void uart_tx_char_via_driver(int fd, int c)
  150. {
  151. char ch = (char) c;
  152. uart_write_bytes(fd, &ch, 1);
  153. }
  154. static int uart_rx_char(int fd)
  155. {
  156. uart_dev_t* uart = s_ctx[fd]->uart;
  157. if (uart->status.rxfifo_cnt == 0) {
  158. return NONE;
  159. }
  160. #if CONFIG_IDF_TARGET_ESP32
  161. return uart->fifo.rw_byte;
  162. #elif CONFIG_IDF_TARGET_ESP32S2BETA
  163. return READ_PERI_REG(UART_FIFO_AHB_REG(fd));
  164. #endif
  165. }
  166. static int uart_rx_char_via_driver(int fd)
  167. {
  168. uint8_t c;
  169. int timeout = s_ctx[fd]->non_blocking ? 0 : portMAX_DELAY;
  170. int n = uart_read_bytes(fd, &c, 1, timeout);
  171. if (n <= 0) {
  172. return NONE;
  173. }
  174. return c;
  175. }
  176. static ssize_t uart_write(int fd, const void * data, size_t size)
  177. {
  178. assert(fd >=0 && fd < 3);
  179. const char *data_c = (const char *)data;
  180. /* Even though newlib does stream locking on each individual stream, we need
  181. * a dedicated UART lock if two streams (stdout and stderr) point to the
  182. * same UART.
  183. */
  184. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  185. for (size_t i = 0; i < size; i++) {
  186. int c = data_c[i];
  187. if (c == '\n' && s_ctx[fd]->tx_mode != ESP_LINE_ENDINGS_LF) {
  188. s_ctx[fd]->tx_func(fd, '\r');
  189. if (s_ctx[fd]->tx_mode == ESP_LINE_ENDINGS_CR) {
  190. continue;
  191. }
  192. }
  193. s_ctx[fd]->tx_func(fd, c);
  194. }
  195. _lock_release_recursive(&s_ctx[fd]->write_lock);
  196. return size;
  197. }
  198. /* Helper function which returns a previous character or reads a new one from
  199. * UART. Previous character can be returned ("pushed back") using
  200. * uart_return_char function.
  201. */
  202. static int uart_read_char(int fd)
  203. {
  204. /* return character from peek buffer, if it is there */
  205. if (s_ctx[fd]->peek_char != NONE) {
  206. int c = s_ctx[fd]->peek_char;
  207. s_ctx[fd]->peek_char = NONE;
  208. return c;
  209. }
  210. return s_ctx[fd]->rx_func(fd);
  211. }
  212. /* Push back a character; it will be returned by next call to uart_read_char */
  213. static void uart_return_char(int fd, int c)
  214. {
  215. assert(s_ctx[fd]->peek_char == NONE);
  216. s_ctx[fd]->peek_char = c;
  217. }
  218. static ssize_t uart_read(int fd, void* data, size_t size)
  219. {
  220. assert(fd >=0 && fd < 3);
  221. char *data_c = (char *) data;
  222. size_t received = 0;
  223. _lock_acquire_recursive(&s_ctx[fd]->read_lock);
  224. while (received < size) {
  225. int c = uart_read_char(fd);
  226. if (c == '\r') {
  227. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  228. c = '\n';
  229. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  230. /* look ahead */
  231. int c2 = uart_read_char(fd);
  232. if (c2 == NONE) {
  233. /* could not look ahead, put the current character back */
  234. uart_return_char(fd, c);
  235. break;
  236. }
  237. if (c2 == '\n') {
  238. /* this was \r\n sequence. discard \r, return \n */
  239. c = '\n';
  240. } else {
  241. /* \r followed by something else. put the second char back,
  242. * it will be processed on next iteration. return \r now.
  243. */
  244. uart_return_char(fd, c2);
  245. }
  246. }
  247. } else if (c == NONE) {
  248. break;
  249. }
  250. data_c[received] = (char) c;
  251. ++received;
  252. if (c == '\n') {
  253. break;
  254. }
  255. }
  256. _lock_release_recursive(&s_ctx[fd]->read_lock);
  257. if (received > 0) {
  258. return received;
  259. }
  260. errno = EWOULDBLOCK;
  261. return -1;
  262. }
  263. static int uart_fstat(int fd, struct stat * st)
  264. {
  265. assert(fd >=0 && fd < 3);
  266. st->st_mode = S_IFCHR;
  267. return 0;
  268. }
  269. static int uart_close(int fd)
  270. {
  271. assert(fd >=0 && fd < 3);
  272. return 0;
  273. }
  274. static int uart_fcntl(int fd, int cmd, int arg)
  275. {
  276. assert(fd >=0 && fd < 3);
  277. int result = 0;
  278. if (cmd == F_GETFL) {
  279. if (s_ctx[fd]->non_blocking) {
  280. result |= O_NONBLOCK;
  281. }
  282. } else if (cmd == F_SETFL) {
  283. s_ctx[fd]->non_blocking = (arg & O_NONBLOCK) != 0;
  284. } else {
  285. // unsupported operation
  286. result = -1;
  287. errno = ENOSYS;
  288. }
  289. return result;
  290. }
  291. static int uart_access(const char *path, int amode)
  292. {
  293. int ret = -1;
  294. if (strcmp(path, "/0") == 0 || strcmp(path, "/1") == 0 || strcmp(path, "/2") == 0) {
  295. if (F_OK == amode) {
  296. ret = 0; //path exists
  297. } else {
  298. if ((((amode & R_OK) == R_OK) || ((amode & W_OK) == W_OK)) && ((amode & X_OK) != X_OK)) {
  299. ret = 0; //path is readable and/or writable but not executable
  300. } else {
  301. errno = EACCES;
  302. }
  303. }
  304. } else {
  305. errno = ENOENT;
  306. }
  307. return ret;
  308. }
  309. static int uart_fsync(int fd)
  310. {
  311. assert(fd >= 0 && fd < 3);
  312. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  313. uart_tx_wait_idle((uint8_t) fd);
  314. _lock_release_recursive(&s_ctx[fd]->write_lock);
  315. return 0;
  316. }
  317. static esp_err_t register_select(uart_select_args_t *args)
  318. {
  319. esp_err_t ret = ESP_ERR_INVALID_ARG;
  320. if (args) {
  321. portENTER_CRITICAL(&s_registered_select_lock);
  322. const int new_size = s_registered_select_num + 1;
  323. uart_select_args_t **new_selects;
  324. if ((new_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *))) == NULL) {
  325. ret = ESP_ERR_NO_MEM;
  326. } else {
  327. s_registered_selects = new_selects;
  328. s_registered_selects[s_registered_select_num] = args;
  329. s_registered_select_num = new_size;
  330. ret = ESP_OK;
  331. }
  332. portEXIT_CRITICAL(&s_registered_select_lock);
  333. }
  334. return ret;
  335. }
  336. static esp_err_t unregister_select(uart_select_args_t *args)
  337. {
  338. esp_err_t ret = ESP_OK;
  339. if (args) {
  340. ret = ESP_ERR_INVALID_STATE;
  341. portENTER_CRITICAL(&s_registered_select_lock);
  342. for (int i = 0; i < s_registered_select_num; ++i) {
  343. if (s_registered_selects[i] == args) {
  344. const int new_size = s_registered_select_num - 1;
  345. // The item is removed by overwriting it with the last item. The subsequent rellocation will drop the
  346. // last item.
  347. s_registered_selects[i] = s_registered_selects[new_size];
  348. s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *));
  349. // Shrinking a buffer with realloc is guaranteed to succeed.
  350. s_registered_select_num = new_size;
  351. ret = ESP_OK;
  352. break;
  353. }
  354. }
  355. portEXIT_CRITICAL(&s_registered_select_lock);
  356. }
  357. return ret;
  358. }
  359. static void select_notif_callback_isr(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
  360. {
  361. portENTER_CRITICAL_ISR(&s_registered_select_lock);
  362. for (int i = 0; i < s_registered_select_num; ++i) {
  363. uart_select_args_t *args = s_registered_selects[i];
  364. if (args) {
  365. switch (uart_select_notif) {
  366. case UART_SELECT_READ_NOTIF:
  367. if (FD_ISSET(uart_num, &args->readfds_orig)) {
  368. FD_SET(uart_num, args->readfds);
  369. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  370. }
  371. break;
  372. case UART_SELECT_WRITE_NOTIF:
  373. if (FD_ISSET(uart_num, &args->writefds_orig)) {
  374. FD_SET(uart_num, args->writefds);
  375. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  376. }
  377. break;
  378. case UART_SELECT_ERROR_NOTIF:
  379. if (FD_ISSET(uart_num, &args->errorfds_orig)) {
  380. FD_SET(uart_num, args->errorfds);
  381. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  382. }
  383. break;
  384. }
  385. }
  386. }
  387. portEXIT_CRITICAL_ISR(&s_registered_select_lock);
  388. }
  389. static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds,
  390. esp_vfs_select_sem_t select_sem, void **end_select_args)
  391. {
  392. const int max_fds = MIN(nfds, UART_NUM);
  393. *end_select_args = NULL;
  394. for (int i = 0; i < max_fds; ++i) {
  395. if (FD_ISSET(i, readfds) || FD_ISSET(i, writefds) || FD_ISSET(i, exceptfds)) {
  396. if (!uart_is_driver_installed(i)) {
  397. return ESP_ERR_INVALID_STATE;
  398. }
  399. }
  400. }
  401. uart_select_args_t *args = malloc(sizeof(uart_select_args_t));
  402. if (args == NULL) {
  403. return ESP_ERR_NO_MEM;
  404. }
  405. args->select_sem = select_sem;
  406. args->readfds = readfds;
  407. args->writefds = writefds;
  408. args->errorfds = exceptfds;
  409. args->readfds_orig = *readfds; // store the original values because they will be set to zero
  410. args->writefds_orig = *writefds;
  411. args->errorfds_orig = *exceptfds;
  412. FD_ZERO(readfds);
  413. FD_ZERO(writefds);
  414. FD_ZERO(exceptfds);
  415. portENTER_CRITICAL(uart_get_selectlock());
  416. //uart_set_select_notif_callback sets the callbacks in UART ISR
  417. for (int i = 0; i < max_fds; ++i) {
  418. if (FD_ISSET(i, &args->readfds_orig) || FD_ISSET(i, &args->writefds_orig) || FD_ISSET(i, &args->errorfds_orig)) {
  419. uart_set_select_notif_callback(i, select_notif_callback_isr);
  420. }
  421. }
  422. for (int i = 0; i < max_fds; ++i) {
  423. if (FD_ISSET(i, &args->readfds_orig)) {
  424. size_t buffered_size;
  425. if (uart_get_buffered_data_len(i, &buffered_size) == ESP_OK && buffered_size > 0) {
  426. // signalize immediately when data is buffered
  427. FD_SET(i, readfds);
  428. esp_vfs_select_triggered(args->select_sem);
  429. }
  430. }
  431. }
  432. esp_err_t ret = register_select(args);
  433. if (ret != ESP_OK) {
  434. portEXIT_CRITICAL(uart_get_selectlock());
  435. free(args);
  436. return ret;
  437. }
  438. portEXIT_CRITICAL(uart_get_selectlock());
  439. *end_select_args = args;
  440. return ESP_OK;
  441. }
  442. static esp_err_t uart_end_select(void *end_select_args)
  443. {
  444. uart_select_args_t *args = end_select_args;
  445. portENTER_CRITICAL(uart_get_selectlock());
  446. esp_err_t ret = unregister_select(args);
  447. for (int i = 0; i < UART_NUM; ++i) {
  448. uart_set_select_notif_callback(i, NULL);
  449. }
  450. portEXIT_CRITICAL(uart_get_selectlock());
  451. if (args) {
  452. free(args);
  453. }
  454. return ret;
  455. }
  456. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  457. static int uart_tcsetattr(int fd, int optional_actions, const struct termios *p)
  458. {
  459. if (fd < 0 || fd >= UART_NUM) {
  460. errno = EBADF;
  461. return -1;
  462. }
  463. if (p == NULL) {
  464. errno = EINVAL;
  465. return -1;
  466. }
  467. switch (optional_actions) {
  468. case TCSANOW:
  469. // nothing to do
  470. break;
  471. case TCSADRAIN:
  472. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  473. errno = EINVAL;
  474. return -1;
  475. }
  476. /* FALLTHRU */
  477. case TCSAFLUSH:
  478. if (uart_flush_input(fd) != ESP_OK) {
  479. errno = EINVAL;
  480. return -1;
  481. }
  482. break;
  483. default:
  484. errno = EINVAL;
  485. return -1;
  486. }
  487. if (p->c_iflag & IGNCR) {
  488. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CRLF;
  489. } else if (p->c_iflag & ICRNL) {
  490. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CR;
  491. } else {
  492. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_LF;
  493. }
  494. // output line endings are not supported because there is no alternative in termios for converting LF to CR
  495. {
  496. uart_word_length_t data_bits;
  497. const tcflag_t csize_bits = p->c_cflag & CSIZE;
  498. switch (csize_bits) {
  499. case CS5:
  500. data_bits = UART_DATA_5_BITS;
  501. break;
  502. case CS6:
  503. data_bits = UART_DATA_6_BITS;
  504. break;
  505. case CS7:
  506. data_bits = UART_DATA_7_BITS;
  507. break;
  508. case CS8:
  509. data_bits = UART_DATA_8_BITS;
  510. break;
  511. default:
  512. errno = EINVAL;
  513. return -1;
  514. }
  515. if (uart_set_word_length(fd, data_bits) != ESP_OK) {
  516. errno = EINVAL;
  517. return -1;
  518. }
  519. }
  520. if (uart_set_stop_bits(fd, (p->c_cflag & CSTOPB) ? UART_STOP_BITS_2 : UART_STOP_BITS_1) != ESP_OK) {
  521. errno = EINVAL;
  522. return -1;
  523. }
  524. if (uart_set_parity(fd, (p->c_cflag & PARENB) ?
  525. ((p->c_cflag & PARODD) ? UART_PARITY_ODD : UART_PARITY_EVEN)
  526. :
  527. UART_PARITY_DISABLE) != ESP_OK) {
  528. errno = EINVAL;
  529. return -1;
  530. }
  531. if (p->c_cflag & (CBAUD | CBAUDEX)) {
  532. if (p->c_ispeed != p->c_ospeed) {
  533. errno = EINVAL;
  534. return -1;
  535. } else {
  536. uint32_t b;
  537. if (p->c_cflag & BOTHER) {
  538. b = p->c_ispeed;
  539. } else {
  540. switch (p->c_ispeed) {
  541. case B0:
  542. b = 0;
  543. break;
  544. case B50:
  545. b = 50;
  546. break;
  547. case B75:
  548. b = 75;
  549. break;
  550. case B110:
  551. b = 110;
  552. break;
  553. case B134:
  554. b = 134;
  555. break;
  556. case B150:
  557. b = 150;
  558. break;
  559. case B200:
  560. b = 200;
  561. break;
  562. case B300:
  563. b = 300;
  564. break;
  565. case B600:
  566. b = 600;
  567. break;
  568. case B1200:
  569. b = 1200;
  570. break;
  571. case B1800:
  572. b = 1800;
  573. break;
  574. case B2400:
  575. b = 2400;
  576. break;
  577. case B4800:
  578. b = 4800;
  579. break;
  580. case B9600:
  581. b = 9600;
  582. break;
  583. case B19200:
  584. b = 19200;
  585. break;
  586. case B38400:
  587. b = 38400;
  588. break;
  589. case B57600:
  590. b = 57600;
  591. break;
  592. case B115200:
  593. b = 115200;
  594. break;
  595. case B230400:
  596. b = 230400;
  597. break;
  598. case B460800:
  599. b = 460800;
  600. break;
  601. case B500000:
  602. b = 500000;
  603. break;
  604. case B576000:
  605. b = 576000;
  606. break;
  607. case B921600:
  608. b = 921600;
  609. break;
  610. case B1000000:
  611. b = 1000000;
  612. break;
  613. case B1152000:
  614. b = 1152000;
  615. break;
  616. case B1500000:
  617. b = 1500000;
  618. break;
  619. case B2000000:
  620. b = 2000000;
  621. break;
  622. case B2500000:
  623. b = 2500000;
  624. break;
  625. case B3000000:
  626. b = 3000000;
  627. break;
  628. case B3500000:
  629. b = 3500000;
  630. break;
  631. case B4000000:
  632. b = 4000000;
  633. break;
  634. default:
  635. errno = EINVAL;
  636. return -1;
  637. }
  638. }
  639. if (uart_set_baudrate(fd, b) != ESP_OK) {
  640. errno = EINVAL;
  641. return -1;
  642. }
  643. }
  644. }
  645. return 0;
  646. }
  647. static int uart_tcgetattr(int fd, struct termios *p)
  648. {
  649. if (fd < 0 || fd >= UART_NUM) {
  650. errno = EBADF;
  651. return -1;
  652. }
  653. if (p == NULL) {
  654. errno = EINVAL;
  655. return -1;
  656. }
  657. memset(p, 0, sizeof(struct termios));
  658. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  659. p->c_iflag |= IGNCR;
  660. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  661. p->c_iflag |= ICRNL;
  662. }
  663. {
  664. uart_word_length_t data_bits;
  665. if (uart_get_word_length(fd, &data_bits) != ESP_OK) {
  666. errno = EINVAL;
  667. return -1;
  668. }
  669. p->c_cflag &= (~CSIZE);
  670. switch (data_bits) {
  671. case UART_DATA_5_BITS:
  672. p->c_cflag |= CS5;
  673. break;
  674. case UART_DATA_6_BITS:
  675. p->c_cflag |= CS6;
  676. break;
  677. case UART_DATA_7_BITS:
  678. p->c_cflag |= CS7;
  679. break;
  680. case UART_DATA_8_BITS:
  681. p->c_cflag |= CS8;
  682. break;
  683. default:
  684. errno = ENOSYS;
  685. return -1;
  686. }
  687. }
  688. {
  689. uart_stop_bits_t stop_bits;
  690. if (uart_get_stop_bits(fd, &stop_bits) != ESP_OK) {
  691. errno = EINVAL;
  692. return -1;
  693. }
  694. switch (stop_bits) {
  695. case UART_STOP_BITS_1:
  696. // nothing to do
  697. break;
  698. case UART_STOP_BITS_2:
  699. p->c_cflag |= CSTOPB;
  700. break;
  701. default:
  702. // UART_STOP_BITS_1_5 is unsupported by termios
  703. errno = ENOSYS;
  704. return -1;
  705. }
  706. }
  707. {
  708. uart_parity_t parity_mode;
  709. if (uart_get_parity(fd, &parity_mode) != ESP_OK) {
  710. errno = EINVAL;
  711. return -1;
  712. }
  713. switch (parity_mode) {
  714. case UART_PARITY_EVEN:
  715. p->c_cflag |= PARENB;
  716. break;
  717. case UART_PARITY_ODD:
  718. p->c_cflag |= (PARENB | PARODD);
  719. break;
  720. case UART_PARITY_DISABLE:
  721. // nothing to do
  722. break;
  723. default:
  724. errno = ENOSYS;
  725. return -1;
  726. }
  727. }
  728. {
  729. uint32_t baudrate;
  730. if (uart_get_baudrate(fd, &baudrate) != ESP_OK) {
  731. errno = EINVAL;
  732. return -1;
  733. }
  734. p->c_cflag |= (CBAUD | CBAUDEX);
  735. speed_t sp;
  736. switch (baudrate) {
  737. case 0:
  738. sp = B0;
  739. break;
  740. case 50:
  741. sp = B50;
  742. break;
  743. case 75:
  744. sp = B75;
  745. break;
  746. case 110:
  747. sp = B110;
  748. break;
  749. case 134:
  750. sp = B134;
  751. break;
  752. case 150:
  753. sp = B150;
  754. break;
  755. case 200:
  756. sp = B200;
  757. break;
  758. case 300:
  759. sp = B300;
  760. break;
  761. case 600:
  762. sp = B600;
  763. break;
  764. case 1200:
  765. sp = B1200;
  766. break;
  767. case 1800:
  768. sp = B1800;
  769. break;
  770. case 2400:
  771. sp = B2400;
  772. break;
  773. case 4800:
  774. sp = B4800;
  775. break;
  776. case 9600:
  777. sp = B9600;
  778. break;
  779. case 19200:
  780. sp = B19200;
  781. break;
  782. case 38400:
  783. sp = B38400;
  784. break;
  785. case 57600:
  786. sp = B57600;
  787. break;
  788. case 115200:
  789. sp = B115200;
  790. break;
  791. case 230400:
  792. sp = B230400;
  793. break;
  794. case 460800:
  795. sp = B460800;
  796. break;
  797. case 500000:
  798. sp = B500000;
  799. break;
  800. case 576000:
  801. sp = B576000;
  802. break;
  803. case 921600:
  804. sp = B921600;
  805. break;
  806. case 1000000:
  807. sp = B1000000;
  808. break;
  809. case 1152000:
  810. sp = B1152000;
  811. break;
  812. case 1500000:
  813. sp = B1500000;
  814. break;
  815. case 2000000:
  816. sp = B2000000;
  817. break;
  818. case 2500000:
  819. sp = B2500000;
  820. break;
  821. case 3000000:
  822. sp = B3000000;
  823. break;
  824. case 3500000:
  825. sp = B3500000;
  826. break;
  827. case 4000000:
  828. sp = B4000000;
  829. break;
  830. default:
  831. p->c_cflag |= BOTHER;
  832. sp = baudrate;
  833. break;
  834. }
  835. p->c_ispeed = p->c_ospeed = sp;
  836. }
  837. return 0;
  838. }
  839. static int uart_tcdrain(int fd)
  840. {
  841. if (fd < 0 || fd >= UART_NUM) {
  842. errno = EBADF;
  843. return -1;
  844. }
  845. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  846. errno = EINVAL;
  847. return -1;
  848. }
  849. return 0;
  850. }
  851. static int uart_tcflush(int fd, int select)
  852. {
  853. if (fd < 0 || fd >= UART_NUM) {
  854. errno = EBADF;
  855. return -1;
  856. }
  857. if (select == TCIFLUSH) {
  858. if (uart_flush_input(fd) != ESP_OK) {
  859. errno = EINVAL;
  860. return -1;
  861. }
  862. } else {
  863. // output flushing is not supported
  864. errno = EINVAL;
  865. return -1;
  866. }
  867. return 0;
  868. }
  869. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  870. void esp_vfs_dev_uart_register(void)
  871. {
  872. esp_vfs_t vfs = {
  873. .flags = ESP_VFS_FLAG_DEFAULT,
  874. .write = &uart_write,
  875. .open = &uart_open,
  876. .fstat = &uart_fstat,
  877. .close = &uart_close,
  878. .read = &uart_read,
  879. .fcntl = &uart_fcntl,
  880. .fsync = &uart_fsync,
  881. .access = &uart_access,
  882. .start_select = &uart_start_select,
  883. .end_select = &uart_end_select,
  884. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  885. .tcsetattr = &uart_tcsetattr,
  886. .tcgetattr = &uart_tcgetattr,
  887. .tcdrain = &uart_tcdrain,
  888. .tcflush = &uart_tcflush,
  889. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  890. };
  891. ESP_ERROR_CHECK(esp_vfs_register("/dev/uart", &vfs, NULL));
  892. }
  893. int esp_vfs_dev_uart_port_set_rx_line_endings(int uart_num, esp_line_endings_t mode)
  894. {
  895. if (uart_num < 0 || uart_num >= UART_NUM) {
  896. errno = EBADF;
  897. return -1;
  898. }
  899. s_ctx[uart_num]->rx_mode = mode;
  900. return 0;
  901. }
  902. int esp_vfs_dev_uart_port_set_tx_line_endings(int uart_num, esp_line_endings_t mode)
  903. {
  904. if (uart_num < 0 || uart_num >= UART_NUM) {
  905. errno = EBADF;
  906. return -1;
  907. }
  908. s_ctx[uart_num]->tx_mode = mode;
  909. return 0;
  910. }
  911. void esp_vfs_dev_uart_set_rx_line_endings(esp_line_endings_t mode)
  912. {
  913. for (int i = 0; i < UART_NUM; ++i) {
  914. s_ctx[i]->rx_mode = mode;
  915. }
  916. }
  917. void esp_vfs_dev_uart_set_tx_line_endings(esp_line_endings_t mode)
  918. {
  919. for (int i = 0; i < UART_NUM; ++i) {
  920. s_ctx[i]->tx_mode = mode;
  921. }
  922. }
  923. void esp_vfs_dev_uart_use_nonblocking(int uart_num)
  924. {
  925. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  926. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  927. s_ctx[uart_num]->tx_func = uart_tx_char;
  928. s_ctx[uart_num]->rx_func = uart_rx_char;
  929. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  930. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  931. }
  932. void esp_vfs_dev_uart_use_driver(int uart_num)
  933. {
  934. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  935. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  936. s_ctx[uart_num]->tx_func = uart_tx_char_via_driver;
  937. s_ctx[uart_num]->rx_func = uart_rx_char_via_driver;
  938. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  939. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  940. }