bt.c 55 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_intr_alloc.h"
  31. #include "esp_attr.h"
  32. #include "esp_phy_init.h"
  33. #include "esp_bt.h"
  34. #include "esp_err.h"
  35. #include "esp_log.h"
  36. #include "esp_pm.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp32/clk.h"
  41. #include "esp_coexist_internal.h"
  42. #if !CONFIG_FREERTOS_UNICORE
  43. #include "esp_ipc.h"
  44. #endif
  45. #if CONFIG_BT_ENABLED
  46. /* Macro definition
  47. ************************************************************************
  48. */
  49. #define BTDM_LOG_TAG "BTDM_INIT"
  50. #define BTDM_INIT_PERIOD (5000) /* ms */
  51. /* Bluetooth system and controller config */
  52. #define BTDM_CFG_BT_DATA_RELEASE (1<<0)
  53. #define BTDM_CFG_HCI_UART (1<<1)
  54. #define BTDM_CFG_CONTROLLER_RUN_APP_CPU (1<<2)
  55. #define BTDM_CFG_SCAN_DUPLICATE_OPTIONS (1<<3)
  56. #define BTDM_CFG_SEND_ADV_RESERVED_SIZE (1<<4)
  57. #define BTDM_CFG_BLE_FULL_SCAN_SUPPORTED (1<<5)
  58. /* Sleep mode */
  59. #define BTDM_MODEM_SLEEP_MODE_NONE (0)
  60. #define BTDM_MODEM_SLEEP_MODE_ORIG (1)
  61. #define BTDM_MODEM_SLEEP_MODE_EVED (2) // sleep mode for BLE controller, used only for internal test.
  62. /* Low Power Clock Selection */
  63. #define BTDM_LPCLK_SEL_XTAL (0)
  64. #define BTDM_LPCLK_SEL_XTAL32K (1)
  65. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  66. #define BTDM_LPCLK_SEL_8M (3)
  67. /* Sleep and wakeup interval control */
  68. #define BTDM_MIN_SLEEP_DURATION (12) // threshold of interval in slots to allow to fall into modem sleep
  69. #define BTDM_MODEM_WAKE_UP_DELAY (4) // delay in slots of modem wake up procedure, including re-enable PHY/RF
  70. #define BT_DEBUG(...)
  71. #define BT_API_CALL_CHECK(info, api_call, ret) \
  72. do{\
  73. esp_err_t __err = (api_call);\
  74. if ((ret) != __err) {\
  75. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  76. return __err;\
  77. }\
  78. } while(0)
  79. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  80. #define OSI_VERSION 0x00010003
  81. #define OSI_MAGIC_VALUE 0xFADEBEAD
  82. /* SPIRAM Configuration */
  83. #if CONFIG_SPIRAM_USE_MALLOC
  84. #define BTDM_MAX_QUEUE_NUM (5)
  85. #endif
  86. /* Types definition
  87. ************************************************************************
  88. */
  89. /* VHCI function interface */
  90. typedef struct vhci_host_callback {
  91. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  92. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  93. } vhci_host_callback_t;
  94. /* Dram region */
  95. typedef struct {
  96. esp_bt_mode_t mode;
  97. intptr_t start;
  98. intptr_t end;
  99. } btdm_dram_available_region_t;
  100. /* PSRAM configuration */
  101. #if CONFIG_SPIRAM_USE_MALLOC
  102. typedef struct {
  103. QueueHandle_t handle;
  104. void *storage;
  105. void *buffer;
  106. } btdm_queue_item_t;
  107. #endif
  108. /* OSI function */
  109. struct osi_funcs_t {
  110. uint32_t _version;
  111. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  112. void (*_ints_on)(unsigned int mask);
  113. void (*_interrupt_disable)(void);
  114. void (*_interrupt_restore)(void);
  115. void (*_task_yield)(void);
  116. void (*_task_yield_from_isr)(void);
  117. void *(*_semphr_create)(uint32_t max, uint32_t init);
  118. void (*_semphr_delete)(void *semphr);
  119. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  120. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  121. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  122. int32_t (*_semphr_give)(void *semphr);
  123. void *(*_mutex_create)(void);
  124. void (*_mutex_delete)(void *mutex);
  125. int32_t (*_mutex_lock)(void *mutex);
  126. int32_t (*_mutex_unlock)(void *mutex);
  127. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  128. void (* _queue_delete)(void *queue);
  129. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  130. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  131. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  132. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  133. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  134. void (* _task_delete)(void *task_handle);
  135. bool (* _is_in_isr)(void);
  136. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  137. void *(* _malloc)(uint32_t size);
  138. void *(* _malloc_internal)(uint32_t size);
  139. void (* _free)(void *p);
  140. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  141. void (* _srand)(unsigned int seed);
  142. int (* _rand)(void);
  143. uint32_t (* _btdm_lpcycles_2_us)(uint32_t cycles);
  144. uint32_t (* _btdm_us_2_lpcycles)(uint32_t us);
  145. bool (* _btdm_sleep_check_duration)(uint32_t *slot_cnt);
  146. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  147. void (* _btdm_sleep_enter_phase2)(void);
  148. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  149. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  150. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  151. bool (* _coex_bt_wakeup_request)(void);
  152. void (* _coex_bt_wakeup_request_end)(void);
  153. int (* _coex_bt_request)(uint32_t event, uint32_t latency, uint32_t duration);
  154. int (* _coex_bt_release)(uint32_t event);
  155. int (* _coex_register_bt_cb)(coex_func_cb_t cb);
  156. uint32_t (* _coex_bb_reset_lock)(void);
  157. void (* _coex_bb_reset_unlock)(uint32_t restore);
  158. int (* _coex_schm_register_btdm_callback)(void *callback);
  159. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  160. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  161. uint32_t (* _coex_schm_interval_get)(void);
  162. uint8_t (* _coex_schm_curr_period_get)(void);
  163. void *(* _coex_schm_curr_phase_get)(void);
  164. int (* _coex_wifi_channel_get)(uint8_t *primary, uint8_t *secondary);
  165. int (* _coex_register_wifi_channel_change_callback)(void *cb);
  166. xt_handler (*_set_isr_l3)(int n, xt_handler f, void *arg);
  167. void (*_interrupt_l3_disable)(void);
  168. void (*_interrupt_l3_restore)(void);
  169. void *(* _customer_queue_create)(uint32_t queue_len, uint32_t item_size);
  170. uint32_t _magic;
  171. };
  172. typedef void (*workitem_handler_t)(void* arg);
  173. /* External functions or values
  174. ************************************************************************
  175. */
  176. /* not for user call, so don't put to include file */
  177. /* OSI */
  178. extern int btdm_osi_funcs_register(void *osi_funcs);
  179. /* Initialise and De-initialise */
  180. extern int btdm_controller_init(uint32_t config_mask, esp_bt_controller_config_t *config_opts);
  181. extern void btdm_controller_deinit(void);
  182. extern int btdm_controller_enable(esp_bt_mode_t mode);
  183. extern void btdm_controller_disable(void);
  184. extern uint8_t btdm_controller_get_mode(void);
  185. extern const char *btdm_controller_get_compile_version(void);
  186. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  187. extern int btdm_dispatch_work_to_controller(workitem_handler_t callback, void *arg, bool blocking);
  188. /* Sleep */
  189. extern void btdm_controller_enable_sleep(bool enable);
  190. extern void btdm_controller_set_sleep_mode(uint8_t mode);
  191. extern uint8_t btdm_controller_get_sleep_mode(void);
  192. extern bool btdm_power_state_active(void);
  193. extern void btdm_wakeup_request(void);
  194. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  195. /* Low Power Clock */
  196. extern bool btdm_lpclk_select_src(uint32_t sel);
  197. extern bool btdm_lpclk_set_div(uint32_t div);
  198. /* VHCI */
  199. extern bool API_vhci_host_check_send_available(void);
  200. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  201. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  202. /* TX power */
  203. extern int ble_txpwr_set(int power_type, int power_level);
  204. extern int ble_txpwr_get(int power_type);
  205. extern int bredr_txpwr_set(int min_power_level, int max_power_level);
  206. extern int bredr_txpwr_get(int *min_power_level, int *max_power_level);
  207. extern void bredr_sco_datapath_set(uint8_t data_path);
  208. extern void btdm_controller_scan_duplicate_list_clear(void);
  209. /* Coexistence */
  210. extern int coex_bt_request(uint32_t event, uint32_t latency, uint32_t duration);
  211. extern int coex_bt_release(uint32_t event);
  212. extern int coex_register_bt_cb(coex_func_cb_t cb);
  213. extern uint32_t coex_bb_reset_lock(void);
  214. extern void coex_bb_reset_unlock(uint32_t restore);
  215. extern int coex_schm_register_btdm_callback(void *callback);
  216. extern void coex_schm_status_bit_clear(uint32_t type, uint32_t status);
  217. extern void coex_schm_status_bit_set(uint32_t type, uint32_t status);
  218. extern uint32_t coex_schm_interval_get(void);
  219. extern uint8_t coex_schm_curr_period_get(void);
  220. extern void * coex_schm_curr_phase_get(void);
  221. extern int coex_wifi_channel_get(uint8_t *primary, uint8_t *secondary);
  222. extern int coex_register_wifi_channel_change_callback(void *cb);
  223. /* Shutdown */
  224. extern void esp_bt_controller_shutdown(void);
  225. extern char _bss_start_btdm;
  226. extern char _bss_end_btdm;
  227. extern char _data_start_btdm;
  228. extern char _data_end_btdm;
  229. extern uint32_t _data_start_btdm_rom;
  230. extern uint32_t _data_end_btdm_rom;
  231. extern uint32_t _bt_bss_start;
  232. extern uint32_t _bt_bss_end;
  233. extern uint32_t _nimble_bss_start;
  234. extern uint32_t _nimble_bss_end;
  235. extern uint32_t _btdm_bss_start;
  236. extern uint32_t _btdm_bss_end;
  237. extern uint32_t _bt_data_start;
  238. extern uint32_t _bt_data_end;
  239. extern uint32_t _nimble_data_start;
  240. extern uint32_t _nimble_data_end;
  241. extern uint32_t _btdm_data_start;
  242. extern uint32_t _btdm_data_end;
  243. /* Local Function Declare
  244. *********************************************************************
  245. */
  246. #if CONFIG_SPIRAM_USE_MALLOC
  247. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  248. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  249. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  250. static void IRAM_ATTR interrupt_disable(void);
  251. static void IRAM_ATTR interrupt_restore(void);
  252. static void IRAM_ATTR task_yield(void);
  253. static void IRAM_ATTR task_yield_from_isr(void);
  254. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  255. static void semphr_delete_wrapper(void *semphr);
  256. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  257. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  258. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  259. static int32_t semphr_give_wrapper(void *semphr);
  260. static void *mutex_create_wrapper(void);
  261. static void mutex_delete_wrapper(void *mutex);
  262. static int32_t mutex_lock_wrapper(void *mutex);
  263. static int32_t mutex_unlock_wrapper(void *mutex);
  264. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  265. static void queue_delete_wrapper(void *queue);
  266. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  267. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  268. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  269. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  270. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  271. static void task_delete_wrapper(void *task_handle);
  272. static bool IRAM_ATTR is_in_isr_wrapper(void);
  273. static void IRAM_ATTR cause_sw_intr(void *arg);
  274. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  275. static void *malloc_internal_wrapper(size_t size);
  276. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  277. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  278. static int IRAM_ATTR rand_wrapper(void);
  279. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles);
  280. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us);
  281. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt);
  282. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  283. static void btdm_sleep_enter_phase2_wrapper(void);
  284. static void btdm_sleep_exit_phase3_wrapper(void);
  285. static bool coex_bt_wakeup_request(void);
  286. static void coex_bt_wakeup_request_end(void);
  287. static int coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration);
  288. static int coex_bt_release_wrapper(uint32_t event);
  289. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb);
  290. static uint32_t coex_bb_reset_lock_wrapper(void);
  291. static void coex_bb_reset_unlock_wrapper(uint32_t restore);
  292. static int coex_schm_register_btdm_callback_wrapper(void *callback);
  293. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  294. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  295. static uint32_t coex_schm_interval_get_wrapper(void);
  296. static uint8_t coex_schm_curr_period_get_wrapper(void);
  297. static void * coex_schm_curr_phase_get_wrapper(void);
  298. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary);
  299. static int coex_register_wifi_channel_change_callback_wrapper(void *cb);
  300. /* Local variable definition
  301. ***************************************************************************
  302. */
  303. /* OSI funcs */
  304. static const struct osi_funcs_t osi_funcs_ro = {
  305. ._version = OSI_VERSION,
  306. ._set_isr = xt_set_interrupt_handler,
  307. ._ints_on = xt_ints_on,
  308. ._interrupt_disable = interrupt_disable,
  309. ._interrupt_restore = interrupt_restore,
  310. ._task_yield = task_yield,
  311. ._task_yield_from_isr = task_yield_from_isr,
  312. ._semphr_create = semphr_create_wrapper,
  313. ._semphr_delete = semphr_delete_wrapper,
  314. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  315. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  316. ._semphr_take = semphr_take_wrapper,
  317. ._semphr_give = semphr_give_wrapper,
  318. ._mutex_create = mutex_create_wrapper,
  319. ._mutex_delete = mutex_delete_wrapper,
  320. ._mutex_lock = mutex_lock_wrapper,
  321. ._mutex_unlock = mutex_unlock_wrapper,
  322. ._queue_create = queue_create_wrapper,
  323. ._queue_delete = queue_delete_wrapper,
  324. ._queue_send = queue_send_wrapper,
  325. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  326. ._queue_recv = queue_recv_wrapper,
  327. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  328. ._task_create = task_create_wrapper,
  329. ._task_delete = task_delete_wrapper,
  330. ._is_in_isr = is_in_isr_wrapper,
  331. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  332. ._malloc = malloc,
  333. ._malloc_internal = malloc_internal_wrapper,
  334. ._free = free,
  335. ._read_efuse_mac = read_mac_wrapper,
  336. ._srand = srand_wrapper,
  337. ._rand = rand_wrapper,
  338. ._btdm_lpcycles_2_us = btdm_lpcycles_2_us,
  339. ._btdm_us_2_lpcycles = btdm_us_2_lpcycles,
  340. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  341. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  342. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  343. ._btdm_sleep_exit_phase1 = NULL,
  344. ._btdm_sleep_exit_phase2 = NULL,
  345. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  346. ._coex_bt_wakeup_request = coex_bt_wakeup_request,
  347. ._coex_bt_wakeup_request_end = coex_bt_wakeup_request_end,
  348. ._coex_bt_request = coex_bt_request_wrapper,
  349. ._coex_bt_release = coex_bt_release_wrapper,
  350. ._coex_register_bt_cb = coex_register_bt_cb_wrapper,
  351. ._coex_bb_reset_lock = coex_bb_reset_lock_wrapper,
  352. ._coex_bb_reset_unlock = coex_bb_reset_unlock_wrapper,
  353. ._coex_schm_register_btdm_callback = coex_schm_register_btdm_callback_wrapper,
  354. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  355. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  356. ._coex_schm_interval_get = coex_schm_interval_get_wrapper,
  357. ._coex_schm_curr_period_get = coex_schm_curr_period_get_wrapper,
  358. ._coex_schm_curr_phase_get = coex_schm_curr_phase_get_wrapper,
  359. ._coex_wifi_channel_get = coex_wifi_channel_get_wrapper,
  360. ._coex_register_wifi_channel_change_callback = coex_register_wifi_channel_change_callback_wrapper,
  361. ._set_isr_l3 = xt_set_interrupt_handler,
  362. ._interrupt_l3_disable = interrupt_disable,
  363. ._interrupt_l3_restore = interrupt_restore,
  364. ._customer_queue_create = NULL,
  365. ._magic = OSI_MAGIC_VALUE,
  366. };
  367. /* the mode column will be modified by release function to indicate the available region */
  368. static btdm_dram_available_region_t btdm_dram_available_region[] = {
  369. //following is .data
  370. {ESP_BT_MODE_BTDM, SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END },
  371. //following is memory which HW will use
  372. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM0_START, SOC_MEM_BT_EM_BTDM0_END },
  373. {ESP_BT_MODE_BLE, SOC_MEM_BT_EM_BLE_START, SOC_MEM_BT_EM_BLE_END },
  374. {ESP_BT_MODE_BTDM, SOC_MEM_BT_EM_BTDM1_START, SOC_MEM_BT_EM_BTDM1_END },
  375. {ESP_BT_MODE_CLASSIC_BT, SOC_MEM_BT_EM_BREDR_START, SOC_MEM_BT_EM_BREDR_REAL_END},
  376. //following is .bss
  377. {ESP_BT_MODE_BTDM, SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END },
  378. {ESP_BT_MODE_BTDM, SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END },
  379. };
  380. /* Reserve the full memory region used by Bluetooth Controller,
  381. * some may be released later at runtime. */
  382. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_EM_START, SOC_MEM_BT_EM_BREDR_REAL_END, rom_bt_em);
  383. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_BSS_START, SOC_MEM_BT_BSS_END, rom_bt_bss);
  384. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_MISC_START, SOC_MEM_BT_MISC_END, rom_bt_misc);
  385. SOC_RESERVE_MEMORY_REGION(SOC_MEM_BT_DATA_START, SOC_MEM_BT_DATA_END, rom_bt_data);
  386. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  387. #if CONFIG_SPIRAM_USE_MALLOC
  388. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  389. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  390. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  391. /* Static variable declare */
  392. // timestamp when PHY/RF was switched on
  393. static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  394. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  395. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  396. // measured average low power clock period in micro seconds
  397. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  398. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  399. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  400. // used low power clock
  401. static DRAM_ATTR uint8_t btdm_lpclk_sel;
  402. #endif /* #ifdef CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG */
  403. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  404. #ifdef CONFIG_PM_ENABLE
  405. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  406. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  407. static bool s_pm_lock_acquired = true;
  408. static DRAM_ATTR bool s_btdm_allow_light_sleep;
  409. // pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
  410. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  411. static void btdm_slp_tmr_callback(void *arg);
  412. #endif /* #ifdef CONFIG_PM_ENABLE */
  413. static inline void btdm_check_and_init_bb(void)
  414. {
  415. /* init BT-BB if PHY/RF has been switched off since last BT-BB init */
  416. int64_t latest_ts = esp_phy_rf_get_on_ts();
  417. if (latest_ts != s_time_phy_rf_just_enabled ||
  418. s_time_phy_rf_just_enabled == 0) {
  419. btdm_rf_bb_init_phase2();
  420. s_time_phy_rf_just_enabled = latest_ts;
  421. }
  422. }
  423. #if CONFIG_SPIRAM_USE_MALLOC
  424. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  425. {
  426. if (!btdm_queue_table_mux || !queue) {
  427. return NULL;
  428. }
  429. bool ret = false;
  430. btdm_queue_item_t *item;
  431. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  432. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  433. item = &btdm_queue_table[i];
  434. if (item->handle == NULL) {
  435. memcpy(item, queue, sizeof(btdm_queue_item_t));
  436. ret = true;
  437. break;
  438. }
  439. }
  440. xSemaphoreGive(btdm_queue_table_mux);
  441. return ret;
  442. }
  443. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  444. {
  445. if (!btdm_queue_table_mux || !queue) {
  446. return false;
  447. }
  448. bool ret = false;
  449. btdm_queue_item_t *item;
  450. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  451. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  452. item = &btdm_queue_table[i];
  453. if (item->handle == queue->handle) {
  454. memcpy(queue, item, sizeof(btdm_queue_item_t));
  455. memset(item, 0, sizeof(btdm_queue_item_t));
  456. ret = true;
  457. break;
  458. }
  459. }
  460. xSemaphoreGive(btdm_queue_table_mux);
  461. return ret;
  462. }
  463. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  464. static void IRAM_ATTR interrupt_disable(void)
  465. {
  466. if (xPortInIsrContext()) {
  467. portENTER_CRITICAL_ISR(&global_int_mux);
  468. } else {
  469. portENTER_CRITICAL(&global_int_mux);
  470. }
  471. }
  472. static void IRAM_ATTR interrupt_restore(void)
  473. {
  474. if (xPortInIsrContext()) {
  475. portEXIT_CRITICAL_ISR(&global_int_mux);
  476. } else {
  477. portEXIT_CRITICAL(&global_int_mux);
  478. }
  479. }
  480. static void IRAM_ATTR task_yield(void)
  481. {
  482. vPortYield();
  483. }
  484. static void IRAM_ATTR task_yield_from_isr(void)
  485. {
  486. portYIELD_FROM_ISR();
  487. }
  488. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  489. {
  490. #if !CONFIG_SPIRAM_USE_MALLOC
  491. return (void *)xSemaphoreCreateCounting(max, init);
  492. #else
  493. StaticQueue_t *queue_buffer = NULL;
  494. QueueHandle_t handle = NULL;
  495. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  496. if (!queue_buffer) {
  497. goto error;
  498. }
  499. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  500. if (!handle) {
  501. goto error;
  502. }
  503. btdm_queue_item_t item = {
  504. .handle = handle,
  505. .storage = NULL,
  506. .buffer = queue_buffer,
  507. };
  508. if (!btdm_queue_generic_register(&item)) {
  509. goto error;
  510. }
  511. return handle;
  512. error:
  513. if (handle) {
  514. vSemaphoreDelete(handle);
  515. }
  516. if (queue_buffer) {
  517. free(queue_buffer);
  518. }
  519. return NULL;
  520. #endif
  521. }
  522. static void semphr_delete_wrapper(void *semphr)
  523. {
  524. #if !CONFIG_SPIRAM_USE_MALLOC
  525. vSemaphoreDelete(semphr);
  526. #else
  527. btdm_queue_item_t item = {
  528. .handle = semphr,
  529. .storage = NULL,
  530. .buffer = NULL,
  531. };
  532. if (btdm_queue_generic_deregister(&item)) {
  533. vSemaphoreDelete(item.handle);
  534. free(item.buffer);
  535. }
  536. return;
  537. #endif
  538. }
  539. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  540. {
  541. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  542. }
  543. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  544. {
  545. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  546. }
  547. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  548. {
  549. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  550. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  551. } else {
  552. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  553. }
  554. }
  555. static int32_t semphr_give_wrapper(void *semphr)
  556. {
  557. return (int32_t)xSemaphoreGive(semphr);
  558. }
  559. static void *mutex_create_wrapper(void)
  560. {
  561. #if CONFIG_SPIRAM_USE_MALLOC
  562. StaticQueue_t *queue_buffer = NULL;
  563. QueueHandle_t handle = NULL;
  564. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  565. if (!queue_buffer) {
  566. goto error;
  567. }
  568. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  569. if (!handle) {
  570. goto error;
  571. }
  572. btdm_queue_item_t item = {
  573. .handle = handle,
  574. .storage = NULL,
  575. .buffer = queue_buffer,
  576. };
  577. if (!btdm_queue_generic_register(&item)) {
  578. goto error;
  579. }
  580. return handle;
  581. error:
  582. if (handle) {
  583. vSemaphoreDelete(handle);
  584. }
  585. if (queue_buffer) {
  586. free(queue_buffer);
  587. }
  588. return NULL;
  589. #else
  590. return (void *)xSemaphoreCreateMutex();
  591. #endif
  592. }
  593. static void mutex_delete_wrapper(void *mutex)
  594. {
  595. #if !CONFIG_SPIRAM_USE_MALLOC
  596. vSemaphoreDelete(mutex);
  597. #else
  598. btdm_queue_item_t item = {
  599. .handle = mutex,
  600. .storage = NULL,
  601. .buffer = NULL,
  602. };
  603. if (btdm_queue_generic_deregister(&item)) {
  604. vSemaphoreDelete(item.handle);
  605. free(item.buffer);
  606. }
  607. return;
  608. #endif
  609. }
  610. static int32_t mutex_lock_wrapper(void *mutex)
  611. {
  612. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  613. }
  614. static int32_t mutex_unlock_wrapper(void *mutex)
  615. {
  616. return (int32_t)xSemaphoreGive(mutex);
  617. }
  618. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  619. {
  620. #if CONFIG_SPIRAM_USE_MALLOC
  621. StaticQueue_t *queue_buffer = NULL;
  622. uint8_t *queue_storage = NULL;
  623. QueueHandle_t handle = NULL;
  624. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  625. if (!queue_buffer) {
  626. goto error;
  627. }
  628. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  629. if (!queue_storage ) {
  630. goto error;
  631. }
  632. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  633. if (!handle) {
  634. goto error;
  635. }
  636. btdm_queue_item_t item = {
  637. .handle = handle,
  638. .storage = queue_storage,
  639. .buffer = queue_buffer,
  640. };
  641. if (!btdm_queue_generic_register(&item)) {
  642. goto error;
  643. }
  644. return handle;
  645. error:
  646. if (handle) {
  647. vQueueDelete(handle);
  648. }
  649. if (queue_storage) {
  650. free(queue_storage);
  651. }
  652. if (queue_buffer) {
  653. free(queue_buffer);
  654. }
  655. return NULL;
  656. #else
  657. return (void *)xQueueCreate(queue_len, item_size);
  658. #endif
  659. }
  660. static void queue_delete_wrapper(void *queue)
  661. {
  662. #if !CONFIG_SPIRAM_USE_MALLOC
  663. vQueueDelete(queue);
  664. #else
  665. btdm_queue_item_t item = {
  666. .handle = queue,
  667. .storage = NULL,
  668. .buffer = NULL,
  669. };
  670. if (btdm_queue_generic_deregister(&item)) {
  671. vQueueDelete(item.handle);
  672. free(item.storage);
  673. free(item.buffer);
  674. }
  675. return;
  676. #endif
  677. }
  678. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  679. {
  680. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  681. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  682. } else {
  683. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  684. }
  685. }
  686. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  687. {
  688. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  689. }
  690. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  691. {
  692. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  693. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  694. } else {
  695. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  696. }
  697. }
  698. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  699. {
  700. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  701. }
  702. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  703. {
  704. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  705. }
  706. static void task_delete_wrapper(void *task_handle)
  707. {
  708. vTaskDelete(task_handle);
  709. }
  710. static bool IRAM_ATTR is_in_isr_wrapper(void)
  711. {
  712. return !xPortCanYield();
  713. }
  714. static void IRAM_ATTR cause_sw_intr(void *arg)
  715. {
  716. /* just convert void * to int, because the width is the same */
  717. uint32_t intr_no = (uint32_t)arg;
  718. XTHAL_SET_INTSET((1<<intr_no));
  719. }
  720. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  721. {
  722. esp_err_t err = ESP_OK;
  723. #if CONFIG_FREERTOS_UNICORE
  724. cause_sw_intr((void *)intr_no);
  725. #else /* CONFIG_FREERTOS_UNICORE */
  726. if (xPortGetCoreID() == core_id) {
  727. cause_sw_intr((void *)intr_no);
  728. } else {
  729. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  730. }
  731. #endif /* !CONFIG_FREERTOS_UNICORE */
  732. return err;
  733. }
  734. static void *malloc_internal_wrapper(size_t size)
  735. {
  736. return heap_caps_malloc(size, MALLOC_CAP_8BIT|MALLOC_CAP_DMA|MALLOC_CAP_INTERNAL);
  737. }
  738. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  739. {
  740. return esp_read_mac(mac, ESP_MAC_BT);
  741. }
  742. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  743. {
  744. /* empty function */
  745. }
  746. static int IRAM_ATTR rand_wrapper(void)
  747. {
  748. return (int)esp_random();
  749. }
  750. static uint32_t IRAM_ATTR btdm_lpcycles_2_us(uint32_t cycles)
  751. {
  752. // The number of lp cycles should not lead to overflow. Thrs: 100s
  753. // clock measurement is conducted
  754. uint64_t us = (uint64_t)btdm_lpcycle_us * cycles;
  755. us = (us + (1 << (btdm_lpcycle_us_frac - 1))) >> btdm_lpcycle_us_frac;
  756. return (uint32_t)us;
  757. }
  758. /*
  759. * @brief Converts a duration in slots into a number of low power clock cycles.
  760. */
  761. static uint32_t IRAM_ATTR btdm_us_2_lpcycles(uint32_t us)
  762. {
  763. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  764. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  765. // clock measurement is conducted
  766. uint64_t cycles = ((uint64_t)(us) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  767. return (uint32_t)cycles;
  768. }
  769. static bool IRAM_ATTR btdm_sleep_check_duration(uint32_t *slot_cnt)
  770. {
  771. if (*slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  772. return false;
  773. }
  774. /* wake up in advance considering the delay in enabling PHY/RF */
  775. *slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  776. return true;
  777. }
  778. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  779. {
  780. #ifdef CONFIG_PM_ENABLE
  781. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  782. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  783. #define BTDM_MIN_TIMER_UNCERTAINTY_US (500)
  784. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  785. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  786. // and set the timer in advance
  787. uint32_t uncertainty = (us_to_sleep >> 11);
  788. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  789. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  790. }
  791. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  792. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  793. }
  794. #endif
  795. }
  796. static void btdm_sleep_enter_phase2_wrapper(void)
  797. {
  798. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  799. esp_phy_disable();
  800. #ifdef CONFIG_PM_ENABLE
  801. if (s_pm_lock_acquired) {
  802. esp_pm_lock_release(s_pm_lock);
  803. s_pm_lock_acquired = false;
  804. }
  805. #endif
  806. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  807. esp_phy_disable();
  808. // pause bluetooth baseband
  809. periph_module_disable(PERIPH_BT_BASEBAND_MODULE);
  810. }
  811. }
  812. static void btdm_sleep_exit_phase3_wrapper(void)
  813. {
  814. #ifdef CONFIG_PM_ENABLE
  815. if (!s_pm_lock_acquired) {
  816. s_pm_lock_acquired = true;
  817. esp_pm_lock_acquire(s_pm_lock);
  818. }
  819. #endif
  820. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  821. esp_phy_enable();
  822. btdm_check_and_init_bb();
  823. #ifdef CONFIG_PM_ENABLE
  824. esp_timer_stop(s_btdm_slp_tmr);
  825. #endif
  826. } else if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  827. // resume bluetooth baseband
  828. periph_module_enable(PERIPH_BT_BASEBAND_MODULE);
  829. esp_phy_enable();
  830. }
  831. }
  832. #ifdef CONFIG_PM_ENABLE
  833. static void btdm_slp_tmr_customer_callback(void * arg)
  834. {
  835. (void)(arg);
  836. if (!s_pm_lock_acquired) {
  837. s_pm_lock_acquired = true;
  838. esp_pm_lock_acquire(s_pm_lock);
  839. }
  840. }
  841. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  842. {
  843. (void)(arg);
  844. btdm_dispatch_work_to_controller(btdm_slp_tmr_customer_callback, NULL, true);
  845. }
  846. #endif
  847. #define BTDM_ASYNC_WAKEUP_REQ_HCI 0
  848. #define BTDM_ASYNC_WAKEUP_REQ_COEX 1
  849. #define BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA 2
  850. #define BTDM_ASYNC_WAKEUP_REQMAX 3
  851. static void btdm_wakeup_request_callback(void * arg)
  852. {
  853. (void)(arg);
  854. #if CONFIG_PM_ENABLE
  855. if (!s_pm_lock_acquired) {
  856. s_pm_lock_acquired = true;
  857. esp_pm_lock_acquire(s_pm_lock);
  858. }
  859. esp_timer_stop(s_btdm_slp_tmr);
  860. #endif
  861. btdm_wakeup_request();
  862. semphr_give_wrapper(s_wakeup_req_sem);
  863. }
  864. static bool async_wakeup_request(int event)
  865. {
  866. bool do_wakeup_request = false;
  867. switch (event) {
  868. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  869. btdm_in_wakeup_requesting_set(true);
  870. // NO break
  871. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  872. if (!btdm_power_state_active()) {
  873. do_wakeup_request = true;
  874. btdm_dispatch_work_to_controller(btdm_wakeup_request_callback, NULL, true);
  875. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  876. }
  877. break;
  878. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  879. if (!btdm_power_state_active()) {
  880. do_wakeup_request = true;
  881. #if CONFIG_PM_ENABLE
  882. if (!s_pm_lock_acquired) {
  883. s_pm_lock_acquired = true;
  884. esp_pm_lock_acquire(s_pm_lock);
  885. }
  886. esp_timer_stop(s_btdm_slp_tmr);
  887. #endif
  888. btdm_wakeup_request();
  889. }
  890. break;
  891. default:
  892. return false;
  893. }
  894. return do_wakeup_request;
  895. }
  896. static void async_wakeup_request_end(int event)
  897. {
  898. bool request_lock = false;
  899. switch (event) {
  900. case BTDM_ASYNC_WAKEUP_REQ_HCI:
  901. request_lock = true;
  902. break;
  903. case BTDM_ASYNC_WAKEUP_REQ_COEX:
  904. case BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA:
  905. request_lock = false;
  906. break;
  907. default:
  908. return;
  909. }
  910. if (request_lock) {
  911. btdm_in_wakeup_requesting_set(false);
  912. }
  913. return;
  914. }
  915. static bool coex_bt_wakeup_request(void)
  916. {
  917. return async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_COEX);
  918. }
  919. static void coex_bt_wakeup_request_end(void)
  920. {
  921. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_COEX);
  922. return;
  923. }
  924. static int IRAM_ATTR coex_bt_request_wrapper(uint32_t event, uint32_t latency, uint32_t duration)
  925. {
  926. #if CONFIG_SW_COEXIST_ENABLE
  927. return coex_bt_request(event, latency, duration);
  928. #else
  929. return 0;
  930. #endif
  931. }
  932. static int IRAM_ATTR coex_bt_release_wrapper(uint32_t event)
  933. {
  934. #if CONFIG_SW_COEXIST_ENABLE
  935. return coex_bt_release(event);
  936. #else
  937. return 0;
  938. #endif
  939. }
  940. static int coex_register_bt_cb_wrapper(coex_func_cb_t cb)
  941. {
  942. #if CONFIG_SW_COEXIST_ENABLE
  943. return coex_register_bt_cb(cb);
  944. #else
  945. return 0;
  946. #endif
  947. }
  948. static uint32_t IRAM_ATTR coex_bb_reset_lock_wrapper(void)
  949. {
  950. #if CONFIG_SW_COEXIST_ENABLE
  951. return coex_bb_reset_lock();
  952. #else
  953. return 0;
  954. #endif
  955. }
  956. static void IRAM_ATTR coex_bb_reset_unlock_wrapper(uint32_t restore)
  957. {
  958. #if CONFIG_SW_COEXIST_ENABLE
  959. coex_bb_reset_unlock(restore);
  960. #endif
  961. }
  962. static int coex_schm_register_btdm_callback_wrapper(void *callback)
  963. {
  964. #if CONFIG_SW_COEXIST_ENABLE
  965. return coex_schm_register_btdm_callback(callback);
  966. #else
  967. return 0;
  968. #endif
  969. }
  970. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  971. {
  972. #if CONFIG_SW_COEXIST_ENABLE
  973. coex_schm_status_bit_clear(type, status);
  974. #endif
  975. }
  976. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  977. {
  978. #if CONFIG_SW_COEXIST_ENABLE
  979. coex_schm_status_bit_set(type, status);
  980. #endif
  981. }
  982. static uint32_t coex_schm_interval_get_wrapper(void)
  983. {
  984. #if CONFIG_SW_COEXIST_ENABLE
  985. return coex_schm_interval_get();
  986. #else
  987. return 0;
  988. #endif
  989. }
  990. static uint8_t coex_schm_curr_period_get_wrapper(void)
  991. {
  992. #if CONFIG_SW_COEXIST_ENABLE
  993. return coex_schm_curr_period_get();
  994. #else
  995. return 1;
  996. #endif
  997. }
  998. static void * coex_schm_curr_phase_get_wrapper(void)
  999. {
  1000. #if CONFIG_SW_COEXIST_ENABLE
  1001. return coex_schm_curr_phase_get();
  1002. #else
  1003. return NULL;
  1004. #endif
  1005. }
  1006. static int coex_wifi_channel_get_wrapper(uint8_t *primary, uint8_t *secondary)
  1007. {
  1008. #if CONFIG_SW_COEXIST_ENABLE
  1009. return coex_wifi_channel_get(primary, secondary);
  1010. #else
  1011. return -1;
  1012. #endif
  1013. }
  1014. static int coex_register_wifi_channel_change_callback_wrapper(void *cb)
  1015. {
  1016. #if CONFIG_SW_COEXIST_ENABLE
  1017. return coex_register_wifi_channel_change_callback(cb);
  1018. #else
  1019. return -1;
  1020. #endif
  1021. }
  1022. bool esp_vhci_host_check_send_available(void)
  1023. {
  1024. return API_vhci_host_check_send_available();
  1025. }
  1026. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  1027. {
  1028. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1029. API_vhci_host_send_packet(data, len);
  1030. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_REQ_HCI);
  1031. }
  1032. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  1033. {
  1034. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  1035. }
  1036. static uint32_t btdm_config_mask_load(void)
  1037. {
  1038. uint32_t mask = 0x0;
  1039. #if CONFIG_BTDM_CTRL_HCI_MODE_UART_H4
  1040. mask |= BTDM_CFG_HCI_UART;
  1041. #endif
  1042. #if CONFIG_BTDM_CTRL_PINNED_TO_CORE == 1
  1043. mask |= BTDM_CFG_CONTROLLER_RUN_APP_CPU;
  1044. #endif
  1045. #if CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED
  1046. mask |= BTDM_CFG_BLE_FULL_SCAN_SUPPORTED;
  1047. #endif /* CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED */
  1048. mask |= BTDM_CFG_SCAN_DUPLICATE_OPTIONS;
  1049. mask |= BTDM_CFG_SEND_ADV_RESERVED_SIZE;
  1050. return mask;
  1051. }
  1052. static void btdm_controller_mem_init(void)
  1053. {
  1054. /* initialise .data section */
  1055. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  1056. ESP_LOGD(BTDM_LOG_TAG, ".data initialise [0x%08x] <== [0x%08x]", (uint32_t)&_data_start_btdm, _data_start_btdm_rom);
  1057. //initial em, .bss section
  1058. for (int i = 1; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1059. if (btdm_dram_available_region[i].mode != ESP_BT_MODE_IDLE) {
  1060. memset((void *)btdm_dram_available_region[i].start, 0x0, btdm_dram_available_region[i].end - btdm_dram_available_region[i].start);
  1061. ESP_LOGD(BTDM_LOG_TAG, ".bss initialise [0x%08x] - [0x%08x]", btdm_dram_available_region[i].start, btdm_dram_available_region[i].end);
  1062. }
  1063. }
  1064. }
  1065. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  1066. {
  1067. int ret = heap_caps_add_region(start, end);
  1068. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  1069. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  1070. * we replace it by ESP_OK
  1071. */
  1072. if (ret == ESP_ERR_INVALID_SIZE) {
  1073. return ESP_OK;
  1074. }
  1075. return ret;
  1076. }
  1077. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  1078. {
  1079. bool update = true;
  1080. intptr_t mem_start=(intptr_t) NULL, mem_end=(intptr_t) NULL;
  1081. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1082. return ESP_ERR_INVALID_STATE;
  1083. }
  1084. //already released
  1085. if (!(mode & btdm_dram_available_region[0].mode)) {
  1086. return ESP_ERR_INVALID_STATE;
  1087. }
  1088. for (int i = 0; i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t); i++) {
  1089. //skip the share mode, idle mode and other mode
  1090. if (btdm_dram_available_region[i].mode == ESP_BT_MODE_IDLE
  1091. || (mode & btdm_dram_available_region[i].mode) != btdm_dram_available_region[i].mode) {
  1092. //clear the bit of the mode which will be released
  1093. btdm_dram_available_region[i].mode &= ~mode;
  1094. continue;
  1095. } else {
  1096. //clear the bit of the mode which will be released
  1097. btdm_dram_available_region[i].mode &= ~mode;
  1098. }
  1099. if (update) {
  1100. mem_start = btdm_dram_available_region[i].start;
  1101. mem_end = btdm_dram_available_region[i].end;
  1102. update = false;
  1103. }
  1104. if (i < sizeof(btdm_dram_available_region)/sizeof(btdm_dram_available_region_t) - 1) {
  1105. mem_end = btdm_dram_available_region[i].end;
  1106. if (btdm_dram_available_region[i+1].mode != ESP_BT_MODE_IDLE
  1107. && (mode & btdm_dram_available_region[i+1].mode) == btdm_dram_available_region[i+1].mode
  1108. && mem_end == btdm_dram_available_region[i+1].start) {
  1109. continue;
  1110. } else {
  1111. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1112. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1113. update = true;
  1114. }
  1115. } else {
  1116. mem_end = btdm_dram_available_region[i].end;
  1117. ESP_LOGD(BTDM_LOG_TAG, "Release DRAM [0x%08x] - [0x%08x]", mem_start, mem_end);
  1118. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1119. update = true;
  1120. }
  1121. }
  1122. if (mode == ESP_BT_MODE_BTDM) {
  1123. mem_start = (intptr_t)&_btdm_bss_start;
  1124. mem_end = (intptr_t)&_btdm_bss_end;
  1125. if (mem_start != mem_end) {
  1126. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1127. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1128. }
  1129. mem_start = (intptr_t)&_btdm_data_start;
  1130. mem_end = (intptr_t)&_btdm_data_end;
  1131. if (mem_start != mem_end) {
  1132. ESP_LOGD(BTDM_LOG_TAG, "Release BTDM Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1133. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1134. }
  1135. }
  1136. return ESP_OK;
  1137. }
  1138. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  1139. {
  1140. int ret;
  1141. intptr_t mem_start, mem_end;
  1142. ret = esp_bt_controller_mem_release(mode);
  1143. if (ret != ESP_OK) {
  1144. return ret;
  1145. }
  1146. if (mode == ESP_BT_MODE_BTDM) {
  1147. mem_start = (intptr_t)&_bt_bss_start;
  1148. mem_end = (intptr_t)&_bt_bss_end;
  1149. if (mem_start != mem_end) {
  1150. ESP_LOGD(BTDM_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1151. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1152. }
  1153. mem_start = (intptr_t)&_bt_data_start;
  1154. mem_end = (intptr_t)&_bt_data_end;
  1155. if (mem_start != mem_end) {
  1156. ESP_LOGD(BTDM_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1157. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1158. }
  1159. mem_start = (intptr_t)&_nimble_bss_start;
  1160. mem_end = (intptr_t)&_nimble_bss_end;
  1161. if (mem_start != mem_end) {
  1162. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
  1163. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1164. }
  1165. mem_start = (intptr_t)&_nimble_data_start;
  1166. mem_end = (intptr_t)&_nimble_data_end;
  1167. if (mem_start != mem_end) {
  1168. ESP_LOGD(BTDM_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
  1169. ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
  1170. }
  1171. }
  1172. return ESP_OK;
  1173. }
  1174. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  1175. {
  1176. esp_err_t err;
  1177. uint32_t btdm_cfg_mask = 0;
  1178. //if all the bt available memory was already released, cannot initialize bluetooth controller
  1179. if (btdm_dram_available_region[0].mode == ESP_BT_MODE_IDLE) {
  1180. return ESP_ERR_INVALID_STATE;
  1181. }
  1182. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  1183. if (osi_funcs_p == NULL) {
  1184. return ESP_ERR_NO_MEM;
  1185. }
  1186. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  1187. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  1188. return ESP_ERR_INVALID_ARG;
  1189. }
  1190. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  1191. return ESP_ERR_INVALID_STATE;
  1192. }
  1193. if (cfg == NULL) {
  1194. return ESP_ERR_INVALID_ARG;
  1195. }
  1196. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  1197. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  1198. return ESP_ERR_INVALID_ARG;
  1199. }
  1200. //overwrite some parameters
  1201. cfg->bt_max_sync_conn = CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF;
  1202. cfg->magic = ESP_BT_CONTROLLER_CONFIG_MAGIC_VAL;
  1203. if (((cfg->mode & ESP_BT_MODE_BLE) && (cfg->ble_max_conn <= 0 || cfg->ble_max_conn > BTDM_CONTROLLER_BLE_MAX_CONN_LIMIT))
  1204. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_acl_conn <= 0 || cfg->bt_max_acl_conn > BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_LIMIT))
  1205. || ((cfg->mode & ESP_BT_MODE_CLASSIC_BT) && (cfg->bt_max_sync_conn > BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_LIMIT))) {
  1206. return ESP_ERR_INVALID_ARG;
  1207. }
  1208. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  1209. #if CONFIG_SPIRAM_USE_MALLOC
  1210. btdm_queue_table_mux = xSemaphoreCreateMutex();
  1211. if (btdm_queue_table_mux == NULL) {
  1212. return ESP_ERR_NO_MEM;
  1213. }
  1214. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1215. #endif
  1216. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  1217. if (s_wakeup_req_sem == NULL) {
  1218. err = ESP_ERR_NO_MEM;
  1219. goto error;
  1220. }
  1221. btdm_controller_mem_init();
  1222. periph_module_enable(PERIPH_BT_MODULE);
  1223. #ifdef CONFIG_PM_ENABLE
  1224. s_btdm_allow_light_sleep = false;
  1225. #endif
  1226. // set default sleep clock cycle and its fractional bits
  1227. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1228. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1229. #if CONFIG_BTDM_MODEM_SLEEP_MODE_ORIG
  1230. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1231. #if CONFIG_BTDM_LPCLK_SEL_EXT_32K_XTAL
  1232. // check whether or not EXT_CRYS is working
  1233. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  1234. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // set default value
  1235. #ifdef CONFIG_PM_ENABLE
  1236. s_btdm_allow_light_sleep = true;
  1237. #endif
  1238. } else {
  1239. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  1240. "light sleep mode will not be able to apply when bluetooth is enabled");
  1241. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1242. }
  1243. #else
  1244. btdm_lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  1245. #endif
  1246. bool select_src_ret, set_div_ret;
  1247. if (btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  1248. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  1249. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2 - 1);
  1250. assert(select_src_ret && set_div_ret);
  1251. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1252. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  1253. } else { // btdm_lpclk_sel == BTDM_LPCLK_SEL_XTAL32K
  1254. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  1255. set_div_ret = btdm_lpclk_set_div(0);
  1256. assert(select_src_ret && set_div_ret);
  1257. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  1258. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  1259. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  1260. assert(btdm_lpcycle_us != 0);
  1261. }
  1262. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_ORIG);
  1263. #elif CONFIG_BTDM_MODEM_SLEEP_MODE_EVED
  1264. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_EVED);
  1265. #else
  1266. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1267. #endif
  1268. #ifdef CONFIG_PM_ENABLE
  1269. if (!s_btdm_allow_light_sleep) {
  1270. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  1271. goto error;
  1272. }
  1273. }
  1274. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  1275. goto error;
  1276. }
  1277. esp_timer_create_args_t create_args = {
  1278. .callback = btdm_slp_tmr_callback,
  1279. .arg = NULL,
  1280. .name = "btSlp"
  1281. };
  1282. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  1283. goto error;
  1284. }
  1285. s_pm_lock_acquired = true;
  1286. #endif
  1287. btdm_cfg_mask = btdm_config_mask_load();
  1288. if (btdm_controller_init(btdm_cfg_mask, cfg) != 0) {
  1289. err = ESP_ERR_NO_MEM;
  1290. goto error;
  1291. }
  1292. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1293. return ESP_OK;
  1294. error:
  1295. #ifdef CONFIG_PM_ENABLE
  1296. if (!s_btdm_allow_light_sleep) {
  1297. if (s_light_sleep_pm_lock != NULL) {
  1298. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1299. s_light_sleep_pm_lock = NULL;
  1300. }
  1301. }
  1302. if (s_pm_lock != NULL) {
  1303. esp_pm_lock_delete(s_pm_lock);
  1304. s_pm_lock = NULL;
  1305. }
  1306. if (s_btdm_slp_tmr != NULL) {
  1307. esp_timer_delete(s_btdm_slp_tmr);
  1308. s_btdm_slp_tmr = NULL;
  1309. }
  1310. #endif
  1311. if (s_wakeup_req_sem) {
  1312. semphr_delete_wrapper(s_wakeup_req_sem);
  1313. s_wakeup_req_sem = NULL;
  1314. }
  1315. return err;
  1316. }
  1317. esp_err_t esp_bt_controller_deinit(void)
  1318. {
  1319. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1320. return ESP_ERR_INVALID_STATE;
  1321. }
  1322. btdm_controller_deinit();
  1323. periph_module_disable(PERIPH_BT_MODULE);
  1324. #ifdef CONFIG_PM_ENABLE
  1325. if (!s_btdm_allow_light_sleep) {
  1326. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1327. s_light_sleep_pm_lock = NULL;
  1328. }
  1329. if (s_pm_lock != NULL) {
  1330. esp_pm_lock_delete(s_pm_lock);
  1331. s_pm_lock = NULL;
  1332. }
  1333. if (s_btdm_slp_tmr != NULL) {
  1334. esp_timer_stop(s_btdm_slp_tmr);
  1335. esp_timer_delete(s_btdm_slp_tmr);
  1336. s_btdm_slp_tmr = NULL;
  1337. }
  1338. s_pm_lock_acquired = false;
  1339. #endif
  1340. semphr_delete_wrapper(s_wakeup_req_sem);
  1341. s_wakeup_req_sem = NULL;
  1342. #if CONFIG_SPIRAM_USE_MALLOC
  1343. vSemaphoreDelete(btdm_queue_table_mux);
  1344. btdm_queue_table_mux = NULL;
  1345. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  1346. #endif
  1347. free(osi_funcs_p);
  1348. osi_funcs_p = NULL;
  1349. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1350. btdm_lpcycle_us = 0;
  1351. btdm_controller_set_sleep_mode(BTDM_MODEM_SLEEP_MODE_NONE);
  1352. return ESP_OK;
  1353. }
  1354. static void bt_shutdown(void)
  1355. {
  1356. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1357. return;
  1358. }
  1359. esp_bt_controller_shutdown();
  1360. esp_phy_disable();
  1361. return;
  1362. }
  1363. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1364. {
  1365. int ret;
  1366. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1367. return ESP_ERR_INVALID_STATE;
  1368. }
  1369. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1370. if (mode != btdm_controller_get_mode()) {
  1371. return ESP_ERR_INVALID_ARG;
  1372. }
  1373. #ifdef CONFIG_PM_ENABLE
  1374. if (!s_btdm_allow_light_sleep) {
  1375. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1376. }
  1377. esp_pm_lock_acquire(s_pm_lock);
  1378. #endif
  1379. esp_phy_enable();
  1380. #if CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
  1381. coex_init();
  1382. #endif
  1383. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1384. btdm_controller_enable_sleep(true);
  1385. }
  1386. // inititalize bluetooth baseband
  1387. btdm_check_and_init_bb();
  1388. ret = btdm_controller_enable(mode);
  1389. if (ret != 0) {
  1390. #if CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
  1391. coex_deinit();
  1392. #endif
  1393. esp_phy_disable();
  1394. #ifdef CONFIG_PM_ENABLE
  1395. if (!s_btdm_allow_light_sleep) {
  1396. esp_pm_lock_release(s_light_sleep_pm_lock);
  1397. }
  1398. esp_pm_lock_release(s_pm_lock);
  1399. #endif
  1400. return ESP_ERR_INVALID_STATE;
  1401. }
  1402. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1403. ret = esp_register_shutdown_handler(bt_shutdown);
  1404. if (ret != ESP_OK) {
  1405. ESP_LOGW(BTDM_LOG_TAG, "Register shutdown handler failed, ret = 0x%x", ret);
  1406. }
  1407. return ESP_OK;
  1408. }
  1409. esp_err_t esp_bt_controller_disable(void)
  1410. {
  1411. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1412. return ESP_ERR_INVALID_STATE;
  1413. }
  1414. // disable modem sleep and wake up from sleep mode
  1415. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG) {
  1416. btdm_controller_enable_sleep(false);
  1417. async_wakeup_request(BTDM_ASYNC_WAKEUP_REQ_CTRL_DISA);
  1418. while (!btdm_power_state_active()) {
  1419. ets_delay_us(1000);
  1420. }
  1421. }
  1422. btdm_controller_disable();
  1423. #if CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
  1424. coex_deinit();
  1425. #endif
  1426. esp_phy_disable();
  1427. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1428. esp_unregister_shutdown_handler(bt_shutdown);
  1429. #ifdef CONFIG_PM_ENABLE
  1430. if (!s_btdm_allow_light_sleep) {
  1431. esp_pm_lock_release(s_light_sleep_pm_lock);
  1432. }
  1433. esp_pm_lock_release(s_pm_lock);
  1434. #endif
  1435. return ESP_OK;
  1436. }
  1437. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1438. {
  1439. return btdm_controller_status;
  1440. }
  1441. /* extra functions */
  1442. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1443. {
  1444. if (ble_txpwr_set(power_type, power_level) != 0) {
  1445. return ESP_ERR_INVALID_ARG;
  1446. }
  1447. return ESP_OK;
  1448. }
  1449. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1450. {
  1451. return (esp_power_level_t)ble_txpwr_get(power_type);
  1452. }
  1453. esp_err_t esp_bredr_tx_power_set(esp_power_level_t min_power_level, esp_power_level_t max_power_level)
  1454. {
  1455. esp_err_t err;
  1456. int ret;
  1457. ret = bredr_txpwr_set(min_power_level, max_power_level);
  1458. if (ret == 0) {
  1459. err = ESP_OK;
  1460. } else if (ret == -1) {
  1461. err = ESP_ERR_INVALID_ARG;
  1462. } else {
  1463. err = ESP_ERR_INVALID_STATE;
  1464. }
  1465. return err;
  1466. }
  1467. esp_err_t esp_bredr_tx_power_get(esp_power_level_t *min_power_level, esp_power_level_t *max_power_level)
  1468. {
  1469. if (bredr_txpwr_get((int *)min_power_level, (int *)max_power_level) != 0) {
  1470. return ESP_ERR_INVALID_ARG;
  1471. }
  1472. return ESP_OK;
  1473. }
  1474. esp_err_t esp_bt_sleep_enable (void)
  1475. {
  1476. esp_err_t status;
  1477. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1478. return ESP_ERR_INVALID_STATE;
  1479. }
  1480. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1481. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1482. btdm_controller_enable_sleep (true);
  1483. status = ESP_OK;
  1484. } else {
  1485. status = ESP_ERR_NOT_SUPPORTED;
  1486. }
  1487. return status;
  1488. }
  1489. esp_err_t esp_bt_sleep_disable (void)
  1490. {
  1491. esp_err_t status;
  1492. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1493. return ESP_ERR_INVALID_STATE;
  1494. }
  1495. if (btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_ORIG ||
  1496. btdm_controller_get_sleep_mode() == BTDM_MODEM_SLEEP_MODE_EVED) {
  1497. btdm_controller_enable_sleep (false);
  1498. status = ESP_OK;
  1499. } else {
  1500. status = ESP_ERR_NOT_SUPPORTED;
  1501. }
  1502. return status;
  1503. }
  1504. esp_err_t esp_bredr_sco_datapath_set(esp_sco_data_path_t data_path)
  1505. {
  1506. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1507. return ESP_ERR_INVALID_STATE;
  1508. }
  1509. bredr_sco_datapath_set(data_path);
  1510. return ESP_OK;
  1511. }
  1512. esp_err_t esp_ble_scan_dupilcate_list_flush(void)
  1513. {
  1514. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1515. return ESP_ERR_INVALID_STATE;
  1516. }
  1517. btdm_controller_scan_duplicate_list_clear();
  1518. return ESP_OK;
  1519. }
  1520. #endif /* CONFIG_BT_ENABLED */