idf_performance_target.h 5.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. #pragma once
  2. // AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
  3. #define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC 8.2
  4. #define IDF_PERFORMANCE_MIN_AES_GCM_THROUGHPUT_MBSEC 0.5
  5. // SHA256 hardware throughput at 240MHz, threshold set lower than worst case
  6. #define IDF_PERFORMANCE_MIN_SHA256_THROUGHPUT_MBSEC 8.0
  7. // esp_sha() time to process 32KB of input data from RAM
  8. #define IDF_PERFORMANCE_MAX_TIME_SHA1_32KB 5000
  9. #define IDF_PERFORMANCE_MAX_TIME_SHA512_32KB 4500
  10. #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PUBLIC_OP 19000
  11. #define IDF_PERFORMANCE_MAX_RSA_2048KEY_PRIVATE_OP 190000
  12. #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PUBLIC_OP 90000
  13. #define IDF_PERFORMANCE_MAX_RSA_4096KEY_PRIVATE_OP 870000
  14. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING 30
  15. #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_NO_POLLING_NO_DMA 27
  16. /*
  17. * Flash Performance value
  18. * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
  19. * These thresholds are set to about 70% of the average test data, under certain condition.
  20. * Contact Espressif for details.
  21. */
  22. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
  23. //The single_core config is much faster than other configs. Use the value of other configs
  24. //Collect data and correct it later
  25. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B 0
  26. #endif
  27. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
  28. //The single_core config is much faster than other configs. Use the value of other configs
  29. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B 35300
  30. #endif
  31. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
  32. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB (697*1000)
  33. #endif
  34. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
  35. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB (6780*1000)
  36. #endif
  37. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
  38. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  39. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE 11200
  40. #endif
  41. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
  42. //The single_core config is much faster than other configs. Use the value of other configs
  43. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 20100
  44. #endif
  45. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
  46. //The single_core config is much faster than other configs. Use the value of other configs
  47. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 35200
  48. #endif
  49. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
  50. //Collect data and correct it later
  51. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB 0
  52. #endif
  53. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
  54. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB (6650*1000)
  55. #endif
  56. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
  57. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  58. //Collect data and correct it later
  59. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE 0
  60. #endif
  61. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
  62. //The single_core config is much faster than other configs. Use the value of other configs
  63. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B 16200
  64. #endif
  65. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
  66. //The single_core config is much faster than other configs. Use the value of other configs
  67. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B 33600
  68. #endif
  69. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
  70. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB (484*1000)
  71. #endif
  72. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
  73. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB (1512*1000)
  74. #endif
  75. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
  76. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  77. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE 49600
  78. #endif
  79. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
  80. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 73500
  81. #endif
  82. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
  83. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (261*1000)
  84. #endif
  85. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
  86. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB (470*1000)
  87. #endif
  88. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
  89. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB (261*1000)
  90. #endif
  91. #ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
  92. //erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
  93. #define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE 30900
  94. #endif
  95. // floating point instructions per divide and per sqrt (configured for worst-case with PSRAM workaround)
  96. #define IDF_PERFORMANCE_MAX_CYCLES_PER_DIV 70
  97. #define IDF_PERFORMANCE_MAX_CYCLES_PER_SQRT 140