test_sd.c 20 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stdio.h>
  15. #include <stdlib.h>
  16. #include <string.h>
  17. #include "unity.h"
  18. #include "driver/gpio.h"
  19. #include "soc/soc_caps.h"
  20. #ifdef SOC_SDMMC_HOST_SUPPORTED
  21. #include "driver/sdmmc_host.h"
  22. #endif
  23. #include "driver/sdspi_host.h"
  24. #include "driver/sdmmc_defs.h"
  25. #include "sdmmc_cmd.h"
  26. #include "esp_log.h"
  27. #include "esp_heap_caps.h"
  28. #include <time.h>
  29. #include <sys/time.h>
  30. #include <unistd.h>
  31. // Can't test eMMC (slot 0) and PSRAM together
  32. #ifndef CONFIG_SPIRAM
  33. #define WITH_EMMC_TEST
  34. #endif
  35. /* power supply enable pin */
  36. #define SD_TEST_BOARD_VSEL_EN_GPIO 27
  37. /* power supply voltage select pin */
  38. #define SD_TEST_BOARD_VSEL_GPIO 26
  39. #define SD_TEST_BOARD_VSEL_3V3 1
  40. #define SD_TEST_BOARD_VSEL_1V8 0
  41. #define TEST_SDSPI_DMACHAN 1
  42. /* time to wait for reset / power-on */
  43. #define SD_TEST_BOARD_PWR_RST_DELAY_MS 5
  44. #define SD_TEST_BOARD_PWR_ON_DELAY_MS 50
  45. /* gpio which is not connected to actual CD pin, used to simulate CD behavior */
  46. #define CD_WP_TEST_GPIO 18
  47. __attribute__((unused)) static void sd_test_board_power_on(void)
  48. {
  49. gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
  50. gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
  51. gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT);
  52. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
  53. usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000);
  54. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1);
  55. usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
  56. }
  57. __attribute__((unused)) static void sd_test_board_power_off(void)
  58. {
  59. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
  60. gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
  61. gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0);
  62. gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT);
  63. }
  64. TEST_CASE("MMC_RSP_BITS", "[sd]")
  65. {
  66. uint32_t data[2] = { 0x01234567, 0x89abcdef };
  67. TEST_ASSERT_EQUAL_HEX32(0x7, MMC_RSP_BITS(data, 0, 4));
  68. TEST_ASSERT_EQUAL_HEX32(0x567, MMC_RSP_BITS(data, 0, 12));
  69. TEST_ASSERT_EQUAL_HEX32(0xf0, MMC_RSP_BITS(data, 28, 8));
  70. TEST_ASSERT_EQUAL_HEX32(0x3, MMC_RSP_BITS(data, 1, 3));
  71. TEST_ASSERT_EQUAL_HEX32(0x11, MMC_RSP_BITS(data, 59, 5));
  72. }
  73. #ifdef SOC_SDMMC_HOST_SUPPORTED
  74. static void probe_sd(int slot, int width, int freq_khz, int ddr)
  75. {
  76. sd_test_board_power_on();
  77. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  78. config.slot = slot;
  79. config.max_freq_khz = freq_khz;
  80. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  81. if (width == 1) {
  82. config.flags = SDMMC_HOST_FLAG_1BIT;
  83. slot_config.width = 1;
  84. } else if (width == 4) {
  85. config.flags &= ~SDMMC_HOST_FLAG_8BIT;
  86. slot_config.width = 4;
  87. } else {
  88. assert(!ddr && "host driver does not support 8-line DDR mode yet");
  89. }
  90. if (!ddr) {
  91. config.flags &= ~SDMMC_HOST_FLAG_DDR;
  92. }
  93. TEST_ESP_OK(sdmmc_host_init());
  94. TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
  95. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  96. TEST_ASSERT_NOT_NULL(card);
  97. TEST_ESP_OK(sdmmc_card_init(&config, card));
  98. sdmmc_card_print_info(stdout, card);
  99. uint8_t* buffer = heap_caps_malloc(512, MALLOC_CAP_DMA);
  100. TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 0, 1));
  101. free(buffer);
  102. TEST_ESP_OK(sdmmc_host_deinit());
  103. free(card);
  104. sd_test_board_power_off();
  105. }
  106. TEST_CASE("probe SD, slot 1, 4-bit", "[sd][test_env=UT_T1_SDMODE]")
  107. {
  108. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_PROBING, 0);
  109. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_DEFAULT, 0);
  110. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_HIGHSPEED, 0);
  111. }
  112. TEST_CASE("probe SD, slot 1, 1-bit", "[sd][test_env=UT_T1_SDMODE]")
  113. {
  114. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_PROBING, 0);
  115. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_DEFAULT, 0);
  116. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, 0);
  117. }
  118. #ifdef WITH_EMMC_TEST
  119. TEST_CASE("probe eMMC, slot 0, 4-bit, DDR", "[sd][test_env=EMMC]")
  120. {
  121. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 1);
  122. }
  123. TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]")
  124. {
  125. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_PROBING, 0);
  126. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_DEFAULT, 0);
  127. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, 0);
  128. }
  129. #endif // WITH_EMMC_TEST
  130. TEST_CASE("probe SD, slot 0, 4-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
  131. {
  132. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0);
  133. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0);
  134. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0);
  135. }
  136. TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
  137. {
  138. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0);
  139. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0);
  140. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0);
  141. }
  142. #endif
  143. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
  144. //No runners
  145. static void test_sdspi_init_bus(spi_host_device_t host, int mosi_pin, int miso_pin, int clk_pin, int dma_chan)
  146. {
  147. spi_bus_config_t bus_config = {
  148. .mosi_io_num = mosi_pin,
  149. .miso_io_num = miso_pin,
  150. .sclk_io_num = clk_pin,
  151. .quadwp_io_num = -1,
  152. .quadhd_io_num = -1,
  153. };
  154. esp_err_t err = spi_bus_initialize(host, &bus_config, dma_chan);
  155. TEST_ESP_OK(err);
  156. }
  157. static void test_sdspi_deinit_bus(spi_host_device_t host)
  158. {
  159. esp_err_t err = spi_bus_free(host);
  160. TEST_ESP_OK(err);
  161. }
  162. static void probe_core(int slot)
  163. {
  164. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  165. config.slot = slot;
  166. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  167. TEST_ASSERT_NOT_NULL(card);
  168. TEST_ESP_OK(sdmmc_card_init(&config, card));
  169. sdmmc_card_print_info(stdout, card);
  170. free(card);
  171. }
  172. static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs)
  173. {
  174. sd_test_board_power_on();
  175. sdspi_dev_handle_t handle;
  176. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  177. dev_config.gpio_cs = pin_cs;
  178. test_sdspi_init_bus(dev_config.host_id, pin_mosi, pin_miso, pin_sck, TEST_SDSPI_DMACHAN);
  179. TEST_ESP_OK(sdspi_host_init());
  180. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  181. probe_core(handle);
  182. TEST_ESP_OK(sdspi_host_deinit());
  183. test_sdspi_deinit_bus(dev_config.host_id);
  184. sd_test_board_power_off();
  185. }
  186. static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs)
  187. {
  188. sd_test_board_power_on();
  189. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  190. sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
  191. slot_config.gpio_miso = pin_miso;
  192. slot_config.gpio_mosi = pin_mosi;
  193. slot_config.gpio_sck = pin_sck;
  194. slot_config.gpio_cs = pin_cs;
  195. TEST_ESP_OK(sdspi_host_init());
  196. TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
  197. probe_core(config.slot);
  198. TEST_ESP_OK(sdspi_host_deinit());
  199. sd_test_board_power_off();
  200. }
  201. TEST_CASE("probe SD in SPI mode, slot 1", "[sd][test_env=UT_T1_SPIMODE]")
  202. {
  203. probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
  204. probe_spi_legacy(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
  205. }
  206. TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]")
  207. {
  208. probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
  209. probe_spi_legacy(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
  210. }
  211. #endif //DISABLED(ESP32S2)
  212. // Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated
  213. // from 'rand' with the starting value of 'seed'
  214. __attribute__((unused)) static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) {
  215. srand(seed);
  216. for (size_t i = 0; i < count; ++i) {
  217. uint32_t val = rand();
  218. memcpy(dst + i * sizeof(uint32_t), &val, sizeof(val));
  219. }
  220. }
  221. // Check if the buffer pointed to by 'dst' contains 'count' 32-bit
  222. // ints generated from 'rand' with the starting value of 'seed'
  223. __attribute__((unused)) static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) {
  224. srand(seed);
  225. for (size_t i = 0; i < count; ++i) {
  226. uint32_t val;
  227. memcpy(&val, src + i * sizeof(uint32_t), sizeof(val));
  228. TEST_ASSERT_EQUAL_HEX32(rand(), val);
  229. }
  230. }
  231. __attribute__((unused)) static void do_single_write_read_test(sdmmc_card_t* card,
  232. size_t start_block, size_t block_count, size_t alignment)
  233. {
  234. size_t block_size = card->csd.sector_size;
  235. size_t total_size = block_size * block_count;
  236. printf(" %8d | %3d | %d | %4.1f ", start_block, block_count, alignment, total_size / 1024.0f);
  237. uint32_t* buffer = heap_caps_malloc(total_size + 4, MALLOC_CAP_DMA);
  238. size_t offset = alignment % 4;
  239. uint8_t* c_buffer = (uint8_t*) buffer + offset;
  240. fill_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
  241. struct timeval t_start_wr;
  242. gettimeofday(&t_start_wr, NULL);
  243. TEST_ESP_OK(sdmmc_write_sectors(card, c_buffer, start_block, block_count));
  244. struct timeval t_stop_wr;
  245. gettimeofday(&t_stop_wr, NULL);
  246. float time_wr = 1e3f * (t_stop_wr.tv_sec - t_start_wr.tv_sec) + 1e-3f * (t_stop_wr.tv_usec - t_start_wr.tv_usec);
  247. memset(buffer, 0xbb, total_size + 4);
  248. struct timeval t_start_rd;
  249. gettimeofday(&t_start_rd, NULL);
  250. TEST_ESP_OK(sdmmc_read_sectors(card, c_buffer, start_block, block_count));
  251. struct timeval t_stop_rd;
  252. gettimeofday(&t_stop_rd, NULL);
  253. float time_rd = 1e3f * (t_stop_rd.tv_sec - t_start_rd.tv_sec) + 1e-3f * (t_stop_rd.tv_usec - t_start_rd.tv_usec);
  254. printf(" | %6.2f | %5.2f | %6.2f | %5.2f\n",
  255. time_wr, total_size / (time_wr / 1000) / (1024 * 1024),
  256. time_rd, total_size / (time_rd / 1000) / (1024 * 1024));
  257. check_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
  258. free(buffer);
  259. }
  260. __attribute__((unused)) static void read_write_test(sdmmc_card_t* card)
  261. {
  262. sdmmc_card_print_info(stdout, card);
  263. printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n");
  264. do_single_write_read_test(card, 0, 1, 4);
  265. do_single_write_read_test(card, 0, 4, 4);
  266. do_single_write_read_test(card, 1, 16, 4);
  267. do_single_write_read_test(card, 16, 32, 4);
  268. do_single_write_read_test(card, 48, 64, 4);
  269. do_single_write_read_test(card, 128, 128, 4);
  270. do_single_write_read_test(card, card->csd.capacity - 64, 32, 4);
  271. do_single_write_read_test(card, card->csd.capacity - 64, 64, 4);
  272. do_single_write_read_test(card, card->csd.capacity - 8, 1, 4);
  273. do_single_write_read_test(card, card->csd.capacity/2, 1, 4);
  274. do_single_write_read_test(card, card->csd.capacity/2, 4, 4);
  275. do_single_write_read_test(card, card->csd.capacity/2, 8, 4);
  276. do_single_write_read_test(card, card->csd.capacity/2, 16, 4);
  277. do_single_write_read_test(card, card->csd.capacity/2, 32, 4);
  278. do_single_write_read_test(card, card->csd.capacity/2, 64, 4);
  279. do_single_write_read_test(card, card->csd.capacity/2, 128, 4);
  280. do_single_write_read_test(card, card->csd.capacity/2, 1, 1);
  281. do_single_write_read_test(card, card->csd.capacity/2, 8, 1);
  282. do_single_write_read_test(card, card->csd.capacity/2, 128, 1);
  283. }
  284. #ifdef SOC_SDMMC_HOST_SUPPORTED
  285. void test_sd_rw_blocks(int slot, int width)
  286. {
  287. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  288. config.max_freq_khz = SDMMC_FREQ_HIGHSPEED;
  289. config.slot = slot;
  290. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  291. if (width != 0) {
  292. slot_config.width = width;
  293. }
  294. if (slot_config.width == 8) {
  295. config.flags &= ~SDMMC_HOST_FLAG_DDR;
  296. }
  297. TEST_ESP_OK(sdmmc_host_init());
  298. TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
  299. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  300. TEST_ASSERT_NOT_NULL(card);
  301. TEST_ESP_OK(sdmmc_card_init(&config, card));
  302. read_write_test(card);
  303. free(card);
  304. TEST_ESP_OK(sdmmc_host_deinit());
  305. }
  306. TEST_CASE("SDMMC read/write test (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]")
  307. {
  308. sd_test_board_power_on();
  309. test_sd_rw_blocks(1, 4);
  310. sd_test_board_power_off();
  311. }
  312. #ifdef WITH_EMMC_TEST
  313. TEST_CASE("SDMMC read/write test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
  314. {
  315. sd_test_board_power_on();
  316. test_sd_rw_blocks(0, 4);
  317. sd_test_board_power_off();
  318. }
  319. TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
  320. {
  321. sd_test_board_power_on();
  322. test_sd_rw_blocks(0, 8);
  323. sd_test_board_power_off();
  324. }
  325. #endif // WITH_EMMC_TEST
  326. #endif // SDMMC_HOST_SUPPORTED
  327. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
  328. //No runners
  329. TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
  330. {
  331. sd_test_board_power_on();
  332. sdspi_dev_handle_t handle;
  333. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  334. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  335. TEST_ESP_OK(sdspi_host_init());
  336. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  337. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  338. config.slot = handle;
  339. // This test can only run under 20MHz on ESP32, because the runner connects the card to
  340. // non-IOMUX pins of HSPI.
  341. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  342. TEST_ASSERT_NOT_NULL(card);
  343. TEST_ESP_OK(sdmmc_card_init(&config, card));
  344. read_write_test(card);
  345. TEST_ESP_OK(sdspi_host_deinit());
  346. free(card);
  347. test_sdspi_deinit_bus(dev_config.host_id);
  348. sd_test_board_power_off();
  349. }
  350. #endif //DISABLED_FOR_TARGETS(ESP32S2)
  351. #ifdef SOC_SDMMC_HOST_SUPPORTED
  352. TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]")
  353. {
  354. sd_test_board_power_on();
  355. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  356. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  357. TEST_ESP_OK(sdmmc_host_init());
  358. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  359. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  360. TEST_ASSERT_NOT_NULL(card);
  361. TEST_ESP_OK(sdmmc_card_init(&config, card));
  362. const size_t buffer_size = 4096;
  363. const size_t block_count = buffer_size / 512;
  364. const size_t extra = 4;
  365. uint8_t* buffer = heap_caps_malloc(buffer_size + extra, MALLOC_CAP_DMA);
  366. // Check read behavior: do aligned write, then unaligned read
  367. const uint32_t seed = 0x89abcdef;
  368. fill_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
  369. TEST_ESP_OK(sdmmc_write_sectors(card, buffer, 0, block_count));
  370. memset(buffer, 0xcc, buffer_size + extra);
  371. TEST_ESP_OK(sdmmc_read_sectors(card, buffer + 1, 0, block_count));
  372. check_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
  373. // Check write behavior: do unaligned write, then aligned read
  374. fill_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
  375. TEST_ESP_OK(sdmmc_write_sectors(card, buffer + 1, 8, block_count));
  376. memset(buffer, 0xcc, buffer_size + extra);
  377. TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 8, block_count));
  378. check_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
  379. free(buffer);
  380. free(card);
  381. TEST_ESP_OK(sdmmc_host_deinit());
  382. sd_test_board_power_off();
  383. }
  384. #endif
  385. __attribute__((unused)) static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config)
  386. {
  387. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  388. TEST_ASSERT_NOT_NULL(card);
  389. // SDMMC host should have configured CD as input.
  390. // Enable output as well (not using the driver, to avoid touching input
  391. // enable bits).
  392. gpio_matrix_out(gpio_cd_num, SIG_GPIO_OUT_IDX, false, false);
  393. REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_cd_num));
  394. // Check that card initialization fails if CD is high
  395. REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_cd_num));
  396. usleep(1000);
  397. TEST_ESP_ERR(ESP_ERR_NOT_FOUND, sdmmc_card_init(config, card));
  398. // Check that card initialization succeeds if CD is low
  399. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_cd_num));
  400. usleep(1000);
  401. TEST_ESP_OK(sdmmc_card_init(config, card));
  402. free(card);
  403. }
  404. #ifdef SOC_SDMMC_HOST_SUPPORTED
  405. TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
  406. {
  407. sd_test_board_power_on();
  408. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  409. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  410. slot_config.gpio_cd = CD_WP_TEST_GPIO;
  411. TEST_ESP_OK(sdmmc_host_init());
  412. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  413. test_cd_input(CD_WP_TEST_GPIO, &config);
  414. TEST_ESP_OK(sdmmc_host_deinit());
  415. sd_test_board_power_off();
  416. }
  417. #endif
  418. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
  419. //No runners
  420. TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
  421. {
  422. sd_test_board_power_on();
  423. sdspi_dev_handle_t handle;
  424. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  425. dev_config.gpio_cd = CD_WP_TEST_GPIO;
  426. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  427. TEST_ESP_OK(sdspi_host_init());
  428. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  429. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  430. config.slot = handle;
  431. test_cd_input(CD_WP_TEST_GPIO, &config);
  432. TEST_ESP_OK(sdspi_host_deinit());
  433. test_sdspi_deinit_bus(dev_config.host_id);
  434. sd_test_board_power_off();
  435. }
  436. #endif //DISABLED_FOR_TARGETS(ESP32S2)
  437. __attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config)
  438. {
  439. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  440. TEST_ASSERT_NOT_NULL(card);
  441. // SDMMC host should have configured WP as input.
  442. // Enable output as well (not using the driver, to avoid touching input
  443. // enable bits).
  444. gpio_matrix_out(gpio_wp_num, SIG_GPIO_OUT_IDX, false, false);
  445. REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_wp_num));
  446. // Check that the card can be initialized with WP low
  447. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
  448. TEST_ESP_OK(sdmmc_card_init(config, card));
  449. uint32_t* data = heap_caps_calloc(1, 512, MALLOC_CAP_DMA);
  450. // Check that card write succeeds if WP is high
  451. REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_wp_num));
  452. usleep(1000);
  453. TEST_ESP_OK(sdmmc_write_sectors(card, &data, 0, 1));
  454. // Check that write fails if WP is low
  455. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
  456. usleep(1000);
  457. TEST_ESP_ERR(ESP_ERR_INVALID_STATE, sdmmc_write_sectors(card, &data, 0, 1));
  458. // ...but reads still work
  459. TEST_ESP_OK(sdmmc_read_sectors(card, &data, 0, 1));
  460. free(data);
  461. free(card);
  462. }
  463. #ifdef SOC_SDMMC_HOST_SUPPORTED
  464. TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
  465. {
  466. sd_test_board_power_on();
  467. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  468. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  469. slot_config.gpio_wp = CD_WP_TEST_GPIO;
  470. TEST_ESP_OK(sdmmc_host_init());
  471. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  472. test_wp_input(CD_WP_TEST_GPIO, &config);
  473. TEST_ESP_OK(sdmmc_host_deinit());
  474. sd_test_board_power_off();
  475. }
  476. #endif
  477. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
  478. //No runners
  479. TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
  480. {
  481. sd_test_board_power_on();
  482. sdspi_dev_handle_t handle;
  483. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  484. dev_config.gpio_wp = CD_WP_TEST_GPIO;
  485. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  486. TEST_ESP_OK(sdspi_host_init());
  487. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  488. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  489. config.slot = handle;
  490. test_wp_input(CD_WP_TEST_GPIO, &config);
  491. TEST_ESP_OK(sdspi_host_deinit());
  492. test_sdspi_deinit_bus(dev_config.host_id);
  493. sd_test_board_power_off();
  494. }
  495. #endif //DISABLED_FOR_TARGETS(ESP32S2)