vfs_uart.c 29 KB

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  1. // Copyright 2015-2017 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <string.h>
  15. #include <stdbool.h>
  16. #include <stdarg.h>
  17. #include <sys/errno.h>
  18. #include <sys/lock.h>
  19. #include <sys/fcntl.h>
  20. #include <sys/param.h>
  21. #include "esp_vfs.h"
  22. #include "esp_vfs_dev.h"
  23. #include "esp_attr.h"
  24. #include "soc/uart_periph.h"
  25. #include "driver/uart.h"
  26. #include "sdkconfig.h"
  27. #include "driver/uart_select.h"
  28. #if CONFIG_IDF_TARGET_ESP32
  29. #include "esp32/rom/uart.h"
  30. #elif CONFIG_IDF_TARGET_ESP32S2
  31. #include "esp32s2/rom/uart.h"
  32. #endif
  33. // TODO: make the number of UARTs chip dependent
  34. #define UART_NUM SOC_UART_NUM
  35. // Token signifying that no character is available
  36. #define NONE -1
  37. #if CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF
  38. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CRLF
  39. #elif CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR
  40. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_CR
  41. #else
  42. # define DEFAULT_TX_MODE ESP_LINE_ENDINGS_LF
  43. #endif
  44. #if CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF
  45. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CRLF
  46. #elif CONFIG_NEWLIB_STDIN_LINE_ENDING_CR
  47. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_CR
  48. #else
  49. # define DEFAULT_RX_MODE ESP_LINE_ENDINGS_LF
  50. #endif
  51. // UART write bytes function type
  52. typedef void (*tx_func_t)(int, int);
  53. // UART read bytes function type
  54. typedef int (*rx_func_t)(int);
  55. // Basic functions for sending and receiving bytes over UART
  56. static void uart_tx_char(int fd, int c);
  57. static int uart_rx_char(int fd);
  58. // Functions for sending and receiving bytes which use UART driver
  59. static void uart_tx_char_via_driver(int fd, int c);
  60. static int uart_rx_char_via_driver(int fd);
  61. typedef struct {
  62. // Pointers to UART peripherals
  63. uart_dev_t* uart;
  64. // One-character buffer used for newline conversion code, per UART
  65. int peek_char;
  66. // per-UART locks, lazily initialized
  67. _lock_t read_lock;
  68. _lock_t write_lock;
  69. // Per-UART non-blocking flag. Note: default implementation does not honor this
  70. // flag, all reads are non-blocking. This option becomes effective if UART
  71. // driver is used.
  72. bool non_blocking;
  73. // Newline conversion mode when transmitting
  74. esp_line_endings_t tx_mode;
  75. // Newline conversion mode when receiving
  76. esp_line_endings_t rx_mode;
  77. // Functions used to write bytes to UART. Default to "basic" functions.
  78. tx_func_t tx_func;
  79. // Functions used to read bytes from UART. Default to "basic" functions.
  80. rx_func_t rx_func;
  81. } vfs_uart_context_t;
  82. #define VFS_CTX_DEFAULT_VAL(uart_dev) (vfs_uart_context_t) {\
  83. .uart = (uart_dev),\
  84. .peek_char = NONE,\
  85. .tx_mode = DEFAULT_TX_MODE,\
  86. .rx_mode = DEFAULT_RX_MODE,\
  87. .tx_func = uart_tx_char,\
  88. .rx_func = uart_rx_char,\
  89. }
  90. //If the context should be dynamically initialized, remove this structure
  91. //and point s_ctx to allocated data.
  92. static vfs_uart_context_t s_context[UART_NUM] = {
  93. VFS_CTX_DEFAULT_VAL(&UART0),
  94. VFS_CTX_DEFAULT_VAL(&UART1),
  95. #if UART_NUM > 2
  96. VFS_CTX_DEFAULT_VAL(&UART2),
  97. #endif
  98. };
  99. static vfs_uart_context_t* s_ctx[UART_NUM] = {
  100. &s_context[0],
  101. &s_context[1],
  102. #if UART_NUM > 2
  103. &s_context[2],
  104. #endif
  105. };
  106. #ifdef CONFIG_VFS_SUPPORT_SELECT
  107. typedef struct {
  108. esp_vfs_select_sem_t select_sem;
  109. fd_set *readfds;
  110. fd_set *writefds;
  111. fd_set *errorfds;
  112. fd_set readfds_orig;
  113. fd_set writefds_orig;
  114. fd_set errorfds_orig;
  115. } uart_select_args_t;
  116. static uart_select_args_t **s_registered_selects = NULL;
  117. static int s_registered_select_num = 0;
  118. static portMUX_TYPE s_registered_select_lock = portMUX_INITIALIZER_UNLOCKED;
  119. static esp_err_t uart_end_select(void *end_select_args);
  120. #endif // CONFIG_VFS_SUPPORT_SELECT
  121. static int uart_open(const char * path, int flags, int mode)
  122. {
  123. // this is fairly primitive, we should check if file is opened read only,
  124. // and error out if write is requested
  125. int fd = -1;
  126. if (strcmp(path, "/0") == 0) {
  127. fd = 0;
  128. } else if (strcmp(path, "/1") == 0) {
  129. fd = 1;
  130. } else if (strcmp(path, "/2") == 0) {
  131. fd = 2;
  132. } else {
  133. errno = ENOENT;
  134. return fd;
  135. }
  136. s_ctx[fd]->non_blocking = ((flags & O_NONBLOCK) == O_NONBLOCK);
  137. return fd;
  138. }
  139. static void uart_tx_char(int fd, int c)
  140. {
  141. uart_dev_t* uart = s_ctx[fd]->uart;
  142. while (uart->status.txfifo_cnt >= 127) {
  143. ;
  144. }
  145. #if CONFIG_IDF_TARGET_ESP32
  146. uart->fifo.rw_byte = c;
  147. #elif CONFIG_IDF_TARGET_ESP32S2
  148. uart->ahb_fifo.rw_byte = c;
  149. #endif
  150. }
  151. static void uart_tx_char_via_driver(int fd, int c)
  152. {
  153. char ch = (char) c;
  154. uart_write_bytes(fd, &ch, 1);
  155. }
  156. static int uart_rx_char(int fd)
  157. {
  158. uart_dev_t* uart = s_ctx[fd]->uart;
  159. if (uart->status.rxfifo_cnt == 0) {
  160. return NONE;
  161. }
  162. #if CONFIG_IDF_TARGET_ESP32
  163. return uart->fifo.rw_byte;
  164. #elif CONFIG_IDF_TARGET_ESP32S2
  165. return READ_PERI_REG(UART_FIFO_AHB_REG(fd));
  166. #endif
  167. }
  168. static int uart_rx_char_via_driver(int fd)
  169. {
  170. uint8_t c;
  171. int timeout = s_ctx[fd]->non_blocking ? 0 : portMAX_DELAY;
  172. int n = uart_read_bytes(fd, &c, 1, timeout);
  173. if (n <= 0) {
  174. return NONE;
  175. }
  176. return c;
  177. }
  178. static ssize_t uart_write(int fd, const void * data, size_t size)
  179. {
  180. assert(fd >=0 && fd < 3);
  181. const char *data_c = (const char *)data;
  182. /* Even though newlib does stream locking on each individual stream, we need
  183. * a dedicated UART lock if two streams (stdout and stderr) point to the
  184. * same UART.
  185. */
  186. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  187. for (size_t i = 0; i < size; i++) {
  188. int c = data_c[i];
  189. if (c == '\n' && s_ctx[fd]->tx_mode != ESP_LINE_ENDINGS_LF) {
  190. s_ctx[fd]->tx_func(fd, '\r');
  191. if (s_ctx[fd]->tx_mode == ESP_LINE_ENDINGS_CR) {
  192. continue;
  193. }
  194. }
  195. s_ctx[fd]->tx_func(fd, c);
  196. }
  197. _lock_release_recursive(&s_ctx[fd]->write_lock);
  198. return size;
  199. }
  200. /* Helper function which returns a previous character or reads a new one from
  201. * UART. Previous character can be returned ("pushed back") using
  202. * uart_return_char function.
  203. */
  204. static int uart_read_char(int fd)
  205. {
  206. /* return character from peek buffer, if it is there */
  207. if (s_ctx[fd]->peek_char != NONE) {
  208. int c = s_ctx[fd]->peek_char;
  209. s_ctx[fd]->peek_char = NONE;
  210. return c;
  211. }
  212. return s_ctx[fd]->rx_func(fd);
  213. }
  214. /* Push back a character; it will be returned by next call to uart_read_char */
  215. static void uart_return_char(int fd, int c)
  216. {
  217. assert(s_ctx[fd]->peek_char == NONE);
  218. s_ctx[fd]->peek_char = c;
  219. }
  220. static ssize_t uart_read(int fd, void* data, size_t size)
  221. {
  222. assert(fd >=0 && fd < 3);
  223. char *data_c = (char *) data;
  224. size_t received = 0;
  225. _lock_acquire_recursive(&s_ctx[fd]->read_lock);
  226. while (received < size) {
  227. int c = uart_read_char(fd);
  228. if (c == '\r') {
  229. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  230. c = '\n';
  231. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  232. /* look ahead */
  233. int c2 = uart_read_char(fd);
  234. if (c2 == NONE) {
  235. /* could not look ahead, put the current character back */
  236. uart_return_char(fd, c);
  237. break;
  238. }
  239. if (c2 == '\n') {
  240. /* this was \r\n sequence. discard \r, return \n */
  241. c = '\n';
  242. } else {
  243. /* \r followed by something else. put the second char back,
  244. * it will be processed on next iteration. return \r now.
  245. */
  246. uart_return_char(fd, c2);
  247. }
  248. }
  249. } else if (c == NONE) {
  250. break;
  251. }
  252. data_c[received] = (char) c;
  253. ++received;
  254. if (c == '\n') {
  255. break;
  256. }
  257. }
  258. _lock_release_recursive(&s_ctx[fd]->read_lock);
  259. if (received > 0) {
  260. return received;
  261. }
  262. errno = EWOULDBLOCK;
  263. return -1;
  264. }
  265. static int uart_fstat(int fd, struct stat * st)
  266. {
  267. assert(fd >=0 && fd < 3);
  268. st->st_mode = S_IFCHR;
  269. return 0;
  270. }
  271. static int uart_close(int fd)
  272. {
  273. assert(fd >=0 && fd < 3);
  274. return 0;
  275. }
  276. static int uart_fcntl(int fd, int cmd, int arg)
  277. {
  278. assert(fd >=0 && fd < 3);
  279. int result = 0;
  280. if (cmd == F_GETFL) {
  281. if (s_ctx[fd]->non_blocking) {
  282. result |= O_NONBLOCK;
  283. }
  284. } else if (cmd == F_SETFL) {
  285. s_ctx[fd]->non_blocking = (arg & O_NONBLOCK) != 0;
  286. } else {
  287. // unsupported operation
  288. result = -1;
  289. errno = ENOSYS;
  290. }
  291. return result;
  292. }
  293. #ifdef CONFIG_VFS_SUPPORT_DIR
  294. static int uart_access(const char *path, int amode)
  295. {
  296. int ret = -1;
  297. if (strcmp(path, "/0") == 0 || strcmp(path, "/1") == 0 || strcmp(path, "/2") == 0) {
  298. if (F_OK == amode) {
  299. ret = 0; //path exists
  300. } else {
  301. if ((((amode & R_OK) == R_OK) || ((amode & W_OK) == W_OK)) && ((amode & X_OK) != X_OK)) {
  302. ret = 0; //path is readable and/or writable but not executable
  303. } else {
  304. errno = EACCES;
  305. }
  306. }
  307. } else {
  308. errno = ENOENT;
  309. }
  310. return ret;
  311. }
  312. #endif // CONFIG_VFS_SUPPORT_DIR
  313. static int uart_fsync(int fd)
  314. {
  315. assert(fd >= 0 && fd < 3);
  316. _lock_acquire_recursive(&s_ctx[fd]->write_lock);
  317. uart_tx_wait_idle((uint8_t) fd);
  318. _lock_release_recursive(&s_ctx[fd]->write_lock);
  319. return 0;
  320. }
  321. #ifdef CONFIG_VFS_SUPPORT_SELECT
  322. static esp_err_t register_select(uart_select_args_t *args)
  323. {
  324. esp_err_t ret = ESP_ERR_INVALID_ARG;
  325. if (args) {
  326. portENTER_CRITICAL(&s_registered_select_lock);
  327. const int new_size = s_registered_select_num + 1;
  328. uart_select_args_t **new_selects;
  329. if ((new_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *))) == NULL) {
  330. ret = ESP_ERR_NO_MEM;
  331. } else {
  332. s_registered_selects = new_selects;
  333. s_registered_selects[s_registered_select_num] = args;
  334. s_registered_select_num = new_size;
  335. ret = ESP_OK;
  336. }
  337. portEXIT_CRITICAL(&s_registered_select_lock);
  338. }
  339. return ret;
  340. }
  341. static esp_err_t unregister_select(uart_select_args_t *args)
  342. {
  343. esp_err_t ret = ESP_OK;
  344. if (args) {
  345. ret = ESP_ERR_INVALID_STATE;
  346. portENTER_CRITICAL(&s_registered_select_lock);
  347. for (int i = 0; i < s_registered_select_num; ++i) {
  348. if (s_registered_selects[i] == args) {
  349. const int new_size = s_registered_select_num - 1;
  350. // The item is removed by overwriting it with the last item. The subsequent rellocation will drop the
  351. // last item.
  352. s_registered_selects[i] = s_registered_selects[new_size];
  353. s_registered_selects = realloc(s_registered_selects, new_size * sizeof(uart_select_args_t *));
  354. // Shrinking a buffer with realloc is guaranteed to succeed.
  355. s_registered_select_num = new_size;
  356. ret = ESP_OK;
  357. break;
  358. }
  359. }
  360. portEXIT_CRITICAL(&s_registered_select_lock);
  361. }
  362. return ret;
  363. }
  364. static void select_notif_callback_isr(uart_port_t uart_num, uart_select_notif_t uart_select_notif, BaseType_t *task_woken)
  365. {
  366. portENTER_CRITICAL_ISR(&s_registered_select_lock);
  367. for (int i = 0; i < s_registered_select_num; ++i) {
  368. uart_select_args_t *args = s_registered_selects[i];
  369. if (args) {
  370. switch (uart_select_notif) {
  371. case UART_SELECT_READ_NOTIF:
  372. if (FD_ISSET(uart_num, &args->readfds_orig)) {
  373. FD_SET(uart_num, args->readfds);
  374. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  375. }
  376. break;
  377. case UART_SELECT_WRITE_NOTIF:
  378. if (FD_ISSET(uart_num, &args->writefds_orig)) {
  379. FD_SET(uart_num, args->writefds);
  380. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  381. }
  382. break;
  383. case UART_SELECT_ERROR_NOTIF:
  384. if (FD_ISSET(uart_num, &args->errorfds_orig)) {
  385. FD_SET(uart_num, args->errorfds);
  386. esp_vfs_select_triggered_isr(args->select_sem, task_woken);
  387. }
  388. break;
  389. }
  390. }
  391. }
  392. portEXIT_CRITICAL_ISR(&s_registered_select_lock);
  393. }
  394. static esp_err_t uart_start_select(int nfds, fd_set *readfds, fd_set *writefds, fd_set *exceptfds,
  395. esp_vfs_select_sem_t select_sem, void **end_select_args)
  396. {
  397. const int max_fds = MIN(nfds, UART_NUM);
  398. *end_select_args = NULL;
  399. for (int i = 0; i < max_fds; ++i) {
  400. if (FD_ISSET(i, readfds) || FD_ISSET(i, writefds) || FD_ISSET(i, exceptfds)) {
  401. if (!uart_is_driver_installed(i)) {
  402. return ESP_ERR_INVALID_STATE;
  403. }
  404. }
  405. }
  406. uart_select_args_t *args = malloc(sizeof(uart_select_args_t));
  407. if (args == NULL) {
  408. return ESP_ERR_NO_MEM;
  409. }
  410. args->select_sem = select_sem;
  411. args->readfds = readfds;
  412. args->writefds = writefds;
  413. args->errorfds = exceptfds;
  414. args->readfds_orig = *readfds; // store the original values because they will be set to zero
  415. args->writefds_orig = *writefds;
  416. args->errorfds_orig = *exceptfds;
  417. FD_ZERO(readfds);
  418. FD_ZERO(writefds);
  419. FD_ZERO(exceptfds);
  420. portENTER_CRITICAL(uart_get_selectlock());
  421. //uart_set_select_notif_callback sets the callbacks in UART ISR
  422. for (int i = 0; i < max_fds; ++i) {
  423. if (FD_ISSET(i, &args->readfds_orig) || FD_ISSET(i, &args->writefds_orig) || FD_ISSET(i, &args->errorfds_orig)) {
  424. uart_set_select_notif_callback(i, select_notif_callback_isr);
  425. }
  426. }
  427. for (int i = 0; i < max_fds; ++i) {
  428. if (FD_ISSET(i, &args->readfds_orig)) {
  429. size_t buffered_size;
  430. if (uart_get_buffered_data_len(i, &buffered_size) == ESP_OK && buffered_size > 0) {
  431. // signalize immediately when data is buffered
  432. FD_SET(i, readfds);
  433. esp_vfs_select_triggered(args->select_sem);
  434. }
  435. }
  436. }
  437. esp_err_t ret = register_select(args);
  438. if (ret != ESP_OK) {
  439. portEXIT_CRITICAL(uart_get_selectlock());
  440. free(args);
  441. return ret;
  442. }
  443. portEXIT_CRITICAL(uart_get_selectlock());
  444. *end_select_args = args;
  445. return ESP_OK;
  446. }
  447. static esp_err_t uart_end_select(void *end_select_args)
  448. {
  449. uart_select_args_t *args = end_select_args;
  450. portENTER_CRITICAL(uart_get_selectlock());
  451. esp_err_t ret = unregister_select(args);
  452. for (int i = 0; i < UART_NUM; ++i) {
  453. uart_set_select_notif_callback(i, NULL);
  454. }
  455. portEXIT_CRITICAL(uart_get_selectlock());
  456. if (args) {
  457. free(args);
  458. }
  459. return ret;
  460. }
  461. #endif // CONFIG_VFS_SUPPORT_SELECT
  462. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  463. static int uart_tcsetattr(int fd, int optional_actions, const struct termios *p)
  464. {
  465. if (fd < 0 || fd >= UART_NUM) {
  466. errno = EBADF;
  467. return -1;
  468. }
  469. if (p == NULL) {
  470. errno = EINVAL;
  471. return -1;
  472. }
  473. switch (optional_actions) {
  474. case TCSANOW:
  475. // nothing to do
  476. break;
  477. case TCSADRAIN:
  478. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  479. errno = EINVAL;
  480. return -1;
  481. }
  482. /* FALLTHRU */
  483. case TCSAFLUSH:
  484. if (uart_flush_input(fd) != ESP_OK) {
  485. errno = EINVAL;
  486. return -1;
  487. }
  488. break;
  489. default:
  490. errno = EINVAL;
  491. return -1;
  492. }
  493. if (p->c_iflag & IGNCR) {
  494. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CRLF;
  495. } else if (p->c_iflag & ICRNL) {
  496. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_CR;
  497. } else {
  498. s_ctx[fd]->rx_mode = ESP_LINE_ENDINGS_LF;
  499. }
  500. // output line endings are not supported because there is no alternative in termios for converting LF to CR
  501. {
  502. uart_word_length_t data_bits;
  503. const tcflag_t csize_bits = p->c_cflag & CSIZE;
  504. switch (csize_bits) {
  505. case CS5:
  506. data_bits = UART_DATA_5_BITS;
  507. break;
  508. case CS6:
  509. data_bits = UART_DATA_6_BITS;
  510. break;
  511. case CS7:
  512. data_bits = UART_DATA_7_BITS;
  513. break;
  514. case CS8:
  515. data_bits = UART_DATA_8_BITS;
  516. break;
  517. default:
  518. errno = EINVAL;
  519. return -1;
  520. }
  521. if (uart_set_word_length(fd, data_bits) != ESP_OK) {
  522. errno = EINVAL;
  523. return -1;
  524. }
  525. }
  526. if (uart_set_stop_bits(fd, (p->c_cflag & CSTOPB) ? UART_STOP_BITS_2 : UART_STOP_BITS_1) != ESP_OK) {
  527. errno = EINVAL;
  528. return -1;
  529. }
  530. if (uart_set_parity(fd, (p->c_cflag & PARENB) ?
  531. ((p->c_cflag & PARODD) ? UART_PARITY_ODD : UART_PARITY_EVEN)
  532. :
  533. UART_PARITY_DISABLE) != ESP_OK) {
  534. errno = EINVAL;
  535. return -1;
  536. }
  537. if (p->c_cflag & (CBAUD | CBAUDEX)) {
  538. if (p->c_ispeed != p->c_ospeed) {
  539. errno = EINVAL;
  540. return -1;
  541. } else {
  542. uint32_t b;
  543. if (p->c_cflag & BOTHER) {
  544. b = p->c_ispeed;
  545. } else {
  546. switch (p->c_ispeed) {
  547. case B0:
  548. b = 0;
  549. break;
  550. case B50:
  551. b = 50;
  552. break;
  553. case B75:
  554. b = 75;
  555. break;
  556. case B110:
  557. b = 110;
  558. break;
  559. case B134:
  560. b = 134;
  561. break;
  562. case B150:
  563. b = 150;
  564. break;
  565. case B200:
  566. b = 200;
  567. break;
  568. case B300:
  569. b = 300;
  570. break;
  571. case B600:
  572. b = 600;
  573. break;
  574. case B1200:
  575. b = 1200;
  576. break;
  577. case B1800:
  578. b = 1800;
  579. break;
  580. case B2400:
  581. b = 2400;
  582. break;
  583. case B4800:
  584. b = 4800;
  585. break;
  586. case B9600:
  587. b = 9600;
  588. break;
  589. case B19200:
  590. b = 19200;
  591. break;
  592. case B38400:
  593. b = 38400;
  594. break;
  595. case B57600:
  596. b = 57600;
  597. break;
  598. case B115200:
  599. b = 115200;
  600. break;
  601. case B230400:
  602. b = 230400;
  603. break;
  604. case B460800:
  605. b = 460800;
  606. break;
  607. case B500000:
  608. b = 500000;
  609. break;
  610. case B576000:
  611. b = 576000;
  612. break;
  613. case B921600:
  614. b = 921600;
  615. break;
  616. case B1000000:
  617. b = 1000000;
  618. break;
  619. case B1152000:
  620. b = 1152000;
  621. break;
  622. case B1500000:
  623. b = 1500000;
  624. break;
  625. case B2000000:
  626. b = 2000000;
  627. break;
  628. case B2500000:
  629. b = 2500000;
  630. break;
  631. case B3000000:
  632. b = 3000000;
  633. break;
  634. case B3500000:
  635. b = 3500000;
  636. break;
  637. case B4000000:
  638. b = 4000000;
  639. break;
  640. default:
  641. errno = EINVAL;
  642. return -1;
  643. }
  644. }
  645. if (uart_set_baudrate(fd, b) != ESP_OK) {
  646. errno = EINVAL;
  647. return -1;
  648. }
  649. }
  650. }
  651. return 0;
  652. }
  653. static int uart_tcgetattr(int fd, struct termios *p)
  654. {
  655. if (fd < 0 || fd >= UART_NUM) {
  656. errno = EBADF;
  657. return -1;
  658. }
  659. if (p == NULL) {
  660. errno = EINVAL;
  661. return -1;
  662. }
  663. memset(p, 0, sizeof(struct termios));
  664. if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CRLF) {
  665. p->c_iflag |= IGNCR;
  666. } else if (s_ctx[fd]->rx_mode == ESP_LINE_ENDINGS_CR) {
  667. p->c_iflag |= ICRNL;
  668. }
  669. {
  670. uart_word_length_t data_bits;
  671. if (uart_get_word_length(fd, &data_bits) != ESP_OK) {
  672. errno = EINVAL;
  673. return -1;
  674. }
  675. p->c_cflag &= (~CSIZE);
  676. switch (data_bits) {
  677. case UART_DATA_5_BITS:
  678. p->c_cflag |= CS5;
  679. break;
  680. case UART_DATA_6_BITS:
  681. p->c_cflag |= CS6;
  682. break;
  683. case UART_DATA_7_BITS:
  684. p->c_cflag |= CS7;
  685. break;
  686. case UART_DATA_8_BITS:
  687. p->c_cflag |= CS8;
  688. break;
  689. default:
  690. errno = ENOSYS;
  691. return -1;
  692. }
  693. }
  694. {
  695. uart_stop_bits_t stop_bits;
  696. if (uart_get_stop_bits(fd, &stop_bits) != ESP_OK) {
  697. errno = EINVAL;
  698. return -1;
  699. }
  700. switch (stop_bits) {
  701. case UART_STOP_BITS_1:
  702. // nothing to do
  703. break;
  704. case UART_STOP_BITS_2:
  705. p->c_cflag |= CSTOPB;
  706. break;
  707. default:
  708. // UART_STOP_BITS_1_5 is unsupported by termios
  709. errno = ENOSYS;
  710. return -1;
  711. }
  712. }
  713. {
  714. uart_parity_t parity_mode;
  715. if (uart_get_parity(fd, &parity_mode) != ESP_OK) {
  716. errno = EINVAL;
  717. return -1;
  718. }
  719. switch (parity_mode) {
  720. case UART_PARITY_EVEN:
  721. p->c_cflag |= PARENB;
  722. break;
  723. case UART_PARITY_ODD:
  724. p->c_cflag |= (PARENB | PARODD);
  725. break;
  726. case UART_PARITY_DISABLE:
  727. // nothing to do
  728. break;
  729. default:
  730. errno = ENOSYS;
  731. return -1;
  732. }
  733. }
  734. {
  735. uint32_t baudrate;
  736. if (uart_get_baudrate(fd, &baudrate) != ESP_OK) {
  737. errno = EINVAL;
  738. return -1;
  739. }
  740. p->c_cflag |= (CBAUD | CBAUDEX);
  741. speed_t sp;
  742. switch (baudrate) {
  743. case 0:
  744. sp = B0;
  745. break;
  746. case 50:
  747. sp = B50;
  748. break;
  749. case 75:
  750. sp = B75;
  751. break;
  752. case 110:
  753. sp = B110;
  754. break;
  755. case 134:
  756. sp = B134;
  757. break;
  758. case 150:
  759. sp = B150;
  760. break;
  761. case 200:
  762. sp = B200;
  763. break;
  764. case 300:
  765. sp = B300;
  766. break;
  767. case 600:
  768. sp = B600;
  769. break;
  770. case 1200:
  771. sp = B1200;
  772. break;
  773. case 1800:
  774. sp = B1800;
  775. break;
  776. case 2400:
  777. sp = B2400;
  778. break;
  779. case 4800:
  780. sp = B4800;
  781. break;
  782. case 9600:
  783. sp = B9600;
  784. break;
  785. case 19200:
  786. sp = B19200;
  787. break;
  788. case 38400:
  789. sp = B38400;
  790. break;
  791. case 57600:
  792. sp = B57600;
  793. break;
  794. case 115200:
  795. sp = B115200;
  796. break;
  797. case 230400:
  798. sp = B230400;
  799. break;
  800. case 460800:
  801. sp = B460800;
  802. break;
  803. case 500000:
  804. sp = B500000;
  805. break;
  806. case 576000:
  807. sp = B576000;
  808. break;
  809. case 921600:
  810. sp = B921600;
  811. break;
  812. case 1000000:
  813. sp = B1000000;
  814. break;
  815. case 1152000:
  816. sp = B1152000;
  817. break;
  818. case 1500000:
  819. sp = B1500000;
  820. break;
  821. case 2000000:
  822. sp = B2000000;
  823. break;
  824. case 2500000:
  825. sp = B2500000;
  826. break;
  827. case 3000000:
  828. sp = B3000000;
  829. break;
  830. case 3500000:
  831. sp = B3500000;
  832. break;
  833. case 4000000:
  834. sp = B4000000;
  835. break;
  836. default:
  837. p->c_cflag |= BOTHER;
  838. sp = baudrate;
  839. break;
  840. }
  841. p->c_ispeed = p->c_ospeed = sp;
  842. }
  843. return 0;
  844. }
  845. static int uart_tcdrain(int fd)
  846. {
  847. if (fd < 0 || fd >= UART_NUM) {
  848. errno = EBADF;
  849. return -1;
  850. }
  851. if (uart_wait_tx_done(fd, portMAX_DELAY) != ESP_OK) {
  852. errno = EINVAL;
  853. return -1;
  854. }
  855. return 0;
  856. }
  857. static int uart_tcflush(int fd, int select)
  858. {
  859. if (fd < 0 || fd >= UART_NUM) {
  860. errno = EBADF;
  861. return -1;
  862. }
  863. if (select == TCIFLUSH) {
  864. if (uart_flush_input(fd) != ESP_OK) {
  865. errno = EINVAL;
  866. return -1;
  867. }
  868. } else {
  869. // output flushing is not supported
  870. errno = EINVAL;
  871. return -1;
  872. }
  873. return 0;
  874. }
  875. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  876. void esp_vfs_dev_uart_register(void)
  877. {
  878. esp_vfs_t vfs = {
  879. .flags = ESP_VFS_FLAG_DEFAULT,
  880. .write = &uart_write,
  881. .open = &uart_open,
  882. .fstat = &uart_fstat,
  883. .close = &uart_close,
  884. .read = &uart_read,
  885. .fcntl = &uart_fcntl,
  886. .fsync = &uart_fsync,
  887. #ifdef CONFIG_VFS_SUPPORT_DIR
  888. .access = &uart_access,
  889. #endif // CONFIG_VFS_SUPPORT_DIR
  890. #ifdef CONFIG_VFS_SUPPORT_SELECT
  891. .start_select = &uart_start_select,
  892. .end_select = &uart_end_select,
  893. #endif // CONFIG_VFS_SUPPORT_SELECT
  894. #ifdef CONFIG_VFS_SUPPORT_TERMIOS
  895. .tcsetattr = &uart_tcsetattr,
  896. .tcgetattr = &uart_tcgetattr,
  897. .tcdrain = &uart_tcdrain,
  898. .tcflush = &uart_tcflush,
  899. #endif // CONFIG_VFS_SUPPORT_TERMIOS
  900. };
  901. ESP_ERROR_CHECK(esp_vfs_register("/dev/uart", &vfs, NULL));
  902. }
  903. int esp_vfs_dev_uart_port_set_rx_line_endings(int uart_num, esp_line_endings_t mode)
  904. {
  905. if (uart_num < 0 || uart_num >= UART_NUM) {
  906. errno = EBADF;
  907. return -1;
  908. }
  909. s_ctx[uart_num]->rx_mode = mode;
  910. return 0;
  911. }
  912. int esp_vfs_dev_uart_port_set_tx_line_endings(int uart_num, esp_line_endings_t mode)
  913. {
  914. if (uart_num < 0 || uart_num >= UART_NUM) {
  915. errno = EBADF;
  916. return -1;
  917. }
  918. s_ctx[uart_num]->tx_mode = mode;
  919. return 0;
  920. }
  921. void esp_vfs_dev_uart_set_rx_line_endings(esp_line_endings_t mode)
  922. {
  923. for (int i = 0; i < UART_NUM; ++i) {
  924. s_ctx[i]->rx_mode = mode;
  925. }
  926. }
  927. void esp_vfs_dev_uart_set_tx_line_endings(esp_line_endings_t mode)
  928. {
  929. for (int i = 0; i < UART_NUM; ++i) {
  930. s_ctx[i]->tx_mode = mode;
  931. }
  932. }
  933. void esp_vfs_dev_uart_use_nonblocking(int uart_num)
  934. {
  935. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  936. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  937. s_ctx[uart_num]->tx_func = uart_tx_char;
  938. s_ctx[uart_num]->rx_func = uart_rx_char;
  939. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  940. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  941. }
  942. void esp_vfs_dev_uart_use_driver(int uart_num)
  943. {
  944. _lock_acquire_recursive(&s_ctx[uart_num]->read_lock);
  945. _lock_acquire_recursive(&s_ctx[uart_num]->write_lock);
  946. s_ctx[uart_num]->tx_func = uart_tx_char_via_driver;
  947. s_ctx[uart_num]->rx_func = uart_rx_char_via_driver;
  948. _lock_release_recursive(&s_ctx[uart_num]->write_lock);
  949. _lock_release_recursive(&s_ctx[uart_num]->read_lock);
  950. }