bt.c 46 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/portmacro.h"
  25. #include "esp_types.h"
  26. #include "esp_system.h"
  27. #include "esp_task.h"
  28. #include "riscv/interrupt.h"
  29. #include "esp_attr.h"
  30. #include "esp_phy_init.h"
  31. #include "esp_bt.h"
  32. #include "esp_err.h"
  33. #include "esp_log.h"
  34. #include "esp_pm.h"
  35. #include "esp_ipc.h"
  36. #include "driver/periph_ctrl.h"
  37. #include "soc/rtc.h"
  38. #include "soc/rtc_cntl_reg.h"
  39. #include "soc/soc_memory_layout.h"
  40. #include "esp_clk.h"
  41. #include "esp_coexist_internal.h"
  42. #include "esp32c3/rom/rom_layout.h"
  43. #include "esp_timer.h"
  44. #include "esp_sleep.h"
  45. #if CONFIG_BT_ENABLED
  46. /* Macro definition
  47. ************************************************************************
  48. */
  49. #define BTDM_LOG_TAG "BTDM_INIT"
  50. #define BTDM_INIT_PERIOD (5000) /* ms */
  51. /* Low Power Clock Selection */
  52. #define BTDM_LPCLK_SEL_XTAL (0)
  53. #define BTDM_LPCLK_SEL_XTAL32K (1)
  54. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  55. #define BTDM_LPCLK_SEL_8M (3)
  56. // wakeup request sources
  57. enum {
  58. BTDM_ASYNC_WAKEUP_SRC_VHCI = 0,
  59. BTDM_ASYNC_WAKEUP_SRC_DISA,
  60. BTDM_ASYNC_WAKEUP_SRC_TMR,
  61. BTDM_ASYNC_WAKEUP_SRC_MAX,
  62. };
  63. // low power control struct
  64. typedef union {
  65. struct {
  66. uint32_t enable : 1; // whether low power mode is required
  67. uint32_t lpclk_sel : 2; // low power clock source
  68. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) force-power-down is required during sleep
  69. uint32_t wakeup_timer_required : 1; // whether system timer is needed
  70. uint32_t no_light_sleep : 1; // do not allow system to enter light sleep after bluetooth is enabled
  71. uint32_t reserved : 26; // reserved
  72. };
  73. uint32_t val;
  74. } btdm_lpcntl_t;
  75. // low power control status
  76. typedef union {
  77. struct {
  78. uint32_t pm_lock_released : 1; // whether power management lock is released
  79. uint32_t mac_bb_pd : 1; // whether hardware(MAC, BB) is powered down
  80. uint32_t phy_enabled : 1; // whether phy is switched on
  81. uint32_t wakeup_timer_started : 1; // whether wakeup timer is started
  82. uint32_t reserved : 28; // reserved
  83. };
  84. uint32_t val;
  85. } btdm_lpstat_t;
  86. /* Sleep and wakeup interval control */
  87. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  88. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  89. #define BT_DEBUG(...)
  90. #define BT_API_CALL_CHECK(info, api_call, ret) \
  91. do{\
  92. esp_err_t __err = (api_call);\
  93. if ((ret) != __err) {\
  94. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  95. return __err;\
  96. }\
  97. } while(0)
  98. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  99. #define OSI_VERSION 0x00010006
  100. #define OSI_MAGIC_VALUE 0xFADEBEAD
  101. /* Types definition
  102. ************************************************************************
  103. */
  104. /* vendor dependent signals to be posted to controller task */
  105. typedef enum {
  106. BTDM_VND_OL_SIG_WAKEUP_TMR = 0,
  107. BTDM_VND_OL_SIG_NUM,
  108. } btdm_vnd_ol_sig_t;
  109. /* prototype of function to handle vendor dependent signals */
  110. typedef void (* btdm_vnd_ol_task_func_t)(void *param);
  111. /* VHCI function interface */
  112. typedef struct vhci_host_callback {
  113. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  114. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  115. } vhci_host_callback_t;
  116. /* Dram region */
  117. typedef struct {
  118. esp_bt_mode_t mode;
  119. intptr_t start;
  120. intptr_t end;
  121. } btdm_dram_available_region_t;
  122. typedef void (* osi_intr_handler)(void);
  123. /* OSI function */
  124. struct osi_funcs_t {
  125. uint32_t _magic;
  126. uint32_t _version;
  127. void (*_interrupt_set)(int cpu_no, int intr_source, int interrupt_no, int interrpt_prio);
  128. void (*_interrupt_clear)(int interrupt_source, int interrupt_no);
  129. void (*_interrupt_handler_set)(int interrupt_no, intr_handler_t fn, void *arg);
  130. void (*_interrupt_disable)(void);
  131. void (*_interrupt_restore)(void);
  132. void (*_task_yield)(void);
  133. void (*_task_yield_from_isr)(void);
  134. void *(*_semphr_create)(uint32_t max, uint32_t init);
  135. void (*_semphr_delete)(void *semphr);
  136. int (*_semphr_take_from_isr)(void *semphr, void *hptw);
  137. int (*_semphr_give_from_isr)(void *semphr, void *hptw);
  138. int (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  139. int (*_semphr_give)(void *semphr);
  140. void *(*_mutex_create)(void);
  141. void (*_mutex_delete)(void *mutex);
  142. int (*_mutex_lock)(void *mutex);
  143. int (*_mutex_unlock)(void *mutex);
  144. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  145. void (* _queue_delete)(void *queue);
  146. int (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  147. int (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  148. int (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  149. int (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  150. int (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  151. void (* _task_delete)(void *task_handle);
  152. bool (* _is_in_isr)(void);
  153. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  154. void *(* _malloc)(size_t size);
  155. void *(* _malloc_internal)(size_t size);
  156. void (* _free)(void *p);
  157. int (* _read_efuse_mac)(uint8_t mac[6]);
  158. void (* _srand)(unsigned int seed);
  159. int (* _rand)(void);
  160. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  161. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  162. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  163. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  164. void (* _btdm_sleep_enter_phase2)(void);
  165. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  166. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  167. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  168. void (* _coex_wifi_sleep_set)(bool sleep);
  169. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  170. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  171. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  172. void (* _interrupt_on)(int intr_num);
  173. void (* _interrupt_off)(int intr_num);
  174. void (* _esp_hw_power_down)(void);
  175. void (* _esp_hw_power_up)(void);
  176. void (* _ets_backup_dma_copy)(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_rem);
  177. };
  178. /* External functions or values
  179. ************************************************************************
  180. */
  181. /* not for user call, so don't put to include file */
  182. /* OSI */
  183. extern int btdm_osi_funcs_register(void *osi_funcs);
  184. /* Initialise and De-initialise */
  185. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  186. extern void btdm_controller_deinit(void);
  187. extern int btdm_controller_enable(esp_bt_mode_t mode);
  188. extern void btdm_controller_disable(void);
  189. extern uint8_t btdm_controller_get_mode(void);
  190. extern const char *btdm_controller_get_compile_version(void);
  191. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  192. /* Sleep */
  193. extern void btdm_controller_enable_sleep(bool enable);
  194. extern uint8_t btdm_controller_get_sleep_mode(void);
  195. extern bool btdm_power_state_active(void);
  196. extern void btdm_wakeup_request(void);
  197. extern void btdm_in_wakeup_requesting_set(bool in_wakeup_requesting);
  198. /* vendor dependent tasks to be posted and handled by controller task*/
  199. extern int btdm_vnd_offload_task_register(btdm_vnd_ol_sig_t sig, btdm_vnd_ol_task_func_t func);
  200. extern int btdm_vnd_offload_task_deregister(btdm_vnd_ol_sig_t sig);
  201. extern int btdm_vnd_offload_post_from_isr(btdm_vnd_ol_sig_t sig, void *param, bool need_yield);
  202. extern int btdm_vnd_offload_post(btdm_vnd_ol_sig_t sig, void *param);
  203. /* Low Power Clock */
  204. extern bool btdm_lpclk_select_src(uint32_t sel);
  205. extern bool btdm_lpclk_set_div(uint32_t div);
  206. extern int btdm_hci_tl_io_event_post(int event);
  207. /* VHCI */
  208. extern bool API_vhci_host_check_send_available(void);
  209. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  210. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  211. /* TX power */
  212. extern int ble_txpwr_set(int power_type, int power_level);
  213. extern int ble_txpwr_get(int power_type);
  214. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  215. extern int coex_core_ble_conn_dyn_prio_get(bool *low, bool *high);
  216. extern bool btdm_deep_sleep_mem_init(void);
  217. extern void btdm_deep_sleep_mem_deinit(void);
  218. extern void btdm_ble_power_down_dma_copy(bool copy);
  219. extern uint8_t btdm_sleep_clock_sync(void);
  220. #if CONFIG_MAC_BB_PD
  221. extern void esp_mac_bb_power_down(void);
  222. extern void esp_mac_bb_power_up(void);
  223. extern void ets_backup_dma_copy(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  224. #endif
  225. extern char _bss_start_btdm;
  226. extern char _bss_end_btdm;
  227. extern char _data_start_btdm;
  228. extern char _data_end_btdm;
  229. extern uint32_t _data_start_btdm_rom;
  230. extern uint32_t _data_end_btdm_rom;
  231. extern uint32_t _bt_bss_start;
  232. extern uint32_t _bt_bss_end;
  233. extern uint32_t _btdm_bss_start;
  234. extern uint32_t _btdm_bss_end;
  235. extern uint32_t _bt_data_start;
  236. extern uint32_t _bt_data_end;
  237. extern uint32_t _btdm_data_start;
  238. extern uint32_t _btdm_data_end;
  239. extern char _bt_tmp_bss_start;
  240. extern char _bt_tmp_bss_end;
  241. /* Local Function Declare
  242. *********************************************************************
  243. */
  244. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio);
  245. static void interrupt_clear_wrapper(int intr_source, int intr_num);
  246. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg);
  247. static void IRAM_ATTR interrupt_disable(void);
  248. static void IRAM_ATTR interrupt_restore(void);
  249. static void IRAM_ATTR task_yield_from_isr(void);
  250. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  251. static void semphr_delete_wrapper(void *semphr);
  252. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  253. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  254. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  255. static int semphr_give_wrapper(void *semphr);
  256. static void *mutex_create_wrapper(void);
  257. static void mutex_delete_wrapper(void *mutex);
  258. static int mutex_lock_wrapper(void *mutex);
  259. static int mutex_unlock_wrapper(void *mutex);
  260. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  261. static void queue_delete_wrapper(void *queue);
  262. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  263. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  264. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  265. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  266. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  267. static void task_delete_wrapper(void *task_handle);
  268. static bool IRAM_ATTR is_in_isr_wrapper(void);
  269. static void *malloc_internal_wrapper(size_t size);
  270. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  271. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  272. static int IRAM_ATTR rand_wrapper(void);
  273. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  274. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus);
  275. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *slot_cnt);
  276. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  277. static void btdm_sleep_enter_phase2_wrapper(void);
  278. static void btdm_sleep_exit_phase3_wrapper(void);
  279. static void coex_wifi_sleep_set_hook(bool sleep);
  280. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  281. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  282. static void interrupt_on_wrapper(int intr_num);
  283. static void interrupt_off_wrapper(int intr_num);
  284. static void btdm_hw_mac_power_up_wrapper(void);
  285. static void btdm_hw_mac_power_down_wrapper(void);
  286. static void btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem);
  287. static void btdm_slp_tmr_callback(void *arg);
  288. /* Local variable definition
  289. ***************************************************************************
  290. */
  291. /* OSI funcs */
  292. static const struct osi_funcs_t osi_funcs_ro = {
  293. ._magic = OSI_MAGIC_VALUE,
  294. ._version = OSI_VERSION,
  295. ._interrupt_set = interrupt_set_wrapper,
  296. ._interrupt_clear = interrupt_clear_wrapper,
  297. ._interrupt_handler_set = interrupt_handler_set_wrapper,
  298. ._interrupt_disable = interrupt_disable,
  299. ._interrupt_restore = interrupt_restore,
  300. ._task_yield = vPortYield,
  301. ._task_yield_from_isr = task_yield_from_isr,
  302. ._semphr_create = semphr_create_wrapper,
  303. ._semphr_delete = semphr_delete_wrapper,
  304. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  305. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  306. ._semphr_take = semphr_take_wrapper,
  307. ._semphr_give = semphr_give_wrapper,
  308. ._mutex_create = mutex_create_wrapper,
  309. ._mutex_delete = mutex_delete_wrapper,
  310. ._mutex_lock = mutex_lock_wrapper,
  311. ._mutex_unlock = mutex_unlock_wrapper,
  312. ._queue_create = queue_create_wrapper,
  313. ._queue_delete = queue_delete_wrapper,
  314. ._queue_send = queue_send_wrapper,
  315. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  316. ._queue_recv = queue_recv_wrapper,
  317. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  318. ._task_create = task_create_wrapper,
  319. ._task_delete = task_delete_wrapper,
  320. ._is_in_isr = is_in_isr_wrapper,
  321. ._cause_sw_intr_to_core = NULL,
  322. ._malloc = malloc,
  323. ._malloc_internal = malloc_internal_wrapper,
  324. ._free = free,
  325. ._read_efuse_mac = read_mac_wrapper,
  326. ._srand = srand_wrapper,
  327. ._rand = rand_wrapper,
  328. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  329. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  330. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  331. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  332. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  333. ._btdm_sleep_exit_phase1 = NULL,
  334. ._btdm_sleep_exit_phase2 = NULL,
  335. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  336. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  337. ._coex_core_ble_conn_dyn_prio_get = coex_core_ble_conn_dyn_prio_get,
  338. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  339. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  340. ._interrupt_on = interrupt_on_wrapper,
  341. ._interrupt_off = interrupt_off_wrapper,
  342. ._esp_hw_power_down = btdm_hw_mac_power_down_wrapper,
  343. ._esp_hw_power_up = btdm_hw_mac_power_up_wrapper,
  344. ._ets_backup_dma_copy = btdm_backup_dma_copy_wrapper,
  345. };
  346. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  347. /* Static variable declare */
  348. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  349. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  350. // low power control struct
  351. static DRAM_ATTR btdm_lpcntl_t s_lp_cntl;
  352. // low power status struct
  353. static DRAM_ATTR btdm_lpstat_t s_lp_stat;
  354. // measured average low power clock period in micro seconds
  355. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  356. // number of fractional bit for btdm_lpcycle_us
  357. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0;
  358. // semaphore used for blocking VHCI API to wait for controller to wake up
  359. static DRAM_ATTR QueueHandle_t s_wakeup_req_sem = NULL;
  360. // wakeup timer
  361. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  362. #ifdef CONFIG_PM_ENABLE
  363. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  364. // pm_lock to prevent light sleep due to incompatibility currently
  365. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
  366. #endif
  367. void IRAM_ATTR btdm_hw_mac_power_down_wrapper(void)
  368. {
  369. #if CONFIG_MAC_BB_PD
  370. // le module power down
  371. SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  372. SET_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  373. esp_mac_bb_power_down();
  374. #endif
  375. }
  376. void IRAM_ATTR btdm_hw_mac_power_up_wrapper(void)
  377. {
  378. #if CONFIG_MAC_BB_PD
  379. // le module power up
  380. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_BT_FORCE_PD);
  381. CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_BT_FORCE_ISO);
  382. esp_mac_bb_power_up();
  383. #endif
  384. }
  385. void IRAM_ATTR btdm_backup_dma_copy_wrapper(uint32_t reg, uint32_t mem_addr, uint32_t num, bool to_mem)
  386. {
  387. #if CONFIG_MAC_BB_PD
  388. ets_backup_dma_copy(reg, mem_addr, num, to_mem);
  389. #endif
  390. }
  391. static void interrupt_set_wrapper(int cpu_no, int intr_source, int intr_num, int intr_prio)
  392. {
  393. intr_matrix_route(intr_source, intr_num);
  394. esprv_intc_int_set_priority(intr_num, intr_prio);
  395. //esprv_intc_int_enable_level(1 << intr_num);
  396. esprv_intc_int_set_type(intr_num, 0);
  397. }
  398. static void interrupt_clear_wrapper(int intr_source, int intr_num)
  399. {
  400. }
  401. static void interrupt_handler_set_wrapper(int n, intr_handler_t fn, void *arg)
  402. {
  403. intr_handler_set(n, fn, arg);
  404. }
  405. static void interrupt_on_wrapper(int intr_num)
  406. {
  407. esprv_intc_int_enable(1 << intr_num);
  408. }
  409. static void interrupt_off_wrapper(int intr_num)
  410. {
  411. esprv_intc_int_disable(1<<intr_num);
  412. }
  413. static void IRAM_ATTR interrupt_disable(void)
  414. {
  415. if (xPortInIsrContext()) {
  416. portENTER_CRITICAL_ISR(&global_int_mux);
  417. } else {
  418. portENTER_CRITICAL(&global_int_mux);
  419. }
  420. }
  421. static void IRAM_ATTR interrupt_restore(void)
  422. {
  423. if (xPortInIsrContext()) {
  424. portEXIT_CRITICAL_ISR(&global_int_mux);
  425. } else {
  426. portEXIT_CRITICAL(&global_int_mux);
  427. }
  428. }
  429. static void IRAM_ATTR task_yield_from_isr(void)
  430. {
  431. portYIELD_FROM_ISR();
  432. }
  433. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  434. {
  435. return (void *)xSemaphoreCreateCounting(max, init);
  436. }
  437. static void semphr_delete_wrapper(void *semphr)
  438. {
  439. vSemaphoreDelete(semphr);
  440. }
  441. static int IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  442. {
  443. return (int)xSemaphoreTakeFromISR(semphr, hptw);
  444. }
  445. static int IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  446. {
  447. return (int)xSemaphoreGiveFromISR(semphr, hptw);
  448. }
  449. static int semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  450. {
  451. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  452. return (int)xSemaphoreTake(semphr, portMAX_DELAY);
  453. } else {
  454. return (int)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  455. }
  456. }
  457. static int semphr_give_wrapper(void *semphr)
  458. {
  459. return (int)xSemaphoreGive(semphr);
  460. }
  461. static void *mutex_create_wrapper(void)
  462. {
  463. return (void *)xSemaphoreCreateMutex();
  464. }
  465. static void mutex_delete_wrapper(void *mutex)
  466. {
  467. vSemaphoreDelete(mutex);
  468. }
  469. static int mutex_lock_wrapper(void *mutex)
  470. {
  471. return (int)xSemaphoreTake(mutex, portMAX_DELAY);
  472. }
  473. static int mutex_unlock_wrapper(void *mutex)
  474. {
  475. return (int)xSemaphoreGive(mutex);
  476. }
  477. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  478. {
  479. return (void *)xQueueCreate(queue_len, item_size);
  480. }
  481. static void queue_delete_wrapper(void *queue)
  482. {
  483. vQueueDelete(queue);
  484. }
  485. static int queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  486. {
  487. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  488. return (int)xQueueSend(queue, item, portMAX_DELAY);
  489. } else {
  490. return (int)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  491. }
  492. }
  493. static int IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  494. {
  495. return (int)xQueueSendFromISR(queue, item, hptw);
  496. }
  497. static int queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  498. {
  499. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  500. return (int)xQueueReceive(queue, item, portMAX_DELAY);
  501. } else {
  502. return (int)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  503. }
  504. }
  505. static int IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  506. {
  507. return (int)xQueueReceiveFromISR(queue, item, hptw);
  508. }
  509. static int task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  510. {
  511. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  512. }
  513. static void task_delete_wrapper(void *task_handle)
  514. {
  515. vTaskDelete(task_handle);
  516. }
  517. static bool IRAM_ATTR is_in_isr_wrapper(void)
  518. {
  519. return (bool)xPortInIsrContext();
  520. }
  521. static void *malloc_internal_wrapper(size_t size)
  522. {
  523. return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  524. }
  525. static int IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  526. {
  527. int ret = esp_read_mac(mac, ESP_MAC_BT);
  528. ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
  529. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  530. return ret;
  531. }
  532. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  533. {
  534. /* empty function */
  535. }
  536. static int IRAM_ATTR rand_wrapper(void)
  537. {
  538. return (int)esp_random();
  539. }
  540. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  541. {
  542. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  543. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  544. local_error_corr += res;
  545. res = (local_error_corr >> btdm_lpcycle_us_frac);
  546. local_error_corr -= (res << btdm_lpcycle_us_frac);
  547. if (error_corr) {
  548. *error_corr = (uint32_t) local_error_corr;
  549. }
  550. return (uint32_t)res;
  551. }
  552. /*
  553. * @brief Converts a duration in half us into a number of low power clock cycles.
  554. */
  555. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  556. {
  557. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  558. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  559. // clock measurement is conducted
  560. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  561. cycles >>= 1;
  562. return (uint32_t)cycles;
  563. }
  564. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  565. {
  566. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  567. return false;
  568. }
  569. /* wake up in advance considering the delay in enabling PHY/RF */
  570. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  571. return true;
  572. }
  573. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  574. {
  575. if (s_lp_cntl.wakeup_timer_required == 0) {
  576. return;
  577. }
  578. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  579. uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
  580. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  581. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  582. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  583. // and set the timer in advance
  584. uint32_t uncertainty = (us_to_sleep >> 11);
  585. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  586. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  587. }
  588. assert (s_lp_stat.wakeup_timer_started == 0);
  589. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) == ESP_OK) {
  590. s_lp_stat.wakeup_timer_started = 1;
  591. } else {
  592. ESP_LOGE(BTDM_LOG_TAG, "timer start failed");
  593. assert(0);
  594. }
  595. }
  596. static void btdm_sleep_enter_phase2_wrapper(void)
  597. {
  598. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  599. if (s_lp_stat.phy_enabled) {
  600. esp_phy_disable();
  601. s_lp_stat.phy_enabled = 0;
  602. } else {
  603. assert(0);
  604. }
  605. if (s_lp_stat.pm_lock_released == 0) {
  606. #ifdef CONFIG_PM_ENABLE
  607. esp_pm_lock_release(s_pm_lock);
  608. #endif
  609. s_lp_stat.pm_lock_released = 1;
  610. }
  611. }
  612. }
  613. static void btdm_sleep_exit_phase3_wrapper(void)
  614. {
  615. #ifdef CONFIG_PM_ENABLE
  616. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  617. // Then we will not run into `btdm_sleep_exit_phase0` and acquire PM lock,
  618. // Do it again here to fix this issue.
  619. if (s_lp_stat.pm_lock_released) {
  620. esp_pm_lock_acquire(s_pm_lock);
  621. s_lp_stat.pm_lock_released = 0;
  622. }
  623. #endif
  624. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  625. if (s_lp_stat.phy_enabled == 0) {
  626. esp_phy_enable();
  627. s_lp_stat.phy_enabled = 1;
  628. }
  629. }
  630. // If BT wakeup before esp timer coming due to timer task have no chance to run.
  631. // Then we will not run into `btdm_sleep_exit_phase0` and stop esp timer,
  632. // Do it again here to fix this issue.
  633. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  634. esp_timer_stop(s_btdm_slp_tmr);
  635. s_lp_stat.wakeup_timer_started = 0;
  636. }
  637. // wait for the sleep state to change
  638. // the procedure duration is at micro-second level or less
  639. while (btdm_sleep_clock_sync()) {
  640. ;
  641. }
  642. }
  643. static void IRAM_ATTR btdm_sleep_exit_phase0(void *param)
  644. {
  645. assert(s_lp_cntl.enable == 1);
  646. #ifdef CONFIG_PM_ENABLE
  647. if (s_lp_stat.pm_lock_released) {
  648. esp_pm_lock_acquire(s_pm_lock);
  649. s_lp_stat.pm_lock_released = 0;
  650. }
  651. #endif
  652. int event = (int) param;
  653. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  654. btdm_wakeup_request();
  655. }
  656. if (s_lp_cntl.wakeup_timer_required && s_lp_stat.wakeup_timer_started) {
  657. esp_timer_stop(s_btdm_slp_tmr);
  658. s_lp_stat.wakeup_timer_started = 0;
  659. }
  660. if (event == BTDM_ASYNC_WAKEUP_SRC_VHCI || event == BTDM_ASYNC_WAKEUP_SRC_DISA) {
  661. semphr_give_wrapper(s_wakeup_req_sem);
  662. }
  663. }
  664. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  665. {
  666. #ifdef CONFIG_PM_ENABLE
  667. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)BTDM_ASYNC_WAKEUP_SRC_TMR);
  668. #endif
  669. }
  670. static bool async_wakeup_request(int event)
  671. {
  672. if (s_lp_cntl.enable == 0) {
  673. return false;
  674. }
  675. bool do_wakeup_request = false;
  676. switch (event) {
  677. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  678. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  679. btdm_in_wakeup_requesting_set(true);
  680. if (!btdm_power_state_active()) {
  681. btdm_vnd_offload_post(BTDM_VND_OL_SIG_WAKEUP_TMR, (void *)event);
  682. do_wakeup_request = true;
  683. semphr_take_wrapper(s_wakeup_req_sem, OSI_FUNCS_TIME_BLOCKING);
  684. }
  685. break;
  686. default:
  687. break;
  688. }
  689. return do_wakeup_request;
  690. }
  691. static void async_wakeup_request_end(int event)
  692. {
  693. if (s_lp_cntl.enable == 0) {
  694. return;
  695. }
  696. bool allow_to_sleep;
  697. switch (event) {
  698. case BTDM_ASYNC_WAKEUP_SRC_VHCI:
  699. case BTDM_ASYNC_WAKEUP_SRC_DISA:
  700. allow_to_sleep = true;
  701. break;
  702. default:
  703. allow_to_sleep = true;
  704. break;
  705. }
  706. if (allow_to_sleep) {
  707. btdm_in_wakeup_requesting_set(false);
  708. }
  709. return;
  710. }
  711. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  712. {
  713. #if CONFIG_SW_COEXIST_ENABLE
  714. coex_schm_status_bit_set(type, status);
  715. #endif
  716. }
  717. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  718. {
  719. #if CONFIG_SW_COEXIST_ENABLE
  720. coex_schm_status_bit_clear(type, status);
  721. #endif
  722. }
  723. bool esp_vhci_host_check_send_available(void)
  724. {
  725. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  726. return false;
  727. }
  728. return API_vhci_host_check_send_available();
  729. }
  730. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  731. {
  732. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  733. return;
  734. }
  735. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  736. API_vhci_host_send_packet(data, len);
  737. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_VHCI);
  738. }
  739. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  740. {
  741. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  742. return ESP_FAIL;
  743. }
  744. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  745. }
  746. static void btdm_controller_mem_init(void)
  747. {
  748. extern void btdm_controller_rom_data_init(void );
  749. btdm_controller_rom_data_init();
  750. }
  751. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  752. {
  753. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  754. return ESP_OK;
  755. }
  756. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  757. {
  758. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  759. return ESP_OK;
  760. }
  761. static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
  762. {
  763. int ret = heap_caps_add_region(start, end);
  764. /* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
  765. * is too small to fit a heap. This cannot be termed as a fatal error and hence
  766. * we replace it by ESP_OK
  767. */
  768. if (ret == ESP_ERR_INVALID_SIZE) {
  769. return ESP_OK;
  770. }
  771. return ret;
  772. }
  773. // release wifi and coex memory, free about 720 bytes,
  774. void esp_release_wifi_and_coex_mem(void)
  775. {
  776. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->dram_start_coexist, (intptr_t)ets_rom_layout_p->dram_end_pp));
  777. ESP_ERROR_CHECK(try_heap_caps_add_region((intptr_t)ets_rom_layout_p->data_start_interface_coexist,(intptr_t)ets_rom_layout_p->bss_end_interface_pp));
  778. }
  779. #if CONFIG_FREERTOS_USE_TICKLESS_IDLE
  780. static void IRAM_ATTR btdm_mac_bb_power_down_cb(void)
  781. {
  782. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd == 0) {
  783. #if (CONFIG_MAC_BB_PD)
  784. btdm_ble_power_down_dma_copy(true);
  785. #endif
  786. s_lp_stat.mac_bb_pd = 1;
  787. }
  788. }
  789. static void IRAM_ATTR btdm_mac_bb_power_up_cb(void)
  790. {
  791. #if (CONFIG_MAC_BB_PD)
  792. if (s_lp_cntl.mac_bb_pd && s_lp_stat.mac_bb_pd) {
  793. btdm_ble_power_down_dma_copy(false);
  794. s_lp_stat.mac_bb_pd = 0;
  795. }
  796. #endif
  797. }
  798. #endif
  799. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  800. {
  801. esp_err_t err = ESP_FAIL;
  802. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  803. return ESP_ERR_INVALID_STATE;
  804. }
  805. if (cfg == NULL) {
  806. return ESP_ERR_INVALID_ARG;
  807. }
  808. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  809. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  810. ESP_LOGE(BTDM_LOG_TAG, "Invalid controller task prioriy or stack size");
  811. return ESP_ERR_INVALID_ARG;
  812. }
  813. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  814. ESP_LOGE(BTDM_LOG_TAG, "%s controller only support BLE only mode", __func__);
  815. return ESP_ERR_NOT_SUPPORTED;
  816. }
  817. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  818. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  819. ESP_LOGE(BTDM_LOG_TAG, "Invalid value of ble_max_act");
  820. return ESP_ERR_INVALID_ARG;
  821. }
  822. }
  823. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  824. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  825. ESP_LOGE(BTDM_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  826. return ESP_ERR_INVALID_ARG;
  827. }
  828. }
  829. // overwrite some parameters
  830. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  831. btdm_controller_mem_init();
  832. #if CONFIG_MAC_BB_PD
  833. if (esp_register_mac_bb_pd_callback(btdm_mac_bb_power_down_cb) != 0) {
  834. err = ESP_ERR_INVALID_ARG;
  835. goto error;
  836. }
  837. if (esp_register_mac_bb_pu_callback(btdm_mac_bb_power_up_cb) != 0) {
  838. err = ESP_ERR_INVALID_ARG;
  839. goto error;
  840. }
  841. #endif
  842. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  843. if (osi_funcs_p == NULL) {
  844. return ESP_ERR_NO_MEM;
  845. }
  846. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  847. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  848. return ESP_ERR_INVALID_ARG;
  849. }
  850. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  851. // init low-power control resources
  852. do {
  853. // set default values for global states or resources
  854. s_lp_stat.val = 0;
  855. s_lp_cntl.val = 0;
  856. s_wakeup_req_sem = NULL;
  857. s_btdm_slp_tmr = NULL;
  858. // configure and initialize resources
  859. s_lp_cntl.enable = (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) ? 1 : 0;
  860. s_lp_cntl.no_light_sleep = 1;
  861. if (s_lp_cntl.enable) {
  862. #if (CONFIG_MAC_BB_PD)
  863. if (!btdm_deep_sleep_mem_init()) {
  864. err = ESP_ERR_NO_MEM;
  865. goto error;
  866. }
  867. s_lp_cntl.mac_bb_pd = 1;
  868. #endif
  869. #ifdef CONFIG_PM_ENABLE
  870. s_lp_cntl.wakeup_timer_required = 1;
  871. #endif
  872. // async wakeup semaphore for VHCI
  873. s_wakeup_req_sem = semphr_create_wrapper(1, 0);
  874. if (s_wakeup_req_sem == NULL) {
  875. err = ESP_ERR_NO_MEM;
  876. goto error;
  877. }
  878. btdm_vnd_offload_task_register(BTDM_VND_OL_SIG_WAKEUP_TMR, btdm_sleep_exit_phase0);
  879. }
  880. if (s_lp_cntl.wakeup_timer_required) {
  881. esp_timer_create_args_t create_args = {
  882. .callback = btdm_slp_tmr_callback,
  883. .arg = NULL,
  884. .name = "btSlp",
  885. };
  886. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  887. goto error;
  888. }
  889. }
  890. // set default bluetooth sleep clock cycle and its fractional bits
  891. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  892. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  893. // set default bluetooth sleep clock source
  894. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL; // set default value
  895. #if CONFIG_BT_CTRL_LPCLK_SEL_EXT_32K_XTAL
  896. // check whether or not EXT_CRYS is working
  897. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_32K_XTAL) {
  898. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_XTAL32K; // External 32 kHz XTAL
  899. s_lp_cntl.no_light_sleep = 0;
  900. } else {
  901. ESP_LOGW(BTDM_LOG_TAG, "32.768kHz XTAL not detected, fall back to main XTAL as Bluetooth sleep clock\n"
  902. "light sleep mode will not be able to apply when bluetooth is enabled");
  903. }
  904. #elif (CONFIG_BT_CTRL_LPCLK_SEL_RTC_SLOW)
  905. // check whether or not EXT_CRYS is working
  906. if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
  907. s_lp_cntl.lpclk_sel = BTDM_LPCLK_SEL_RTC_SLOW; // Internal 150 kHz RC oscillator
  908. ESP_LOGW(BTDM_LOG_TAG, "Internal 150kHz RC osciallator. The accuracy of this clock is a lot larger than 500ppm which is "
  909. "required in Bluetooth communication, so don't select this option in scenarios such as BLE connection state.");
  910. } else {
  911. ESP_LOGW(BT_LOG_TAG, "Internal 150kHz RC oscillator not detected.");
  912. assert(0);
  913. }
  914. #else
  915. s_lp_cntl.no_light_sleep = 1;
  916. #endif
  917. bool select_src_ret, set_div_ret;
  918. if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL) {
  919. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  920. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2);
  921. assert(select_src_ret && set_div_ret);
  922. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  923. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  924. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_XTAL32K) {
  925. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  926. set_div_ret = btdm_lpclk_set_div(0);
  927. assert(select_src_ret && set_div_ret);
  928. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  929. btdm_lpcycle_us = (RTC_CLK_CAL_FRACT > 15) ? (1000000 << (RTC_CLK_CAL_FRACT - 15)) :
  930. (1000000 >> (15 - RTC_CLK_CAL_FRACT));
  931. assert(btdm_lpcycle_us != 0);
  932. } else if (s_lp_cntl.lpclk_sel == BTDM_LPCLK_SEL_RTC_SLOW) {
  933. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_RTC_SLOW);
  934. set_div_ret = btdm_lpclk_set_div(0);
  935. assert(select_src_ret && set_div_ret);
  936. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  937. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  938. } else {
  939. err = ESP_ERR_INVALID_ARG;
  940. goto error;
  941. }
  942. #ifdef CONFIG_PM_ENABLE
  943. if (s_lp_cntl.no_light_sleep) {
  944. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  945. err = ESP_ERR_NO_MEM;
  946. goto error;
  947. }
  948. }
  949. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  950. err = ESP_ERR_NO_MEM;
  951. goto error;
  952. } else {
  953. s_lp_stat.pm_lock_released = 1;
  954. }
  955. #endif
  956. } while (0);
  957. #if CONFIG_SW_COEXIST_ENABLE
  958. coex_init();
  959. #endif
  960. periph_module_enable(PERIPH_BT_MODULE);
  961. esp_phy_enable();
  962. s_lp_stat.phy_enabled = 1;
  963. if (btdm_controller_init(cfg) != 0) {
  964. err = ESP_ERR_NO_MEM;
  965. goto error;
  966. }
  967. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  968. return ESP_OK;
  969. error:
  970. if (s_lp_stat.phy_enabled) {
  971. esp_phy_disable();
  972. s_lp_stat.phy_enabled = 0;
  973. }
  974. do {
  975. // deinit low power control resources
  976. #ifdef CONFIG_PM_ENABLE
  977. if (s_lp_cntl.no_light_sleep) {
  978. if (s_light_sleep_pm_lock != NULL) {
  979. esp_pm_lock_delete(s_light_sleep_pm_lock);
  980. s_light_sleep_pm_lock = NULL;
  981. }
  982. }
  983. if (s_pm_lock != NULL) {
  984. esp_pm_lock_delete(s_pm_lock);
  985. s_pm_lock = NULL;
  986. s_lp_stat.pm_lock_released = 0;
  987. }
  988. #endif
  989. if (s_lp_cntl.wakeup_timer_required && s_btdm_slp_tmr != NULL) {
  990. esp_timer_delete(s_btdm_slp_tmr);
  991. s_btdm_slp_tmr = NULL;
  992. }
  993. #if (CONFIG_MAC_BB_PD)
  994. if (s_lp_cntl.mac_bb_pd) {
  995. btdm_deep_sleep_mem_deinit();
  996. s_lp_cntl.mac_bb_pd = 0;
  997. }
  998. #endif
  999. if (s_lp_cntl.enable) {
  1000. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1001. if (s_wakeup_req_sem != NULL) {
  1002. semphr_delete_wrapper(s_wakeup_req_sem);
  1003. s_wakeup_req_sem = NULL;
  1004. }
  1005. }
  1006. } while (0);
  1007. #if CONFIG_MAC_BB_PD
  1008. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1009. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1010. #endif
  1011. if (osi_funcs_p != NULL) {
  1012. free(osi_funcs_p);
  1013. osi_funcs_p = NULL;
  1014. }
  1015. return err;
  1016. }
  1017. esp_err_t esp_bt_controller_deinit(void)
  1018. {
  1019. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1020. return ESP_ERR_INVALID_STATE;
  1021. }
  1022. btdm_controller_deinit();
  1023. periph_module_disable(PERIPH_BT_MODULE);
  1024. if (s_lp_stat.phy_enabled) {
  1025. esp_phy_disable();
  1026. s_lp_stat.phy_enabled = 0;
  1027. } else {
  1028. assert(0);
  1029. }
  1030. // deinit low power control resources
  1031. do {
  1032. #if (CONFIG_MAC_BB_PD)
  1033. btdm_deep_sleep_mem_deinit();
  1034. #endif
  1035. #ifdef CONFIG_PM_ENABLE
  1036. if (s_lp_cntl.no_light_sleep) {
  1037. esp_pm_lock_delete(s_light_sleep_pm_lock);
  1038. s_light_sleep_pm_lock = NULL;
  1039. }
  1040. esp_pm_lock_delete(s_pm_lock);
  1041. s_pm_lock = NULL;
  1042. s_lp_stat.pm_lock_released = 0;
  1043. #endif
  1044. if (s_lp_cntl.wakeup_timer_required) {
  1045. if (s_lp_stat.wakeup_timer_started) {
  1046. esp_timer_stop(s_btdm_slp_tmr);
  1047. }
  1048. s_lp_stat.wakeup_timer_started = 0;
  1049. esp_timer_delete(s_btdm_slp_tmr);
  1050. s_btdm_slp_tmr = NULL;
  1051. }
  1052. if (s_lp_cntl.enable) {
  1053. btdm_vnd_offload_task_deregister(BTDM_VND_OL_SIG_WAKEUP_TMR);
  1054. semphr_delete_wrapper(s_wakeup_req_sem);
  1055. s_wakeup_req_sem = NULL;
  1056. }
  1057. } while (0);
  1058. #if CONFIG_MAC_BB_PD
  1059. esp_unregister_mac_bb_pd_callback(btdm_mac_bb_power_down_cb);
  1060. esp_unregister_mac_bb_pu_callback(btdm_mac_bb_power_up_cb);
  1061. #endif
  1062. free(osi_funcs_p);
  1063. osi_funcs_p = NULL;
  1064. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  1065. btdm_lpcycle_us = 0;
  1066. return ESP_OK;
  1067. }
  1068. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  1069. {
  1070. int ret = ESP_OK;
  1071. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  1072. return ESP_ERR_INVALID_STATE;
  1073. }
  1074. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  1075. if (mode != btdm_controller_get_mode()) {
  1076. ESP_LOGE(BTDM_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  1077. return ESP_ERR_INVALID_ARG;
  1078. }
  1079. #if CONFIG_SW_COEXIST_ENABLE
  1080. coex_enable();
  1081. #endif
  1082. // enable low power mode
  1083. do {
  1084. #ifdef CONFIG_PM_ENABLE
  1085. if (s_lp_cntl.no_light_sleep) {
  1086. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  1087. }
  1088. esp_pm_lock_acquire(s_pm_lock);
  1089. s_lp_stat.pm_lock_released = 0;
  1090. #endif
  1091. if (s_lp_cntl.enable) {
  1092. btdm_controller_enable_sleep(true);
  1093. }
  1094. } while (0);
  1095. if (btdm_controller_enable(mode) != 0) {
  1096. ret = ESP_ERR_INVALID_STATE;
  1097. goto error;
  1098. }
  1099. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  1100. return ret;
  1101. error:
  1102. // disable low power mode
  1103. do {
  1104. btdm_controller_enable_sleep(false);
  1105. #ifdef CONFIG_PM_ENABLE
  1106. if (s_lp_cntl.no_light_sleep) {
  1107. esp_pm_lock_release(s_light_sleep_pm_lock);
  1108. }
  1109. if (s_lp_stat.pm_lock_released == 0) {
  1110. esp_pm_lock_release(s_pm_lock);
  1111. s_lp_stat.pm_lock_released = 1;
  1112. }
  1113. #endif
  1114. } while (0);
  1115. return ret;
  1116. }
  1117. esp_err_t esp_bt_controller_disable(void)
  1118. {
  1119. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1120. return ESP_ERR_INVALID_STATE;
  1121. }
  1122. async_wakeup_request(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1123. while (!btdm_power_state_active()){}
  1124. btdm_controller_disable();
  1125. async_wakeup_request_end(BTDM_ASYNC_WAKEUP_SRC_DISA);
  1126. #if CONFIG_SW_COEXIST_ENABLE
  1127. coex_disable();
  1128. #endif
  1129. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  1130. // disable low power mode
  1131. do {
  1132. #ifdef CONFIG_PM_ENABLE
  1133. if (s_lp_cntl.no_light_sleep) {
  1134. esp_pm_lock_release(s_light_sleep_pm_lock);
  1135. }
  1136. if (s_lp_stat.pm_lock_released == 0) {
  1137. esp_pm_lock_release(s_pm_lock);
  1138. s_lp_stat.pm_lock_released = 1;
  1139. } else {
  1140. assert(0);
  1141. }
  1142. #endif
  1143. } while (0);
  1144. return ESP_OK;
  1145. }
  1146. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1147. {
  1148. return btdm_controller_status;
  1149. }
  1150. /* extra functions */
  1151. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1152. {
  1153. esp_err_t stat = ESP_FAIL;
  1154. switch (power_type) {
  1155. case ESP_BLE_PWR_TYPE_ADV:
  1156. case ESP_BLE_PWR_TYPE_SCAN:
  1157. case ESP_BLE_PWR_TYPE_DEFAULT:
  1158. if (ble_txpwr_set(power_type, power_level) == 0) {
  1159. stat = ESP_OK;
  1160. }
  1161. break;
  1162. default:
  1163. stat = ESP_ERR_NOT_SUPPORTED;
  1164. break;
  1165. }
  1166. return stat;
  1167. }
  1168. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1169. {
  1170. esp_power_level_t lvl;
  1171. switch (power_type) {
  1172. case ESP_BLE_PWR_TYPE_ADV:
  1173. case ESP_BLE_PWR_TYPE_SCAN:
  1174. lvl = (esp_power_level_t)ble_txpwr_get(power_type);
  1175. break;
  1176. case ESP_BLE_PWR_TYPE_CONN_HDL0:
  1177. case ESP_BLE_PWR_TYPE_CONN_HDL1:
  1178. case ESP_BLE_PWR_TYPE_CONN_HDL2:
  1179. case ESP_BLE_PWR_TYPE_CONN_HDL3:
  1180. case ESP_BLE_PWR_TYPE_CONN_HDL4:
  1181. case ESP_BLE_PWR_TYPE_CONN_HDL5:
  1182. case ESP_BLE_PWR_TYPE_CONN_HDL6:
  1183. case ESP_BLE_PWR_TYPE_CONN_HDL7:
  1184. case ESP_BLE_PWR_TYPE_CONN_HDL8:
  1185. case ESP_BLE_PWR_TYPE_DEFAULT:
  1186. lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
  1187. break;
  1188. default:
  1189. lvl = ESP_PWR_LVL_INVALID;
  1190. break;
  1191. }
  1192. return lvl;
  1193. }
  1194. esp_err_t esp_bt_sleep_enable (void)
  1195. {
  1196. esp_err_t status;
  1197. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1198. return ESP_ERR_INVALID_STATE;
  1199. }
  1200. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1201. btdm_controller_enable_sleep (true);
  1202. status = ESP_OK;
  1203. } else {
  1204. status = ESP_ERR_NOT_SUPPORTED;
  1205. }
  1206. return status;
  1207. }
  1208. esp_err_t esp_bt_sleep_disable (void)
  1209. {
  1210. esp_err_t status;
  1211. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1212. return ESP_ERR_INVALID_STATE;
  1213. }
  1214. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1215. btdm_controller_enable_sleep (false);
  1216. status = ESP_OK;
  1217. } else {
  1218. status = ESP_ERR_NOT_SUPPORTED;
  1219. }
  1220. return status;
  1221. }
  1222. bool esp_bt_controller_is_sleeping(void)
  1223. {
  1224. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1225. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1226. return false;
  1227. }
  1228. return !btdm_power_state_active();
  1229. }
  1230. void esp_bt_controller_wakeup_request(void)
  1231. {
  1232. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1233. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1234. return;
  1235. }
  1236. btdm_wakeup_request();
  1237. }
  1238. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1239. {
  1240. return btdm_hci_tl_io_event_post(event);
  1241. }
  1242. uint16_t esp_bt_get_tx_buf_num(void)
  1243. {
  1244. return l2c_ble_link_get_tx_buf_num();
  1245. }
  1246. static void coex_wifi_sleep_set_hook(bool sleep)
  1247. {
  1248. }
  1249. #endif /* CONFIG_BT_ENABLED */