bt.c 37 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. // http://www.apache.org/licenses/LICENSE-2.0
  7. //
  8. // Unless required by applicable law or agreed to in writing, software
  9. // distributed under the License is distributed on an "AS IS" BASIS,
  10. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  11. // See the License for the specific language governing permissions and
  12. // limitations under the License.
  13. #include <stddef.h>
  14. #include <stdlib.h>
  15. #include <stdio.h>
  16. #include <string.h>
  17. #include "sdkconfig.h"
  18. #include "esp_heap_caps.h"
  19. #include "esp_heap_caps_init.h"
  20. #include "freertos/FreeRTOS.h"
  21. #include "freertos/task.h"
  22. #include "freertos/queue.h"
  23. #include "freertos/semphr.h"
  24. #include "freertos/xtensa_api.h"
  25. #include "freertos/portmacro.h"
  26. #include "xtensa/core-macros.h"
  27. #include "esp_types.h"
  28. #include "esp_system.h"
  29. #include "esp_task.h"
  30. #include "esp_attr.h"
  31. #include "esp_phy_init.h"
  32. #include "esp_bt.h"
  33. #include "esp_err.h"
  34. #include "esp_log.h"
  35. #include "esp_pm.h"
  36. #include "esp_ipc.h"
  37. #include "driver/periph_ctrl.h"
  38. #include "soc/rtc.h"
  39. #include "soc/rtc_cntl_reg.h"
  40. #include "soc/soc_memory_layout.h"
  41. #include "esp_clk.h"
  42. #include "esp_coexist_internal.h"
  43. #if CONFIG_BT_ENABLED
  44. /* Macro definition
  45. ************************************************************************
  46. */
  47. #define BTDM_LOG_TAG "BTDM_INIT"
  48. #define BTDM_INIT_PERIOD (5000) /* ms */
  49. /* Low Power Clock Selection */
  50. #define BTDM_LPCLK_SEL_XTAL (0)
  51. #define BTDM_LPCLK_SEL_XTAL32K (1)
  52. #define BTDM_LPCLK_SEL_RTC_SLOW (2)
  53. #define BTDM_LPCLK_SEL_8M (3)
  54. /* Sleep and wakeup interval control */
  55. #define BTDM_MIN_SLEEP_DURATION (24) // threshold of interval in half slots to allow to fall into modem sleep
  56. #define BTDM_MODEM_WAKE_UP_DELAY (8) // delay in half slots of modem wake up procedure, including re-enable PHY/RF
  57. #define BTDM_MODEM_SLEEP_IN_EFFECT (1)
  58. #define BT_DEBUG(...)
  59. #define BT_API_CALL_CHECK(info, api_call, ret) \
  60. do{\
  61. esp_err_t __err = (api_call);\
  62. if ((ret) != __err) {\
  63. BT_DEBUG("%s %d %s ret=0x%X\n", __FUNCTION__, __LINE__, (info), __err);\
  64. return __err;\
  65. }\
  66. } while(0)
  67. #define OSI_FUNCS_TIME_BLOCKING 0xffffffff
  68. #define OSI_VERSION 0x00010005
  69. #define OSI_MAGIC_VALUE 0xFADEBEAD
  70. /* SPIRAM Configuration */
  71. #if CONFIG_SPIRAM_USE_MALLOC
  72. #define BTDM_MAX_QUEUE_NUM (5)
  73. #endif
  74. /* Types definition
  75. ************************************************************************
  76. */
  77. /* VHCI function interface */
  78. typedef struct vhci_host_callback {
  79. void (*notify_host_send_available)(void); /*!< callback used to notify that the host can send packet to controller */
  80. int (*notify_host_recv)(uint8_t *data, uint16_t len); /*!< callback used to notify that the controller has a packet to send to the host*/
  81. } vhci_host_callback_t;
  82. /* Dram region */
  83. typedef struct {
  84. esp_bt_mode_t mode;
  85. intptr_t start;
  86. intptr_t end;
  87. } btdm_dram_available_region_t;
  88. /* PSRAM configuration */
  89. #if CONFIG_SPIRAM_USE_MALLOC
  90. typedef struct {
  91. QueueHandle_t handle;
  92. void *storage;
  93. void *buffer;
  94. } btdm_queue_item_t;
  95. #endif
  96. /* OSI function */
  97. struct osi_funcs_t {
  98. uint32_t _magic;
  99. uint32_t _version;
  100. xt_handler (*_set_isr)(int n, xt_handler f, void *arg);
  101. void (*_ints_on)(unsigned int mask);
  102. void (*_interrupt_disable)(void);
  103. void (*_interrupt_restore)(void);
  104. void (*_task_yield)(void);
  105. void (*_task_yield_from_isr)(void);
  106. void *(*_semphr_create)(uint32_t max, uint32_t init);
  107. void (*_semphr_delete)(void *semphr);
  108. int32_t (*_semphr_take_from_isr)(void *semphr, void *hptw);
  109. int32_t (*_semphr_give_from_isr)(void *semphr, void *hptw);
  110. int32_t (*_semphr_take)(void *semphr, uint32_t block_time_ms);
  111. int32_t (*_semphr_give)(void *semphr);
  112. void *(*_mutex_create)(void);
  113. void (*_mutex_delete)(void *mutex);
  114. int32_t (*_mutex_lock)(void *mutex);
  115. int32_t (*_mutex_unlock)(void *mutex);
  116. void *(* _queue_create)(uint32_t queue_len, uint32_t item_size);
  117. void (* _queue_delete)(void *queue);
  118. int32_t (* _queue_send)(void *queue, void *item, uint32_t block_time_ms);
  119. int32_t (* _queue_send_from_isr)(void *queue, void *item, void *hptw);
  120. int32_t (* _queue_recv)(void *queue, void *item, uint32_t block_time_ms);
  121. int32_t (* _queue_recv_from_isr)(void *queue, void *item, void *hptw);
  122. int32_t (* _task_create)(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  123. void (* _task_delete)(void *task_handle);
  124. bool (* _is_in_isr)(void);
  125. int (* _cause_sw_intr_to_core)(int core_id, int intr_no);
  126. void *(* _malloc)(uint32_t size);
  127. void *(* _malloc_internal)(uint32_t size);
  128. void (* _free)(void *p);
  129. int32_t (* _read_efuse_mac)(uint8_t mac[6]);
  130. void (* _srand)(unsigned int seed);
  131. int (* _rand)(void);
  132. uint32_t (* _btdm_lpcycles_2_hus)(uint32_t cycles, uint32_t *error_corr);
  133. uint32_t (* _btdm_hus_2_lpcycles)(uint32_t hus);
  134. bool (* _btdm_sleep_check_duration)(int32_t *slot_cnt);
  135. void (* _btdm_sleep_enter_phase1)(uint32_t lpcycles); /* called when interrupt is disabled */
  136. void (* _btdm_sleep_enter_phase2)(void);
  137. void (* _btdm_sleep_exit_phase1)(void); /* called from ISR */
  138. void (* _btdm_sleep_exit_phase2)(void); /* called from ISR */
  139. void (* _btdm_sleep_exit_phase3)(void); /* called from task */
  140. void (* _coex_wifi_sleep_set)(bool sleep);
  141. int (* _coex_core_ble_conn_dyn_prio_get)(bool *low, bool *high);
  142. void (* _coex_schm_status_bit_set)(uint32_t type, uint32_t status);
  143. void (* _coex_schm_status_bit_clear)(uint32_t type, uint32_t status);
  144. };
  145. /* External functions or values
  146. ************************************************************************
  147. */
  148. /* not for user call, so don't put to include file */
  149. /* OSI */
  150. extern int btdm_osi_funcs_register(void *osi_funcs);
  151. /* Initialise and De-initialise */
  152. extern int btdm_controller_init(esp_bt_controller_config_t *config_opts);
  153. extern void btdm_controller_deinit(void);
  154. extern int btdm_controller_enable(esp_bt_mode_t mode);
  155. extern void btdm_controller_disable(void);
  156. extern uint8_t btdm_controller_get_mode(void);
  157. extern const char *btdm_controller_get_compile_version(void);
  158. extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
  159. /* Sleep */
  160. extern void btdm_controller_enable_sleep(bool enable);
  161. extern uint8_t btdm_controller_get_sleep_mode(void);
  162. extern bool btdm_power_state_active(void);
  163. extern void btdm_wakeup_request(bool request_lock);
  164. extern void btdm_wakeup_request_end(void);
  165. /* Low Power Clock */
  166. extern bool btdm_lpclk_select_src(uint32_t sel);
  167. extern bool btdm_lpclk_set_div(uint32_t div);
  168. extern int btdm_hci_tl_io_event_post(int event);
  169. /* VHCI */
  170. extern bool API_vhci_host_check_send_available(void);
  171. extern void API_vhci_host_send_packet(uint8_t *data, uint16_t len);
  172. extern int API_vhci_host_register_callback(const vhci_host_callback_t *callback);
  173. /* TX power */
  174. extern int ble_txpwr_set(int power_type, int power_level);
  175. extern int ble_txpwr_get(int power_type);
  176. extern uint16_t l2c_ble_link_get_tx_buf_num(void);
  177. extern char _bss_start_btdm;
  178. extern char _bss_end_btdm;
  179. extern char _data_start_btdm;
  180. extern char _data_end_btdm;
  181. extern uint32_t _data_start_btdm_rom;
  182. extern uint32_t _data_end_btdm_rom;
  183. extern uint32_t _bt_bss_start;
  184. extern uint32_t _bt_bss_end;
  185. extern uint32_t _btdm_bss_start;
  186. extern uint32_t _btdm_bss_end;
  187. extern uint32_t _bt_data_start;
  188. extern uint32_t _bt_data_end;
  189. extern uint32_t _btdm_data_start;
  190. extern uint32_t _btdm_data_end;
  191. extern char _bt_tmp_bss_start;
  192. extern char _bt_tmp_bss_end;
  193. /* Local Function Declare
  194. *********************************************************************
  195. */
  196. #if CONFIG_SPIRAM_USE_MALLOC
  197. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue);
  198. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue);
  199. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  200. static void IRAM_ATTR interrupt_disable(void);
  201. static void IRAM_ATTR interrupt_restore(void);
  202. static void IRAM_ATTR task_yield_from_isr(void);
  203. static void *semphr_create_wrapper(uint32_t max, uint32_t init);
  204. static void semphr_delete_wrapper(void *semphr);
  205. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw);
  206. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw);
  207. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms);
  208. static int32_t semphr_give_wrapper(void *semphr);
  209. static void *mutex_create_wrapper(void);
  210. static void mutex_delete_wrapper(void *mutex);
  211. static int32_t mutex_lock_wrapper(void *mutex);
  212. static int32_t mutex_unlock_wrapper(void *mutex);
  213. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size);
  214. static void queue_delete_wrapper(void *queue);
  215. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms);
  216. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw);
  217. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms);
  218. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw);
  219. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id);
  220. static void task_delete_wrapper(void *task_handle);
  221. static bool IRAM_ATTR is_in_isr_wrapper(void);
  222. static void IRAM_ATTR cause_sw_intr(void *arg);
  223. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no);
  224. static void *malloc_internal_wrapper(size_t size);
  225. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6]);
  226. static void IRAM_ATTR srand_wrapper(unsigned int seed);
  227. static int IRAM_ATTR rand_wrapper(void);
  228. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr);
  229. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus);
  230. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *slot_cnt);
  231. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles);
  232. static void btdm_sleep_enter_phase2_wrapper(void);
  233. static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void);
  234. static void btdm_sleep_exit_phase3_wrapper(void);
  235. static void coex_wifi_sleep_set_hook(bool sleep);
  236. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status);
  237. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status);
  238. /* Local variable definition
  239. ***************************************************************************
  240. */
  241. /* OSI funcs */
  242. static const struct osi_funcs_t osi_funcs_ro = {
  243. ._magic = OSI_MAGIC_VALUE,
  244. ._version = OSI_VERSION,
  245. ._set_isr = xt_set_interrupt_handler,
  246. ._ints_on = xt_ints_on,
  247. ._interrupt_disable = interrupt_disable,
  248. ._interrupt_restore = interrupt_restore,
  249. ._task_yield = vPortYield,
  250. ._task_yield_from_isr = task_yield_from_isr,
  251. ._semphr_create = semphr_create_wrapper,
  252. ._semphr_delete = semphr_delete_wrapper,
  253. ._semphr_take_from_isr = semphr_take_from_isr_wrapper,
  254. ._semphr_give_from_isr = semphr_give_from_isr_wrapper,
  255. ._semphr_take = semphr_take_wrapper,
  256. ._semphr_give = semphr_give_wrapper,
  257. ._mutex_create = mutex_create_wrapper,
  258. ._mutex_delete = mutex_delete_wrapper,
  259. ._mutex_lock = mutex_lock_wrapper,
  260. ._mutex_unlock = mutex_unlock_wrapper,
  261. ._queue_create = queue_create_wrapper,
  262. ._queue_delete = queue_delete_wrapper,
  263. ._queue_send = queue_send_wrapper,
  264. ._queue_send_from_isr = queue_send_from_isr_wrapper,
  265. ._queue_recv = queue_recv_wrapper,
  266. ._queue_recv_from_isr = queue_recv_from_isr_wrapper,
  267. ._task_create = task_create_wrapper,
  268. ._task_delete = task_delete_wrapper,
  269. ._is_in_isr = is_in_isr_wrapper,
  270. ._cause_sw_intr_to_core = cause_sw_intr_to_core_wrapper,
  271. ._malloc = malloc,
  272. ._malloc_internal = malloc_internal_wrapper,
  273. ._free = free,
  274. ._read_efuse_mac = read_mac_wrapper,
  275. ._srand = srand_wrapper,
  276. ._rand = rand_wrapper,
  277. ._btdm_lpcycles_2_hus = btdm_lpcycles_2_hus,
  278. ._btdm_hus_2_lpcycles = btdm_hus_2_lpcycles,
  279. ._btdm_sleep_check_duration = btdm_sleep_check_duration,
  280. ._btdm_sleep_enter_phase1 = btdm_sleep_enter_phase1_wrapper,
  281. ._btdm_sleep_enter_phase2 = btdm_sleep_enter_phase2_wrapper,
  282. ._btdm_sleep_exit_phase1 = btdm_sleep_exit_phase1_wrapper,
  283. ._btdm_sleep_exit_phase2 = NULL,
  284. ._btdm_sleep_exit_phase3 = btdm_sleep_exit_phase3_wrapper,
  285. ._coex_wifi_sleep_set = coex_wifi_sleep_set_hook,
  286. ._coex_core_ble_conn_dyn_prio_get = NULL,
  287. ._coex_schm_status_bit_set = coex_schm_status_bit_set_wrapper,
  288. ._coex_schm_status_bit_clear = coex_schm_status_bit_clear_wrapper,
  289. };
  290. static DRAM_ATTR struct osi_funcs_t *osi_funcs_p;
  291. #if CONFIG_SPIRAM_USE_MALLOC
  292. static DRAM_ATTR btdm_queue_item_t btdm_queue_table[BTDM_MAX_QUEUE_NUM];
  293. static DRAM_ATTR SemaphoreHandle_t btdm_queue_table_mux = NULL;
  294. #endif /* #if CONFIG_SPIRAM_USE_MALLOC */
  295. /* Static variable declare */
  296. // timestamp when PHY/RF was switched on
  297. // static DRAM_ATTR int64_t s_time_phy_rf_just_enabled = 0;
  298. static DRAM_ATTR esp_bt_controller_status_t btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  299. static DRAM_ATTR portMUX_TYPE global_int_mux = portMUX_INITIALIZER_UNLOCKED;
  300. // measured average low power clock period in micro seconds
  301. static DRAM_ATTR uint32_t btdm_lpcycle_us = 0;
  302. static DRAM_ATTR uint8_t btdm_lpcycle_us_frac = 0; // number of fractional bit for btdm_lpcycle_us
  303. #ifdef CONFIG_PM_ENABLE
  304. static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr;
  305. static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock;
  306. static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock; // pm_lock to prevent light sleep due to incompatibility currently
  307. static DRAM_ATTR QueueHandle_t s_pm_lock_sem = NULL;
  308. static void btdm_slp_tmr_callback(void *arg);
  309. #endif
  310. static inline void btdm_check_and_init_bb(void)
  311. {
  312. // todo:
  313. // btdm_rf_bb_init_phase2();
  314. }
  315. #if CONFIG_SPIRAM_USE_MALLOC
  316. static bool btdm_queue_generic_register(const btdm_queue_item_t *queue)
  317. {
  318. if (!btdm_queue_table_mux || !queue) {
  319. return NULL;
  320. }
  321. bool ret = false;
  322. btdm_queue_item_t *item;
  323. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  324. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  325. item = &btdm_queue_table[i];
  326. if (item->handle == NULL) {
  327. memcpy(item, queue, sizeof(btdm_queue_item_t));
  328. ret = true;
  329. break;
  330. }
  331. }
  332. xSemaphoreGive(btdm_queue_table_mux);
  333. return ret;
  334. }
  335. static bool btdm_queue_generic_deregister(btdm_queue_item_t *queue)
  336. {
  337. if (!btdm_queue_table_mux || !queue) {
  338. return false;
  339. }
  340. bool ret = false;
  341. btdm_queue_item_t *item;
  342. xSemaphoreTake(btdm_queue_table_mux, portMAX_DELAY);
  343. for (int i = 0; i < BTDM_MAX_QUEUE_NUM; ++i) {
  344. item = &btdm_queue_table[i];
  345. if (item->handle == queue->handle) {
  346. memcpy(queue, item, sizeof(btdm_queue_item_t));
  347. memset(item, 0, sizeof(btdm_queue_item_t));
  348. ret = true;
  349. break;
  350. }
  351. }
  352. xSemaphoreGive(btdm_queue_table_mux);
  353. return ret;
  354. }
  355. #endif /* CONFIG_SPIRAM_USE_MALLOC */
  356. static void IRAM_ATTR interrupt_disable(void)
  357. {
  358. if (xPortInIsrContext()) {
  359. portENTER_CRITICAL_ISR(&global_int_mux);
  360. } else {
  361. portENTER_CRITICAL(&global_int_mux);
  362. }
  363. }
  364. static void IRAM_ATTR interrupt_restore(void)
  365. {
  366. if (xPortInIsrContext()) {
  367. portEXIT_CRITICAL_ISR(&global_int_mux);
  368. } else {
  369. portEXIT_CRITICAL(&global_int_mux);
  370. }
  371. }
  372. static void IRAM_ATTR task_yield_from_isr(void)
  373. {
  374. portYIELD_FROM_ISR();
  375. }
  376. static void *semphr_create_wrapper(uint32_t max, uint32_t init)
  377. {
  378. #if !CONFIG_SPIRAM_USE_MALLOC
  379. return (void *)xSemaphoreCreateCounting(max, init);
  380. #else
  381. StaticQueue_t *queue_buffer = NULL;
  382. QueueHandle_t handle = NULL;
  383. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  384. if (!queue_buffer) {
  385. goto error;
  386. }
  387. handle = xSemaphoreCreateCountingStatic(max, init, queue_buffer);
  388. if (!handle) {
  389. goto error;
  390. }
  391. btdm_queue_item_t item = {
  392. .handle = handle,
  393. .storage = NULL,
  394. .buffer = queue_buffer,
  395. };
  396. if (!btdm_queue_generic_register(&item)) {
  397. goto error;
  398. }
  399. return handle;
  400. error:
  401. if (handle) {
  402. vSemaphoreDelete(handle);
  403. }
  404. if (queue_buffer) {
  405. free(queue_buffer);
  406. }
  407. return NULL;
  408. #endif
  409. }
  410. static void semphr_delete_wrapper(void *semphr)
  411. {
  412. #if !CONFIG_SPIRAM_USE_MALLOC
  413. vSemaphoreDelete(semphr);
  414. #else
  415. btdm_queue_item_t item = {
  416. .handle = semphr,
  417. .storage = NULL,
  418. .buffer = NULL,
  419. };
  420. if (btdm_queue_generic_deregister(&item)) {
  421. vSemaphoreDelete(item.handle);
  422. free(item.buffer);
  423. }
  424. return;
  425. #endif
  426. }
  427. static int32_t IRAM_ATTR semphr_take_from_isr_wrapper(void *semphr, void *hptw)
  428. {
  429. return (int32_t)xSemaphoreTakeFromISR(semphr, hptw);
  430. }
  431. static int32_t IRAM_ATTR semphr_give_from_isr_wrapper(void *semphr, void *hptw)
  432. {
  433. return (int32_t)xSemaphoreGiveFromISR(semphr, hptw);
  434. }
  435. static int32_t semphr_take_wrapper(void *semphr, uint32_t block_time_ms)
  436. {
  437. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  438. return (int32_t)xSemaphoreTake(semphr, portMAX_DELAY);
  439. } else {
  440. return (int32_t)xSemaphoreTake(semphr, block_time_ms / portTICK_PERIOD_MS);
  441. }
  442. }
  443. static int32_t semphr_give_wrapper(void *semphr)
  444. {
  445. return (int32_t)xSemaphoreGive(semphr);
  446. }
  447. static void *mutex_create_wrapper(void)
  448. {
  449. #if CONFIG_SPIRAM_USE_MALLOC
  450. StaticQueue_t *queue_buffer = NULL;
  451. QueueHandle_t handle = NULL;
  452. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  453. if (!queue_buffer) {
  454. goto error;
  455. }
  456. handle = xSemaphoreCreateMutexStatic(queue_buffer);
  457. if (!handle) {
  458. goto error;
  459. }
  460. btdm_queue_item_t item = {
  461. .handle = handle,
  462. .storage = NULL,
  463. .buffer = queue_buffer,
  464. };
  465. if (!btdm_queue_generic_register(&item)) {
  466. goto error;
  467. }
  468. return handle;
  469. error:
  470. if (handle) {
  471. vSemaphoreDelete(handle);
  472. }
  473. if (queue_buffer) {
  474. free(queue_buffer);
  475. }
  476. return NULL;
  477. #else
  478. return (void *)xSemaphoreCreateMutex();
  479. #endif
  480. }
  481. static void mutex_delete_wrapper(void *mutex)
  482. {
  483. #if !CONFIG_SPIRAM_USE_MALLOC
  484. vSemaphoreDelete(mutex);
  485. #else
  486. btdm_queue_item_t item = {
  487. .handle = mutex,
  488. .storage = NULL,
  489. .buffer = NULL,
  490. };
  491. if (btdm_queue_generic_deregister(&item)) {
  492. vSemaphoreDelete(item.handle);
  493. free(item.buffer);
  494. }
  495. return;
  496. #endif
  497. }
  498. static int32_t mutex_lock_wrapper(void *mutex)
  499. {
  500. return (int32_t)xSemaphoreTake(mutex, portMAX_DELAY);
  501. }
  502. static int32_t mutex_unlock_wrapper(void *mutex)
  503. {
  504. return (int32_t)xSemaphoreGive(mutex);
  505. }
  506. static void *queue_create_wrapper(uint32_t queue_len, uint32_t item_size)
  507. {
  508. #if CONFIG_SPIRAM_USE_MALLOC
  509. StaticQueue_t *queue_buffer = NULL;
  510. uint8_t *queue_storage = NULL;
  511. QueueHandle_t handle = NULL;
  512. queue_buffer = heap_caps_malloc(sizeof(StaticQueue_t), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  513. if (!queue_buffer) {
  514. goto error;
  515. }
  516. queue_storage = heap_caps_malloc((queue_len*item_size), MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT);
  517. if (!queue_storage ) {
  518. goto error;
  519. }
  520. handle = xQueueCreateStatic(queue_len, item_size, queue_storage, queue_buffer);
  521. if (!handle) {
  522. goto error;
  523. }
  524. btdm_queue_item_t item = {
  525. .handle = handle,
  526. .storage = queue_storage,
  527. .buffer = queue_buffer,
  528. };
  529. if (!btdm_queue_generic_register(&item)) {
  530. goto error;
  531. }
  532. return handle;
  533. error:
  534. if (handle) {
  535. vQueueDelete(handle);
  536. }
  537. if (queue_storage) {
  538. free(queue_storage);
  539. }
  540. if (queue_buffer) {
  541. free(queue_buffer);
  542. }
  543. return NULL;
  544. #else
  545. return (void *)xQueueCreate(queue_len, item_size);
  546. #endif
  547. }
  548. static void queue_delete_wrapper(void *queue)
  549. {
  550. #if !CONFIG_SPIRAM_USE_MALLOC
  551. vQueueDelete(queue);
  552. #else
  553. btdm_queue_item_t item = {
  554. .handle = queue,
  555. .storage = NULL,
  556. .buffer = NULL,
  557. };
  558. if (btdm_queue_generic_deregister(&item)) {
  559. vQueueDelete(item.handle);
  560. free(item.storage);
  561. free(item.buffer);
  562. }
  563. return;
  564. #endif
  565. }
  566. static int32_t queue_send_wrapper(void *queue, void *item, uint32_t block_time_ms)
  567. {
  568. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  569. return (int32_t)xQueueSend(queue, item, portMAX_DELAY);
  570. } else {
  571. return (int32_t)xQueueSend(queue, item, block_time_ms / portTICK_PERIOD_MS);
  572. }
  573. }
  574. static int32_t IRAM_ATTR queue_send_from_isr_wrapper(void *queue, void *item, void *hptw)
  575. {
  576. return (int32_t)xQueueSendFromISR(queue, item, hptw);
  577. }
  578. static int32_t queue_recv_wrapper(void *queue, void *item, uint32_t block_time_ms)
  579. {
  580. if (block_time_ms == OSI_FUNCS_TIME_BLOCKING) {
  581. return (int32_t)xQueueReceive(queue, item, portMAX_DELAY);
  582. } else {
  583. return (int32_t)xQueueReceive(queue, item, block_time_ms / portTICK_PERIOD_MS);
  584. }
  585. }
  586. static int32_t IRAM_ATTR queue_recv_from_isr_wrapper(void *queue, void *item, void *hptw)
  587. {
  588. return (int32_t)xQueueReceiveFromISR(queue, item, hptw);
  589. }
  590. static int32_t task_create_wrapper(void *task_func, const char *name, uint32_t stack_depth, void *param, uint32_t prio, void *task_handle, uint32_t core_id)
  591. {
  592. return (uint32_t)xTaskCreatePinnedToCore(task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : tskNO_AFFINITY));
  593. }
  594. static void task_delete_wrapper(void *task_handle)
  595. {
  596. vTaskDelete(task_handle);
  597. }
  598. static bool IRAM_ATTR is_in_isr_wrapper(void)
  599. {
  600. return (bool)xPortInIsrContext();
  601. }
  602. static void IRAM_ATTR cause_sw_intr(void *arg)
  603. {
  604. /* just convert void * to int, because the width is the same */
  605. uint32_t intr_no = (uint32_t)arg;
  606. XTHAL_SET_INTSET((1<<intr_no));
  607. }
  608. static int IRAM_ATTR cause_sw_intr_to_core_wrapper(int core_id, int intr_no)
  609. {
  610. esp_err_t err = ESP_OK;
  611. if (xPortGetCoreID() == core_id) {
  612. cause_sw_intr((void *)intr_no);
  613. } else {
  614. err = esp_ipc_call(core_id, cause_sw_intr, (void *)intr_no);
  615. }
  616. return err;
  617. }
  618. static void *malloc_internal_wrapper(size_t size)
  619. {
  620. return heap_caps_malloc(size, MALLOC_CAP_DEFAULT|MALLOC_CAP_INTERNAL|MALLOC_CAP_DMA);
  621. }
  622. static int32_t IRAM_ATTR read_mac_wrapper(uint8_t mac[6])
  623. {
  624. esp_read_mac(mac, ESP_MAC_BT);
  625. ESP_LOGI(BTDM_LOG_TAG, "Bluetooth MAC: 0x%02x:%02x:%02x:%02x:%02x:%02x\n",
  626. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  627. return ESP_OK;
  628. }
  629. static void IRAM_ATTR srand_wrapper(unsigned int seed)
  630. {
  631. /* empty function */
  632. }
  633. static int IRAM_ATTR rand_wrapper(void)
  634. {
  635. return (int)esp_random();
  636. }
  637. static uint32_t IRAM_ATTR btdm_lpcycles_2_hus(uint32_t cycles, uint32_t *error_corr)
  638. {
  639. uint64_t local_error_corr = (error_corr == NULL) ? 0 : (uint64_t)(*error_corr);
  640. uint64_t res = (uint64_t)btdm_lpcycle_us * cycles * 2;
  641. local_error_corr += res;
  642. res = (local_error_corr >> btdm_lpcycle_us_frac);
  643. local_error_corr -= (res << btdm_lpcycle_us_frac);
  644. if (error_corr) {
  645. *error_corr = (uint32_t) local_error_corr;
  646. }
  647. return (uint32_t)res;
  648. }
  649. /*
  650. * @brief Converts a duration in half us into a number of low power clock cycles.
  651. */
  652. static uint32_t IRAM_ATTR btdm_hus_2_lpcycles(uint32_t hus)
  653. {
  654. // The number of sleep duration(us) should not lead to overflow. Thrs: 100s
  655. // Compute the sleep duration in us to low power clock cycles, with calibration result applied
  656. // clock measurement is conducted
  657. uint64_t cycles = ((uint64_t)(hus) << btdm_lpcycle_us_frac) / btdm_lpcycle_us;
  658. cycles >>= 1;
  659. return (uint32_t)cycles;
  660. }
  661. static bool IRAM_ATTR btdm_sleep_check_duration(int32_t *half_slot_cnt)
  662. {
  663. if (*half_slot_cnt < BTDM_MIN_SLEEP_DURATION) {
  664. return false;
  665. }
  666. /* wake up in advance considering the delay in enabling PHY/RF */
  667. *half_slot_cnt -= BTDM_MODEM_WAKE_UP_DELAY;
  668. return true;
  669. }
  670. static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
  671. {
  672. #ifdef CONFIG_PM_ENABLE
  673. // start a timer to wake up and acquire the pm_lock before modem_sleep awakes
  674. uint32_t us_to_sleep = btdm_lpcycles_2_us(lpcycles);
  675. #define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
  676. assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
  677. // allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
  678. // and set the timer in advance
  679. uint32_t uncertainty = (us_to_sleep >> 11);
  680. if (uncertainty < BTDM_MIN_TIMER_UNCERTAINTY_US) {
  681. uncertainty = BTDM_MIN_TIMER_UNCERTAINTY_US;
  682. }
  683. if (esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - uncertainty) != ESP_OK) {
  684. ESP_LOGW(BTDM_LOG_TAG, "timer start failed");
  685. }
  686. #endif
  687. }
  688. static void btdm_sleep_enter_phase2_wrapper(void)
  689. {
  690. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  691. #if BTDM_MODEM_SLEEP_IN_EFFECT
  692. //esp_phy_disable();
  693. #endif /* BTDM_MODEM_SLEEP_IN_EFFECT */
  694. #ifdef CONFIG_PM_ENABLE
  695. esp_pm_lock_release(s_pm_lock);
  696. semphr_give_wrapper(s_pm_lock_sem);
  697. #endif
  698. }
  699. }
  700. static void IRAM_ATTR btdm_sleep_exit_phase1_wrapper(void)
  701. {
  702. #ifdef CONFIG_PM_ENABLE
  703. if (semphr_take_from_isr_wrapper(s_pm_lock_sem, NULL) == pdTRUE) {
  704. esp_pm_lock_acquire(s_pm_lock);
  705. }
  706. #endif
  707. }
  708. static void btdm_sleep_exit_phase3_wrapper(void)
  709. {
  710. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  711. #if BTDM_MODEM_SLEEP_IN_EFFECT
  712. //esp_phy_enable();
  713. #endif /* BTDM_MODEM_SLEEP_IN_EFFECT */
  714. btdm_check_and_init_bb();
  715. #ifdef CONFIG_PM_ENABLE
  716. esp_timer_stop(s_btdm_slp_tmr);
  717. #endif
  718. }
  719. }
  720. #ifdef CONFIG_PM_ENABLE
  721. static void IRAM_ATTR btdm_slp_tmr_callback(void *arg)
  722. {
  723. if (semphr_take_wrapper(s_pm_lock_sem, 0) == pdTRUE) {
  724. esp_pm_lock_acquire(s_pm_lock);
  725. }
  726. }
  727. #endif
  728. static void coex_schm_status_bit_set_wrapper(uint32_t type, uint32_t status)
  729. {
  730. #if CONFIG_SW_COEXIST_ENABLE
  731. coex_schm_status_bit_set(type, status);
  732. #endif
  733. }
  734. static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
  735. {
  736. #if CONFIG_SW_COEXIST_ENABLE
  737. coex_schm_status_bit_clear(type, status);
  738. #endif
  739. }
  740. bool esp_vhci_host_check_send_available(void)
  741. {
  742. return API_vhci_host_check_send_available();
  743. }
  744. void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
  745. {
  746. bool do_wakeup_request = false;
  747. if (!btdm_power_state_active()) {
  748. #if CONFIG_PM_ENABLE
  749. if (semphr_take_wrapper(s_pm_lock_sem, 0)) {
  750. esp_pm_lock_acquire(s_pm_lock);
  751. }
  752. esp_timer_stop(s_btdm_slp_tmr);
  753. #endif
  754. do_wakeup_request = true;
  755. btdm_wakeup_request(true);
  756. }
  757. API_vhci_host_send_packet(data, len);
  758. if (do_wakeup_request) {
  759. btdm_wakeup_request_end();
  760. }
  761. }
  762. esp_err_t esp_vhci_host_register_callback(const esp_vhci_host_callback_t *callback)
  763. {
  764. return API_vhci_host_register_callback((const vhci_host_callback_t *)callback) == 0 ? ESP_OK : ESP_FAIL;
  765. }
  766. static void btdm_controller_mem_init(void)
  767. {
  768. memset(&_bss_start_btdm, 0, &_bss_end_btdm - &_bss_start_btdm);
  769. memcpy(&_data_start_btdm, (void *)_data_start_btdm_rom, &_data_end_btdm - &_data_start_btdm);
  770. // memset(&_bt_tmp_bss_start, 0, &_bt_tmp_bss_end - &_bt_tmp_bss_start);
  771. }
  772. esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
  773. {
  774. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  775. return ESP_OK;
  776. }
  777. esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
  778. {
  779. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  780. return ESP_OK;
  781. }
  782. esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
  783. {
  784. esp_err_t err;
  785. btdm_controller_mem_init();
  786. osi_funcs_p = (struct osi_funcs_t *)malloc_internal_wrapper(sizeof(struct osi_funcs_t));
  787. if (osi_funcs_p == NULL) {
  788. return ESP_ERR_NO_MEM;
  789. }
  790. memcpy(osi_funcs_p, &osi_funcs_ro, sizeof(struct osi_funcs_t));
  791. if (btdm_osi_funcs_register(osi_funcs_p) != 0) {
  792. return ESP_ERR_INVALID_ARG;
  793. }
  794. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
  795. return ESP_ERR_INVALID_STATE;
  796. }
  797. if (cfg == NULL) {
  798. return ESP_ERR_INVALID_ARG;
  799. }
  800. if (cfg->controller_task_prio != ESP_TASK_BT_CONTROLLER_PRIO
  801. || cfg->controller_task_stack_size < ESP_TASK_BT_CONTROLLER_STACK) {
  802. ESP_LOGE(BTDM_LOG_TAG, "Invalid controller task prioriy or stack size");
  803. return ESP_ERR_INVALID_ARG;
  804. }
  805. //overwrite some parameters
  806. cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;
  807. if (cfg->bluetooth_mode != ESP_BT_MODE_BLE) {
  808. ESP_LOGE(BTDM_LOG_TAG, "%s controller only support BLE only mode", __func__);
  809. return ESP_ERR_NOT_SUPPORTED;
  810. }
  811. if (cfg->bluetooth_mode & ESP_BT_MODE_BLE) {
  812. if ((cfg->ble_max_act <= 0) || (cfg->ble_max_act > BT_CTRL_BLE_MAX_ACT_LIMIT)) {
  813. ESP_LOGE(BTDM_LOG_TAG, "Invalid value of ble_max_act");
  814. return ESP_ERR_INVALID_ARG;
  815. }
  816. }
  817. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  818. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_NONE) {
  819. ESP_LOGE(BTDM_LOG_TAG, "SLEEP_MODE_1 enabled but sleep clock not configured");
  820. return ESP_ERR_INVALID_ARG;
  821. }
  822. }
  823. ESP_LOGI(BTDM_LOG_TAG, "BT controller compile version [%s]", btdm_controller_get_compile_version());
  824. #if CONFIG_SPIRAM_USE_MALLOC
  825. btdm_queue_table_mux = xSemaphoreCreateMutex();
  826. if (btdm_queue_table_mux == NULL) {
  827. return ESP_ERR_NO_MEM;
  828. }
  829. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  830. #endif
  831. if (cfg->sleep_mode == ESP_BT_SLEEP_MODE_1) {
  832. #ifdef CONFIG_PM_ENABLE
  833. if ((err = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btLS", &s_light_sleep_pm_lock)) != ESP_OK) {
  834. goto error;
  835. }
  836. if ((err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock)) != ESP_OK) {
  837. goto error;
  838. }
  839. esp_timer_create_args_t create_args = {
  840. .callback = btdm_slp_tmr_callback,
  841. .arg = NULL,
  842. .name = "btSlp"
  843. };
  844. if ((err = esp_timer_create(&create_args, &s_btdm_slp_tmr)) != ESP_OK) {
  845. goto error;
  846. }
  847. s_pm_lock_sem = semphr_create_wrapper(1, 0);
  848. if (s_pm_lock_sem == NULL) {
  849. err = ESP_ERR_NO_MEM;
  850. goto error;
  851. }
  852. #endif
  853. do {// todo: rewrite this block of code for chip
  854. #if CONFIG_IDF_ENV_FPGA
  855. // overwrite the sleep clock for FPGA
  856. cfg->sleep_clock = ESP_BT_SLEEP_CLOCK_FPGA_32K;
  857. ESP_LOGW(BTDM_LOG_TAG, "%s sleep clock overwrite on FPGA", __func__);
  858. #endif
  859. bool select_src_ret = false;
  860. bool set_div_ret = false;
  861. if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_MAIN_XTAL) {
  862. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL);
  863. set_div_ret = btdm_lpclk_set_div(rtc_clk_xtal_freq_get() * 2);
  864. assert(select_src_ret && set_div_ret);
  865. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  866. btdm_lpcycle_us = 2 << (btdm_lpcycle_us_frac);
  867. } else if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_EXT_32K_XTAL) {
  868. select_src_ret = btdm_lpclk_select_src(BTDM_LPCLK_SEL_XTAL32K);
  869. set_div_ret = btdm_lpclk_set_div(0);
  870. assert(select_src_ret && set_div_ret);
  871. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  872. btdm_lpcycle_us = esp_clk_slowclk_cal_get();
  873. assert(btdm_lpcycle_us != 0);
  874. } else if (cfg->sleep_clock == ESP_BT_SLEEP_CLOCK_FPGA_32K) {
  875. // on FPGA, the low power clock is hard-wired to a 32kHz(clock cycle 31.25us) oscillator
  876. btdm_lpcycle_us_frac = RTC_CLK_CAL_FRACT;
  877. btdm_lpcycle_us = 125 << (btdm_lpcycle_us_frac - 2);
  878. }
  879. } while (0);
  880. }
  881. periph_module_enable(PERIPH_BT_MODULE);
  882. // must do fpga_init and phy init before controller init
  883. esp_phy_enable();
  884. if (btdm_controller_init(cfg) != 0) {
  885. err = ESP_ERR_NO_MEM;
  886. goto error;
  887. }
  888. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  889. return ESP_OK;
  890. error:
  891. #ifdef CONFIG_PM_ENABLE
  892. if (s_light_sleep_pm_lock != NULL) {
  893. esp_pm_lock_delete(s_light_sleep_pm_lock);
  894. s_light_sleep_pm_lock = NULL;
  895. }
  896. if (s_pm_lock != NULL) {
  897. esp_pm_lock_delete(s_pm_lock);
  898. s_pm_lock = NULL;
  899. }
  900. if (s_btdm_slp_tmr != NULL) {
  901. esp_timer_delete(s_btdm_slp_tmr);
  902. s_btdm_slp_tmr = NULL;
  903. }
  904. if (s_pm_lock_sem) {
  905. semphr_delete_wrapper(s_pm_lock_sem);
  906. s_pm_lock_sem = NULL;
  907. }
  908. #endif
  909. return err;
  910. }
  911. esp_err_t esp_bt_controller_deinit(void)
  912. {
  913. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  914. return ESP_ERR_INVALID_STATE;
  915. }
  916. btdm_controller_deinit();
  917. periph_module_disable(PERIPH_BT_MODULE);
  918. esp_phy_disable();
  919. #ifdef CONFIG_PM_ENABLE
  920. esp_pm_lock_delete(s_light_sleep_pm_lock);
  921. s_light_sleep_pm_lock = NULL;
  922. esp_pm_lock_delete(s_pm_lock);
  923. s_pm_lock = NULL;
  924. esp_timer_stop(s_btdm_slp_tmr);
  925. esp_timer_delete(s_btdm_slp_tmr);
  926. s_btdm_slp_tmr = NULL;
  927. semphr_delete_wrapper(s_pm_lock_sem);
  928. s_pm_lock_sem = NULL;
  929. #endif
  930. #if CONFIG_SPIRAM_USE_MALLOC
  931. vSemaphoreDelete(btdm_queue_table_mux);
  932. btdm_queue_table_mux = NULL;
  933. memset(btdm_queue_table, 0, sizeof(btdm_queue_item_t) * BTDM_MAX_QUEUE_NUM);
  934. #endif
  935. free(osi_funcs_p);
  936. osi_funcs_p = NULL;
  937. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
  938. btdm_lpcycle_us = 0;
  939. return ESP_OK;
  940. }
  941. esp_err_t esp_bt_controller_enable(esp_bt_mode_t mode)
  942. {
  943. int ret;
  944. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_INITED) {
  945. return ESP_ERR_INVALID_STATE;
  946. }
  947. //As the history reason, mode should be equal to the mode which set in esp_bt_controller_init()
  948. if (mode != btdm_controller_get_mode()) {
  949. ESP_LOGE(BTDM_LOG_TAG, "invalid mode %d, controller support mode is %d", mode, btdm_controller_get_mode());
  950. return ESP_ERR_INVALID_ARG;
  951. }
  952. #ifdef CONFIG_PM_ENABLE
  953. esp_pm_lock_acquire(s_light_sleep_pm_lock);
  954. esp_pm_lock_acquire(s_pm_lock);
  955. #endif
  956. // esp_phy_enable();
  957. #if CONFIG_SW_COEXIST_ENABLE
  958. coex_enable();
  959. #endif
  960. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  961. btdm_controller_enable_sleep(true);
  962. }
  963. // inititalize bluetooth baseband
  964. btdm_check_and_init_bb();
  965. ret = btdm_controller_enable(mode);
  966. if (ret) {
  967. // esp_phy_disable();
  968. #ifdef CONFIG_PM_ENABLE
  969. esp_pm_lock_release(s_light_sleep_pm_lock);
  970. esp_pm_lock_release(s_pm_lock);
  971. #endif
  972. return ESP_ERR_INVALID_STATE;
  973. }
  974. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_ENABLED;
  975. return ESP_OK;
  976. }
  977. esp_err_t esp_bt_controller_disable(void)
  978. {
  979. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  980. return ESP_ERR_INVALID_STATE;
  981. }
  982. // disable modem sleep and wake up from sleep mode
  983. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  984. btdm_controller_enable_sleep(false);
  985. if (!btdm_power_state_active()) {
  986. btdm_wakeup_request(true);
  987. }
  988. while (!btdm_power_state_active()) {
  989. esp_rom_delay_us(1000);
  990. }
  991. }
  992. btdm_controller_disable();
  993. #if CONFIG_SW_COEXIST_ENABLE
  994. coex_disable();
  995. #endif
  996. // esp_phy_disable();
  997. btdm_controller_status = ESP_BT_CONTROLLER_STATUS_INITED;
  998. #ifdef CONFIG_PM_ENABLE
  999. esp_pm_lock_release(s_light_sleep_pm_lock);
  1000. esp_pm_lock_release(s_pm_lock);
  1001. #endif
  1002. return ESP_OK;
  1003. }
  1004. esp_bt_controller_status_t esp_bt_controller_get_status(void)
  1005. {
  1006. return btdm_controller_status;
  1007. }
  1008. /* extra functions */
  1009. esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
  1010. {
  1011. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
  1012. return ESP_OK;
  1013. }
  1014. esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
  1015. {
  1016. ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return 0", __func__);
  1017. return 0;
  1018. }
  1019. esp_err_t esp_bt_sleep_enable (void)
  1020. {
  1021. esp_err_t status;
  1022. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1023. return ESP_ERR_INVALID_STATE;
  1024. }
  1025. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1026. btdm_controller_enable_sleep (true);
  1027. status = ESP_OK;
  1028. } else {
  1029. status = ESP_ERR_NOT_SUPPORTED;
  1030. }
  1031. return status;
  1032. }
  1033. esp_err_t esp_bt_sleep_disable (void)
  1034. {
  1035. esp_err_t status;
  1036. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
  1037. return ESP_ERR_INVALID_STATE;
  1038. }
  1039. if (btdm_controller_get_sleep_mode() == ESP_BT_SLEEP_MODE_1) {
  1040. btdm_controller_enable_sleep (false);
  1041. status = ESP_OK;
  1042. } else {
  1043. status = ESP_ERR_NOT_SUPPORTED;
  1044. }
  1045. return status;
  1046. }
  1047. bool esp_bt_controller_is_sleeping(void)
  1048. {
  1049. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1050. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1051. return false;
  1052. }
  1053. return !btdm_power_state_active();
  1054. }
  1055. void esp_bt_controller_wakeup_request(void)
  1056. {
  1057. if (btdm_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED ||
  1058. btdm_controller_get_sleep_mode() != ESP_BT_SLEEP_MODE_1) {
  1059. return;
  1060. }
  1061. btdm_wakeup_request(false);
  1062. }
  1063. int IRAM_ATTR esp_bt_h4tl_eif_io_event_notify(int event)
  1064. {
  1065. return btdm_hci_tl_io_event_post(event);
  1066. }
  1067. uint16_t esp_bt_get_tx_buf_num(void)
  1068. {
  1069. return l2c_ble_link_get_tx_buf_num();
  1070. }
  1071. static void coex_wifi_sleep_set_hook(bool sleep)
  1072. {
  1073. }
  1074. #endif /* CONFIG_BT_ENABLED */