test_i2c.c 27 KB

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  1. /**
  2. * test environment UT_T2_I2C:
  3. * please prepare two ESP32-WROVER-KIT board.
  4. * Then connect GPIO18 and GPIO18, GPIO19 and GPIO19 between these two boards.
  5. */
  6. #include <stdio.h>
  7. #include <string.h>
  8. #include "unity.h"
  9. #include "test_utils.h"
  10. #include "unity_config.h"
  11. #include "driver/i2c.h"
  12. #include "esp_attr.h"
  13. #include "esp_log.h"
  14. #include "soc/gpio_periph.h"
  15. #include "soc/i2c_periph.h"
  16. #include "esp_system.h"
  17. #include "soc/uart_struct.h"
  18. #include "driver/periph_ctrl.h"
  19. #include "esp_rom_gpio.h"
  20. #include "hal/gpio_hal.h"
  21. #define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
  22. #define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
  23. #define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
  24. #if CONFIG_IDF_TARGET_ESP32C3
  25. #define I2C_SLAVE_SCL_IO 5 /*!<gpio number for i2c slave clock */
  26. #define I2C_SLAVE_SDA_IO 6 /*!<gpio number for i2c slave data */
  27. #else
  28. #define I2C_SLAVE_SCL_IO 19 /*!<gpio number for i2c slave clock */
  29. #define I2C_SLAVE_SDA_IO 18 /*!<gpio number for i2c slave data */
  30. #endif
  31. #define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
  32. #define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
  33. #define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
  34. #if CONFIG_IDF_TARGET_ESP32C3
  35. #define I2C_MASTER_SCL_IO 5 /*!<gpio number for i2c master clock */
  36. #define I2C_MASTER_SDA_IO 6 /*!<gpio number for i2c master data */
  37. #else
  38. #define I2C_MASTER_SCL_IO 19 /*!< gpio number for I2C master clock */
  39. #define I2C_MASTER_SDA_IO 18 /*!< gpio number for I2C master data */
  40. #endif
  41. #define I2C_MASTER_NUM I2C_NUM_0 /*!< I2C port number for master dev */
  42. #define I2C_MASTER_TX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  43. #define I2C_MASTER_RX_BUF_DISABLE 0 /*!< I2C master do not need buffer */
  44. #define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
  45. #define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
  46. #define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
  47. #define READ_BIT I2C_MASTER_READ /*!< I2C master read */
  48. #define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
  49. #define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
  50. #define ACK_VAL 0x0 /*!< I2C ack value */
  51. #define NACK_VAL 0x1 /*!< I2C nack value */
  52. #define PULSE_IO 19
  53. #define PCNT_INPUT_IO 4
  54. #define PCNT_CTRL_FLOATING_IO 5
  55. #define HIGHEST_LIMIT 10000
  56. #define LOWEST_LIMIT -10000
  57. static DRAM_ATTR i2c_dev_t *const I2C[SOC_I2C_NUM] = { &I2C0,
  58. #if SOC_I2C_NUM > 1
  59. &I2C1,
  60. #endif
  61. };
  62. static esp_err_t i2c_master_write_slave(i2c_port_t i2c_num, uint8_t *data_wr, size_t size)
  63. {
  64. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  65. i2c_master_start(cmd);
  66. TEST_ESP_OK(i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | WRITE_BIT, ACK_CHECK_EN));
  67. TEST_ESP_OK(i2c_master_write(cmd, data_wr, size, ACK_CHECK_EN));
  68. TEST_ESP_OK(i2c_master_stop(cmd));
  69. esp_err_t ret = i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  70. i2c_cmd_link_delete(cmd);
  71. return ret;
  72. }
  73. static i2c_config_t i2c_master_init(void)
  74. {
  75. i2c_config_t conf_master = {
  76. .mode = I2C_MODE_MASTER,
  77. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  78. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  79. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  80. .sda_io_num = I2C_MASTER_SDA_IO,
  81. .scl_io_num = I2C_MASTER_SCL_IO,
  82. .clk_flags = 0,
  83. };
  84. return conf_master;
  85. }
  86. static i2c_config_t i2c_slave_init(void)
  87. {
  88. i2c_config_t conf_slave = {
  89. .mode = I2C_MODE_SLAVE,
  90. .sda_io_num = I2C_SLAVE_SDA_IO,
  91. .scl_io_num = I2C_SLAVE_SCL_IO,
  92. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  93. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  94. .slave.addr_10bit_en = 0,
  95. .slave.slave_addr = ESP_SLAVE_ADDR,
  96. };
  97. return conf_slave;
  98. }
  99. TEST_CASE("I2C i2c_set_pin() fails if sda and scl gpios are same", "[i2c]")
  100. {
  101. TEST_ASSERT_EQUAL(ESP_ERR_INVALID_ARG, i2c_set_pin(0, 0, 0, true, true , I2C_MODE_SLAVE));
  102. }
  103. TEST_CASE("I2C config test", "[i2c]")
  104. {
  105. // master test
  106. i2c_config_t conf_master = i2c_master_init();
  107. gpio_pullup_t sda_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  108. gpio_pullup_t scl_pull_up_en[2] = {GPIO_PULLUP_DISABLE, GPIO_PULLUP_ENABLE};
  109. for (int i = 0; i < 2; i++) {
  110. for (int j = 0; j < 2; j++) {
  111. conf_master.sda_pullup_en = sda_pull_up_en[i];
  112. conf_master.scl_pullup_en = scl_pull_up_en[j];
  113. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  114. I2C_MASTER_RX_BUF_DISABLE,
  115. I2C_MASTER_TX_BUF_DISABLE, 0));
  116. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  117. TEST_ASSERT_EQUAL_INT32(I2C[I2C_MASTER_NUM]->ctr.ms_mode, 1);
  118. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  119. }
  120. }
  121. // slave test
  122. i2c_config_t conf_slave = i2c_slave_init();
  123. for (int i = 0; i < 2; i++) {
  124. for (int j = 0; j < 2; j++) {
  125. conf_slave.sda_pullup_en = sda_pull_up_en[i];
  126. conf_slave.scl_pullup_en = scl_pull_up_en[j];
  127. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  128. I2C_SLAVE_RX_BUF_LEN,
  129. I2C_SLAVE_TX_BUF_LEN, 0));
  130. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  131. TEST_ASSERT_EQUAL_INT32(I2C[I2C_SLAVE_NUM] -> ctr.ms_mode, 0);
  132. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  133. }
  134. }
  135. }
  136. TEST_CASE("I2C set and get period test", "[i2c]")
  137. {
  138. int high_period, low_period;
  139. i2c_config_t conf_master = i2c_master_init();
  140. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  141. I2C_MASTER_RX_BUF_DISABLE,
  142. I2C_MASTER_TX_BUF_DISABLE, 0));
  143. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  144. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V, I2C_SCL_HIGH_PERIOD_V));
  145. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  146. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, high_period);
  147. TEST_ASSERT_EQUAL_INT(I2C_SCL_HIGH_PERIOD_V, low_period);
  148. TEST_ASSERT_NOT_NULL((void *)i2c_set_period(I2C_MASTER_NUM, I2C_SCL_HIGH_PERIOD_V + 1, I2C_SCL_HIGH_PERIOD_V + 1));
  149. TEST_ESP_OK(i2c_set_period(I2C_MASTER_NUM, 300, 400));
  150. TEST_ESP_OK(i2c_get_period(I2C_MASTER_NUM, &high_period, &low_period));
  151. TEST_ASSERT_EQUAL_INT(300, high_period);
  152. TEST_ASSERT_EQUAL_INT(400, low_period);
  153. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  154. }
  155. TEST_CASE("I2C config FIFO test", "[i2c]")
  156. {
  157. i2c_config_t conf_slave = i2c_slave_init();
  158. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  159. I2C_SLAVE_RX_BUF_LEN,
  160. I2C_SLAVE_TX_BUF_LEN, 0));
  161. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  162. TEST_ASSERT_BIT_LOW(1, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  163. TEST_ESP_OK(i2c_reset_tx_fifo(I2C_SLAVE_NUM));
  164. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.tx_fifo_rst);
  165. TEST_ESP_OK(i2c_reset_rx_fifo(I2C_SLAVE_NUM));
  166. TEST_ASSERT_BIT_LOW(0, I2C[I2C_SLAVE_NUM]->fifo_conf.rx_fifo_rst);
  167. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  168. }
  169. TEST_CASE("I2C timing test", "[i2c]")
  170. {
  171. int test_setup_time, test_data_time, test_stop_time, test_hold_time;
  172. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  173. i2c_config_t conf_master = i2c_master_init();
  174. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  175. I2C_MASTER_RX_BUF_DISABLE,
  176. I2C_MASTER_TX_BUF_DISABLE, 0));
  177. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  178. TEST_ESP_OK(i2c_set_start_timing(I2C_MASTER_NUM, 50, 60));
  179. TEST_ESP_OK(i2c_set_data_timing(I2C_MASTER_NUM, 80, 60));
  180. TEST_ESP_OK(i2c_set_stop_timing(I2C_MASTER_NUM, 100, 60));
  181. for (int i = 0; i < DATA_LENGTH; i++) {
  182. data_wr[i] = i;
  183. }
  184. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  185. TEST_ESP_OK(i2c_get_start_timing(I2C_MASTER_NUM, &test_setup_time, &test_hold_time));
  186. TEST_ESP_OK(i2c_get_data_timing(I2C_MASTER_NUM, &test_data_time, &test_hold_time));
  187. TEST_ESP_OK(i2c_get_stop_timing(I2C_MASTER_NUM, &test_stop_time, &test_hold_time));
  188. TEST_ASSERT_EQUAL_INT32(50, test_setup_time);
  189. TEST_ASSERT_EQUAL_INT32(80, test_data_time);
  190. TEST_ASSERT_EQUAL_INT32(100, test_stop_time);
  191. TEST_ASSERT_EQUAL_INT32(60, test_hold_time);
  192. free(data_wr);
  193. i2c_driver_delete(I2C_MASTER_NUM);
  194. }
  195. TEST_CASE("I2C data mode test", "[i2c]")
  196. {
  197. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  198. i2c_trans_mode_t test_tx_trans_mode, test_rx_trans_mode;
  199. i2c_config_t conf_master = i2c_master_init();
  200. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  201. I2C_MASTER_RX_BUF_DISABLE,
  202. I2C_MASTER_TX_BUF_DISABLE, 0));
  203. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  204. for (int i = 0; i < DATA_LENGTH; i++) {
  205. data_wr[i] = i;
  206. }
  207. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_LSB_FIRST, I2C_DATA_MODE_LSB_FIRST));
  208. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  209. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_tx_trans_mode);
  210. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_LSB_FIRST, test_rx_trans_mode);
  211. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  212. TEST_ESP_OK(i2c_set_data_mode(I2C_MASTER_NUM, I2C_DATA_MODE_MSB_FIRST, I2C_DATA_MODE_MSB_FIRST));
  213. TEST_ESP_OK(i2c_get_data_mode(I2C_MASTER_NUM, &test_tx_trans_mode, &test_rx_trans_mode));
  214. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_tx_trans_mode);
  215. TEST_ASSERT_EQUAL_INT(I2C_DATA_MODE_MSB_FIRST, test_rx_trans_mode);
  216. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  217. free(data_wr);
  218. i2c_driver_delete(I2C_MASTER_NUM);
  219. }
  220. TEST_CASE("I2C driver memory leaking check", "[i2c]")
  221. {
  222. esp_err_t ret;
  223. int size = esp_get_free_heap_size();
  224. for (uint32_t i = 0; i <= 1000; i++) {
  225. ret = i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  226. I2C_SLAVE_RX_BUF_LEN,
  227. I2C_SLAVE_TX_BUF_LEN, 0);
  228. TEST_ASSERT(ret == ESP_OK);
  229. vTaskDelay(10 / portTICK_RATE_MS);
  230. i2c_driver_delete(I2C_SLAVE_NUM);
  231. TEST_ASSERT(ret == ESP_OK);
  232. }
  233. TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
  234. }
  235. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  236. // print the reading buffer
  237. static void disp_buf(uint8_t *buf, int len)
  238. {
  239. int i;
  240. for (i = 0; i < len; i++) {
  241. printf("%02x ", buf[i]);
  242. if (( i + 1 ) % 16 == 0) {
  243. printf("\n");
  244. }
  245. }
  246. printf("\n");
  247. }
  248. static void i2c_master_write_test(void)
  249. {
  250. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  251. int i;
  252. i2c_config_t conf_master = i2c_master_init();
  253. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  254. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  255. I2C_MASTER_RX_BUF_DISABLE,
  256. I2C_MASTER_TX_BUF_DISABLE, 0));
  257. unity_wait_for_signal("i2c slave init finish");
  258. unity_send_signal("master write");
  259. for (i = 0; i < DATA_LENGTH / 2; i++) {
  260. data_wr[i] = i;
  261. }
  262. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, DATA_LENGTH / 2);
  263. disp_buf(data_wr, i + 1);
  264. free(data_wr);
  265. unity_wait_for_signal("ready to delete");
  266. TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
  267. }
  268. static void i2c_slave_read_test(void)
  269. {
  270. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  271. int size_rd = 0;
  272. int len = 0;
  273. i2c_config_t conf_slave = i2c_slave_init();
  274. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  275. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  276. I2C_SLAVE_RX_BUF_LEN,
  277. I2C_SLAVE_TX_BUF_LEN, 0));
  278. unity_send_signal("i2c slave init finish");
  279. unity_wait_for_signal("master write");
  280. while (1) {
  281. len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
  282. if (len == 0) {
  283. break;
  284. }
  285. size_rd += len;
  286. }
  287. disp_buf(data_rd, size_rd);
  288. for (int i = 0; i < size_rd; i++) {
  289. TEST_ASSERT(data_rd[i] == i);
  290. }
  291. free(data_rd);
  292. unity_send_signal("ready to delete");
  293. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  294. }
  295. TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
  296. static void master_read_slave_test(void)
  297. {
  298. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  299. memset(data_rd, 0, DATA_LENGTH);
  300. i2c_config_t conf_master = i2c_master_init();
  301. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  302. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  303. I2C_MASTER_RX_BUF_DISABLE,
  304. I2C_MASTER_TX_BUF_DISABLE, 0));
  305. unity_wait_for_signal("i2c slave init finish");
  306. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  307. i2c_master_start(cmd);
  308. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  309. unity_send_signal("slave write");
  310. unity_wait_for_signal("master read");
  311. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH-1, ACK_VAL);
  312. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH-1, NACK_VAL);
  313. i2c_master_stop(cmd);
  314. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  315. i2c_cmd_link_delete(cmd);
  316. vTaskDelay(100 / portTICK_RATE_MS);
  317. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  318. printf("%d\n", data_rd[i]);
  319. TEST_ASSERT(data_rd[i]==i);
  320. }
  321. free(data_rd);
  322. unity_send_signal("ready to delete");
  323. i2c_driver_delete(I2C_MASTER_NUM);
  324. }
  325. static void slave_write_buffer_test(void)
  326. {
  327. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  328. int size_rd;
  329. i2c_config_t conf_slave = i2c_slave_init();
  330. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  331. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  332. I2C_SLAVE_RX_BUF_LEN,
  333. I2C_SLAVE_TX_BUF_LEN, 0));
  334. unity_send_signal("i2c slave init finish");
  335. unity_wait_for_signal("slave write");
  336. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  337. data_wr[i] = i;
  338. }
  339. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  340. disp_buf(data_wr, size_rd);
  341. unity_send_signal("master read");
  342. unity_wait_for_signal("ready to delete");
  343. free(data_wr);
  344. i2c_driver_delete(I2C_SLAVE_NUM);
  345. }
  346. TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
  347. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32)
  348. static void i2c_master_write_read_test(void)
  349. {
  350. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  351. memset(data_rd, 0, DATA_LENGTH);
  352. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  353. i2c_config_t conf_master = i2c_master_init();
  354. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  355. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  356. I2C_MASTER_RX_BUF_DISABLE,
  357. I2C_MASTER_TX_BUF_DISABLE, 0));
  358. unity_wait_for_signal("i2c slave init finish");
  359. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  360. i2c_master_start(cmd);
  361. i2c_master_write_byte(cmd, ( ESP_SLAVE_ADDR << 1 ) | READ_BIT, ACK_CHECK_EN);
  362. unity_send_signal("slave write");
  363. unity_wait_for_signal("master read and write");
  364. i2c_master_read(cmd, data_rd, RW_TEST_LENGTH, ACK_VAL);
  365. i2c_master_read_byte(cmd, data_rd + RW_TEST_LENGTH, NACK_VAL);
  366. i2c_master_stop(cmd);
  367. i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, 5000 / portTICK_RATE_MS);
  368. i2c_cmd_link_delete(cmd);
  369. vTaskDelay(100 / portTICK_RATE_MS);
  370. disp_buf(data_rd, RW_TEST_LENGTH);
  371. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  372. TEST_ASSERT(data_rd[i] == i/2);
  373. }
  374. for (int i = 0; i < DATA_LENGTH; i++) {
  375. data_wr[i] = i % 3;
  376. }
  377. vTaskDelay(100 / portTICK_RATE_MS);
  378. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  379. free(data_wr);
  380. free(data_rd);
  381. unity_send_signal("slave read");
  382. unity_wait_for_signal("ready to delete");
  383. i2c_driver_delete(I2C_MASTER_NUM);
  384. }
  385. static void i2c_slave_read_write_test(void)
  386. {
  387. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
  388. memset(data_rd, 0, DATA_LENGTH);
  389. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  390. int size_rd;
  391. i2c_config_t conf_slave = i2c_slave_init();
  392. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  393. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  394. I2C_SLAVE_RX_BUF_LEN,
  395. I2C_SLAVE_TX_BUF_LEN, 0));
  396. unity_send_signal("i2c slave init finish");
  397. unity_wait_for_signal("slave write");
  398. for (int i = 0; i < DATA_LENGTH / 2; i++) {
  399. data_wr[i] = i/2;
  400. }
  401. size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
  402. disp_buf(data_wr, size_rd);
  403. unity_send_signal("master read and write");
  404. unity_wait_for_signal("slave read");
  405. size_rd = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd, RW_TEST_LENGTH, 1000 / portTICK_RATE_MS);
  406. printf("slave read data is:\n");
  407. disp_buf(data_rd, size_rd);
  408. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  409. TEST_ASSERT(data_rd[i] == i % 3);
  410. }
  411. free(data_wr);
  412. free(data_rd);
  413. unity_send_signal("ready to delete");
  414. i2c_driver_delete(I2C_SLAVE_NUM);
  415. }
  416. TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
  417. static void i2c_master_repeat_write(void)
  418. {
  419. uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
  420. int times = 3;
  421. i2c_config_t conf_master = i2c_master_init();
  422. TEST_ESP_OK(i2c_param_config(I2C_MASTER_NUM, &conf_master));
  423. TEST_ESP_OK(i2c_driver_install(I2C_MASTER_NUM, I2C_MODE_MASTER,
  424. I2C_MASTER_RX_BUF_DISABLE,
  425. I2C_MASTER_TX_BUF_DISABLE, 0));
  426. unity_wait_for_signal("i2c slave init finish");
  427. for (int j = 0; j < times; j++) {
  428. for (int i = 0; i < DATA_LENGTH; i++) {
  429. data_wr[i] = j + i;
  430. }
  431. i2c_master_write_slave(I2C_MASTER_NUM, data_wr, RW_TEST_LENGTH);
  432. disp_buf(data_wr, RW_TEST_LENGTH);
  433. }
  434. free(data_wr);
  435. unity_send_signal("master write");
  436. unity_wait_for_signal("ready to delete");
  437. i2c_driver_delete(I2C_MASTER_NUM);
  438. }
  439. static void i2c_slave_repeat_read(void)
  440. {
  441. int size_rd = 0;
  442. int times = 3;
  443. uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH * 3);
  444. i2c_config_t conf_slave = i2c_slave_init();
  445. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  446. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  447. I2C_SLAVE_RX_BUF_LEN,
  448. I2C_SLAVE_TX_BUF_LEN, 0));
  449. unity_send_signal("i2c slave init finish");
  450. unity_wait_for_signal("master write");
  451. while (1) {
  452. int len = i2c_slave_read_buffer( I2C_SLAVE_NUM, data_rd + size_rd, RW_TEST_LENGTH * 3, 10000 / portTICK_RATE_MS);
  453. if (len == 0) {
  454. break;
  455. }
  456. size_rd += len;
  457. }
  458. disp_buf(data_rd, size_rd);
  459. for (int j = 0; j < times; j++) {
  460. for (int i = 0; i < RW_TEST_LENGTH; i++) {
  461. printf("data: %d, %d\n", data_rd[j * RW_TEST_LENGTH + i], (i % 129 + j));
  462. TEST_ASSERT(data_rd[j * RW_TEST_LENGTH + i] == (i % 129 + j));
  463. }
  464. }
  465. free(data_rd);
  466. unity_send_signal("ready to delete");
  467. i2c_driver_delete(I2C_SLAVE_NUM);
  468. }
  469. TEST_CASE_MULTIPLE_DEVICES("I2C repeat write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_repeat_write, i2c_slave_repeat_read);
  470. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  471. #endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3)
  472. static volatile bool exit_flag;
  473. static bool test_read_func;
  474. static void test_task(void *pvParameters)
  475. {
  476. xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
  477. uint8_t *data = (uint8_t *) malloc(DATA_LENGTH);
  478. i2c_config_t conf_slave = i2c_slave_init();
  479. TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
  480. I2C_SLAVE_RX_BUF_LEN,
  481. I2C_SLAVE_TX_BUF_LEN, 0));
  482. TEST_ESP_OK(i2c_param_config( I2C_SLAVE_NUM, &conf_slave));
  483. while (exit_flag == false) {
  484. if (test_read_func) {
  485. i2c_slave_read_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  486. } else {
  487. i2c_slave_write_buffer(I2C_SLAVE_NUM, data, DATA_LENGTH, 0);
  488. }
  489. vTaskDelay(10/portTICK_RATE_MS);
  490. }
  491. free(data);
  492. xSemaphoreGive(*sema);
  493. vTaskDelete(NULL);
  494. }
  495. TEST_CASE("test i2c_slave_read_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  496. {
  497. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  498. exit_flag = false;
  499. test_read_func = true;
  500. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  501. printf("Waiting for 5 sec\n");
  502. vTaskDelay(5000 / portTICK_PERIOD_MS);
  503. exit_flag = true;
  504. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  505. vSemaphoreDelete(exit_sema);
  506. } else {
  507. TEST_FAIL_MESSAGE("i2c_slave_read_buffer is blocked");
  508. }
  509. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  510. }
  511. TEST_CASE("test i2c_slave_write_buffer is not blocked when ticks_to_wait=0", "[i2c]")
  512. {
  513. xSemaphoreHandle exit_sema = xSemaphoreCreateBinary();
  514. exit_flag = false;
  515. test_read_func = false;
  516. xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
  517. printf("Waiting for 5 sec\n");
  518. vTaskDelay(5000 / portTICK_PERIOD_MS);
  519. exit_flag = true;
  520. if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
  521. vSemaphoreDelete(exit_sema);
  522. } else {
  523. TEST_FAIL_MESSAGE("i2c_slave_write_buffer is blocked");
  524. }
  525. TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
  526. }
  527. TEST_CASE("I2C general API test", "[i2c]")
  528. {
  529. #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
  530. #define I2C_TEST_TIME 0x3ff
  531. #else
  532. #define I2C_TEST_TIME 0x1f
  533. #endif
  534. const int i2c_num = 0;
  535. i2c_config_t conf_master = {
  536. .mode = I2C_MODE_MASTER,
  537. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  538. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  539. .master.clk_speed = I2C_MASTER_FREQ_HZ,
  540. .sda_io_num = I2C_MASTER_SDA_IO,
  541. .scl_io_num = I2C_MASTER_SCL_IO,
  542. };
  543. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  544. int time_get0, time_get1;
  545. for(int i = 10; i < I2C_TEST_TIME; i++) {
  546. //set period test
  547. TEST_ESP_OK(i2c_set_period(i2c_num, i, i));
  548. TEST_ESP_OK(i2c_get_period(i2c_num, &time_get0, &time_get1));
  549. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  550. //set start timing test
  551. TEST_ESP_OK(i2c_set_start_timing(i2c_num, i, i));
  552. TEST_ESP_OK(i2c_get_start_timing(i2c_num, &time_get0, &time_get1));
  553. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  554. //set stop timing test
  555. TEST_ESP_OK(i2c_set_stop_timing(i2c_num, i, i));
  556. TEST_ESP_OK(i2c_get_stop_timing(i2c_num, &time_get0, &time_get1));
  557. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  558. //set data timing test
  559. TEST_ESP_OK(i2c_set_data_timing(i2c_num, i, i));
  560. TEST_ESP_OK(i2c_get_data_timing(i2c_num, &time_get0, &time_get1));
  561. TEST_ASSERT((time_get0 == i) && (time_get1 == i));
  562. //set time out test
  563. TEST_ESP_OK(i2c_set_timeout(i2c_num, i));
  564. TEST_ESP_OK(i2c_get_timeout(i2c_num, &time_get0));
  565. TEST_ASSERT(time_get0 == i);
  566. }
  567. }
  568. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
  569. //Init uart baud rate detection
  570. static void uart_aut_baud_det_init(int rxd_io_num)
  571. {
  572. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
  573. gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
  574. esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT1_SCL_OUT_IDX, 0, 0);
  575. esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
  576. periph_module_enable(PERIPH_UART1_MODULE);
  577. UART1.int_ena.val = 0;
  578. UART1.int_clr.val = ~0;
  579. UART1.auto_baud.en = 1;
  580. }
  581. //Calculate I2C scl freq
  582. static void i2c_scl_freq_cal(void)
  583. {
  584. const int i2c_source_clk_freq = 80000000;
  585. const float i2c_cource_clk_period = 0.0125;
  586. int edg_cnt = UART1.rxd_cnt.edge_cnt;
  587. int pospulse_cnt = UART1.pospulse.min_cnt;
  588. int negpulse_cnt = UART1.negpulse.min_cnt;
  589. int high_period_cnt = UART1.highpulse.min_cnt;
  590. int low_period_cnt = UART1.lowpulse.min_cnt;
  591. if(edg_cnt != 542) {
  592. printf("\nedg_cnt != 542, test fail\n");
  593. return;
  594. }
  595. printf("\nDetected SCL frequency: %d Hz\n", i2c_source_clk_freq / ((pospulse_cnt + negpulse_cnt) / 2) );
  596. printf("\nSCL high period %.3f (us), SCL low_period %.3f (us)\n\n", (float)(i2c_cource_clk_period * high_period_cnt), (float)(i2c_cource_clk_period * low_period_cnt));
  597. UART1.auto_baud.en = 0;
  598. periph_module_disable(PERIPH_UART1_MODULE);
  599. }
  600. TEST_CASE("I2C SCL freq test (local test)", "[i2c][ignore]")
  601. {
  602. //Use the UART baud rate detection function to detect the I2C SCL frequency.
  603. const int i2c_num = 1;
  604. const int uart1_rxd_io = 5;
  605. i2c_config_t conf_master = {
  606. .mode = I2C_MODE_MASTER,
  607. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  608. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  609. .master.clk_speed = 400000,
  610. .sda_io_num = I2C_MASTER_SDA_IO,
  611. .scl_io_num = I2C_MASTER_SCL_IO,
  612. };
  613. uint8_t *data = (uint8_t *)malloc(30);
  614. TEST_ESP_OK(i2c_param_config( i2c_num, &conf_master));
  615. TEST_ESP_OK(i2c_driver_install(i2c_num, I2C_MODE_MASTER, 0, 0, 0));
  616. memset(data, 0, 0);
  617. uart_aut_baud_det_init(uart1_rxd_io);
  618. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  619. i2c_master_start(cmd);
  620. i2c_master_write(cmd, data, 30, ACK_CHECK_DIS);
  621. i2c_master_stop(cmd);
  622. i2c_master_cmd_begin(i2c_num, cmd, 5000 / portTICK_RATE_MS);
  623. i2c_cmd_link_delete(cmd);
  624. i2c_scl_freq_cal();
  625. free(data);
  626. TEST_ESP_OK(i2c_driver_delete(i2c_num));
  627. }
  628. #endif // TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)