test_efuse.c 35 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940
  1. #include <stdio.h>
  2. #include <ctype.h>
  3. #include <errno.h>
  4. #include <stdlib.h>
  5. #include <stdio.h>
  6. #include "unity.h"
  7. #include "esp_log.h"
  8. #include <string.h>
  9. #include "esp_efuse.h"
  10. #include "esp_efuse_table.h"
  11. #include "esp_efuse_utility.h"
  12. #include "esp_efuse_test_table.h"
  13. #include "bootloader_random.h"
  14. #include "freertos/FreeRTOS.h"
  15. #include "freertos/task.h"
  16. #include "freertos/semphr.h"
  17. #include "test_utils.h"
  18. #include "sdkconfig.h"
  19. #include "esp_rom_efuse.h"
  20. #include "bootloader_common.h"
  21. static const char* TAG = "efuse_test";
  22. static void test_read_blob(void)
  23. {
  24. esp_efuse_utility_update_virt_blocks();
  25. esp_efuse_utility_debug_dump_blocks();
  26. uint8_t mac[6];
  27. ESP_LOGI(TAG, "1. Read MAC address");
  28. memset(mac, 0, sizeof(mac));
  29. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &mac, sizeof(mac) * 8));
  30. TEST_ASSERT_EQUAL_INT(sizeof(mac) * 8, esp_efuse_get_field_size(ESP_EFUSE_MAC_FACTORY));
  31. ESP_LOGI(TAG, "MAC: %02x:%02x:%02x:%02x:%02x:%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  32. #ifdef CONFIG_IDF_TARGET_ESP32
  33. ESP_LOGI(TAG, "2. Check CRC by MAC");
  34. uint8_t crc;
  35. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY_CRC, &crc, 8));
  36. TEST_ASSERT_EQUAL_HEX8(crc, esp_rom_efuse_mac_address_crc8(mac, sizeof(mac)));
  37. #endif // CONFIG_IDF_TARGET_ESP32
  38. ESP_LOGI(TAG, "3. Test check args");
  39. uint32_t test_var;
  40. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, NULL, 1));
  41. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &test_var, 0));
  42. uint8_t half_byte;
  43. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &half_byte, 4));
  44. TEST_ASSERT_EQUAL_HEX8(mac[0]&0x0F, half_byte);
  45. uint8_t buff[7] = {0x59};
  46. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &buff, sizeof(buff) * 8));
  47. TEST_ASSERT_TRUE_MESSAGE(memcmp(mac, buff, sizeof(mac)) == 0, "Operation read blob is not success");
  48. TEST_ASSERT_EQUAL_HEX8(0, buff[6]);
  49. }
  50. TEST_CASE("efuse test read_field_blob", "[efuse]")
  51. {
  52. test_read_blob();
  53. }
  54. static void test_read_cnt(void)
  55. {
  56. esp_efuse_utility_update_virt_blocks();
  57. esp_efuse_utility_debug_dump_blocks();
  58. ESP_LOGI(TAG, "1. Test check args");
  59. size_t cnt;
  60. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_read_field_cnt(ESP_EFUSE_MAC_FACTORY, NULL));
  61. ESP_LOGI(TAG, "2. Read MAC address");
  62. uint8_t mac[6];
  63. memset(mac, 0, sizeof(mac));
  64. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &mac, 48));
  65. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_MAC_FACTORY, &cnt));
  66. size_t cnt_summ = 0;
  67. for (int i = 0; i < sizeof(mac); ++i) {
  68. cnt_summ += __builtin_popcount(mac[i]);
  69. }
  70. TEST_ASSERT_EQUAL_INT(cnt_summ, cnt);
  71. }
  72. TEST_CASE("efuse test read_field_cnt", "[efuse]")
  73. {
  74. test_read_cnt();
  75. }
  76. // If using efuse is real, then turn off writing tests.
  77. #ifdef CONFIG_EFUSE_VIRTUAL
  78. static void test_write_blob(void)
  79. {
  80. esp_efuse_coding_scheme_t scheme = esp_efuse_get_coding_scheme(EFUSE_BLK1);
  81. esp_efuse_utility_erase_virt_blocks();
  82. esp_efuse_utility_debug_dump_blocks();
  83. ESP_LOGI(TAG, "1. Test check args");
  84. uint16_t test1_len_8 = 0x5FAA;
  85. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_field_blob(ESP_EFUSE_MAC_FACTORY, &test1_len_8, 0));
  86. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, NULL, 8));
  87. TEST_ASSERT_EQUAL_HEX16(0x5FAA, test1_len_8);
  88. ESP_LOGI(TAG, "2. Test write operation");
  89. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, &test1_len_8, 7));
  90. TEST_ESP_ERR(ESP_ERR_EFUSE_REPEATED_PROG, esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, &test1_len_8, 9));
  91. uint16_t val_read1 = 0;
  92. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST1_LEN_8, &val_read1, 8));
  93. TEST_ASSERT_EQUAL_HEX16(test1_len_8&((1 << 7) - 1), val_read1);
  94. uint16_t test1_len_8_hi = test1_len_8 & ~((1 << 7) - 1);
  95. if (scheme == EFUSE_CODING_SCHEME_NONE) {
  96. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, &test1_len_8_hi, 8));
  97. } else {
  98. TEST_ESP_ERR(ESP_ERR_CODING, esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, &test1_len_8_hi, 8));
  99. }
  100. TEST_ESP_ERR(ESP_ERR_EFUSE_REPEATED_PROG, esp_efuse_write_field_blob(ESP_EFUSE_TEST1_LEN_8, &test1_len_8, 8));
  101. val_read1 = 0;
  102. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST1_LEN_8, &val_read1, 16));
  103. if (scheme == EFUSE_CODING_SCHEME_NONE) {
  104. TEST_ASSERT_EQUAL_HEX16(test1_len_8&0x00FF, val_read1);
  105. } else {
  106. TEST_ASSERT_EQUAL_HEX16(test1_len_8&0x007F, val_read1);
  107. }
  108. if (scheme != EFUSE_CODING_SCHEME_NONE) {
  109. esp_efuse_utility_erase_virt_blocks();
  110. ESP_LOGI(TAG, "erase virt blocks");
  111. }
  112. uint16_t test2_len_16 = 0xAA55;
  113. uint32_t val_32 = test2_len_16;
  114. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_TEST2_LEN_16, &val_32, 17));
  115. TEST_ESP_ERR(ESP_ERR_EFUSE_REPEATED_PROG, esp_efuse_write_field_blob(ESP_EFUSE_TEST2_LEN_16, &test2_len_16, 16));
  116. uint16_t test_16 = 0;
  117. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST2_LEN_16, &test_16, 16));
  118. TEST_ASSERT_EQUAL_HEX16(test2_len_16, test_16);
  119. ESP_LOGI(TAG, "3. Test field with one bit");
  120. uint8_t test5_len_1;
  121. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  122. TEST_ASSERT_EQUAL_HEX8(0, test5_len_1);
  123. test5_len_1 = 0;
  124. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  125. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  126. TEST_ASSERT_EQUAL_HEX8(0, test5_len_1);
  127. test5_len_1 = 1;
  128. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  129. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  130. TEST_ASSERT_EQUAL_HEX8(1, test5_len_1);
  131. test5_len_1 = 1;
  132. TEST_ESP_ERR(ESP_ERR_EFUSE_REPEATED_PROG, esp_efuse_write_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  133. esp_efuse_utility_debug_dump_blocks();
  134. }
  135. TEST_CASE("efuse test write_field_blob", "[efuse]")
  136. {
  137. test_write_blob();
  138. }
  139. static void test_write_cnt(void)
  140. {
  141. esp_efuse_coding_scheme_t scheme = esp_efuse_get_coding_scheme(EFUSE_BLK1);
  142. esp_efuse_utility_erase_virt_blocks();
  143. esp_efuse_utility_debug_dump_blocks();
  144. ESP_LOGI(TAG, "1. Test check args");
  145. size_t test3_len_6 = 5;
  146. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_field_cnt(ESP_EFUSE_MAC_FACTORY, 0));
  147. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_field_cnt(NULL, 5));
  148. TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 0));
  149. ESP_LOGI(TAG, "2. Test write operation");
  150. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST3_LEN_6, &test3_len_6));
  151. TEST_ASSERT_EQUAL_INT(0, test3_len_6);
  152. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 1));
  153. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST3_LEN_6, &test3_len_6));
  154. TEST_ASSERT_EQUAL_INT(1, test3_len_6);
  155. if (scheme == EFUSE_CODING_SCHEME_NONE) {
  156. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 1));
  157. } else {
  158. esp_efuse_utility_erase_virt_blocks();
  159. ESP_LOGI(TAG, "erase virt blocks");
  160. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 2));
  161. }
  162. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST3_LEN_6, &test3_len_6));
  163. TEST_ASSERT_EQUAL_INT(2, test3_len_6);
  164. if (scheme == EFUSE_CODING_SCHEME_NONE) {
  165. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 3));
  166. } else {
  167. esp_efuse_utility_erase_virt_blocks();
  168. ESP_LOGI(TAG, "erase virt blocks");
  169. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, 5));
  170. }
  171. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST3_LEN_6, &test3_len_6));
  172. TEST_ASSERT_EQUAL_INT(5, test3_len_6);
  173. esp_efuse_utility_debug_dump_blocks();
  174. ESP_LOGI(TAG, "3. Test field is full set");
  175. int max_bits = esp_efuse_get_field_size(ESP_EFUSE_TEST4_LEN_182);
  176. size_t test4_len_182;
  177. esp_efuse_utility_debug_dump_blocks();
  178. for (int i = 0; i < max_bits / 26; ++i) {
  179. ESP_LOGD(TAG, "# %d", i);
  180. if (scheme == EFUSE_CODING_SCHEME_NONE) {
  181. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST4_LEN_182, 26));
  182. } else {
  183. esp_efuse_utility_erase_virt_blocks();
  184. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST4_LEN_182, (i + 1) * 26));
  185. }
  186. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST4_LEN_182, &test4_len_182));
  187. esp_efuse_utility_debug_dump_blocks();
  188. TEST_ASSERT_EQUAL_INT((i + 1) * 26, test4_len_182);
  189. }
  190. esp_efuse_utility_debug_dump_blocks();
  191. ESP_LOGI(TAG, "4. Test field ESP_EFUSE_TEST4_LEN_182 is full");
  192. TEST_ESP_ERR(ESP_ERR_EFUSE_CNT_IS_FULL, esp_efuse_write_field_cnt(ESP_EFUSE_TEST4_LEN_182, 1));
  193. ESP_LOGI(TAG, "3. Test field with one bit");
  194. size_t test5_len_1;
  195. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST5_LEN_1, &test5_len_1));
  196. TEST_ASSERT_EQUAL_HEX8(0, test5_len_1);
  197. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  198. TEST_ASSERT_EQUAL_HEX8(0, test5_len_1);
  199. if (scheme != EFUSE_CODING_SCHEME_NONE) {
  200. esp_efuse_utility_erase_virt_blocks();
  201. ESP_LOGI(TAG, "erase virt blocks");
  202. }
  203. test5_len_1 = 1;
  204. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST5_LEN_1, test5_len_1));
  205. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST5_LEN_1, &test5_len_1));
  206. TEST_ASSERT_EQUAL_HEX8(1, test5_len_1);
  207. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test5_len_1, 1));
  208. TEST_ASSERT_EQUAL_HEX8(1, test5_len_1);
  209. test5_len_1 = 1;
  210. TEST_ESP_ERR(ESP_ERR_EFUSE_CNT_IS_FULL, esp_efuse_write_field_cnt(ESP_EFUSE_TEST5_LEN_1, test5_len_1));
  211. esp_efuse_utility_debug_dump_blocks();
  212. ESP_LOGI(TAG, "4. Test field test2_len_16");
  213. size_t test2_len_16 = 11;
  214. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST2_LEN_16, test2_len_16));
  215. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST2_LEN_16, &test2_len_16));
  216. TEST_ASSERT_EQUAL_HEX16(11, test2_len_16);
  217. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST2_LEN_16, &test2_len_16, 16));
  218. TEST_ASSERT_EQUAL_HEX16(0x07FF, test2_len_16);
  219. esp_efuse_utility_debug_dump_blocks();
  220. }
  221. TEST_CASE("efuse test write_field_cnt", "[efuse]")
  222. {
  223. test_write_cnt();
  224. }
  225. TEST_CASE("efuse test single bit functions", "[efuse]")
  226. {
  227. esp_efuse_utility_erase_virt_blocks();
  228. esp_efuse_utility_debug_dump_blocks();
  229. uint8_t test_bit;
  230. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test_bit, 1));
  231. TEST_ASSERT_EQUAL_HEX8(0, test_bit);
  232. test_bit = esp_efuse_read_field_bit(ESP_EFUSE_TEST5_LEN_1);
  233. TEST_ASSERT_EQUAL_HEX8(0, test_bit);
  234. TEST_ESP_OK(esp_efuse_write_field_bit(ESP_EFUSE_TEST5_LEN_1));
  235. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_TEST5_LEN_1, &test_bit, 1));
  236. TEST_ASSERT_EQUAL_HEX8(1, test_bit);
  237. test_bit = esp_efuse_read_field_bit(ESP_EFUSE_TEST5_LEN_1);
  238. TEST_ASSERT_EQUAL_HEX8(1, test_bit);
  239. // Can write the bit again and it's a no-op
  240. TEST_ESP_OK(esp_efuse_write_field_bit(ESP_EFUSE_TEST5_LEN_1));
  241. TEST_ASSERT_EQUAL_HEX8(1, esp_efuse_read_field_bit(ESP_EFUSE_TEST5_LEN_1));
  242. esp_efuse_utility_debug_dump_blocks();
  243. }
  244. void cut_tail_arr(uint8_t *arr, int num_used_bits, size_t count_bits)
  245. {
  246. if ((num_used_bits + count_bits) % 8) {
  247. int start_used_item = (num_used_bits - 1) / 8;
  248. int last_used_item = ((num_used_bits + count_bits) - 1) / 8;
  249. int shift = 0;
  250. int mask = num_used_bits + count_bits;
  251. if (last_used_item == start_used_item) {
  252. shift = (num_used_bits) % 8;
  253. mask = count_bits;
  254. }
  255. arr[last_used_item] &= ((1 << (mask % 8)) - 1) << shift;
  256. }
  257. }
  258. void cut_start_arr(uint8_t *arr, size_t num_used_bits)
  259. {
  260. if (num_used_bits % 8) {
  261. int start_used_item = (num_used_bits - 1) / 8;
  262. arr[start_used_item] &= ~((1 << (num_used_bits % 8)) - 1);
  263. }
  264. }
  265. void get_part_arr(uint8_t *arr_in, uint8_t *arr_out, int num_used_bits, int count_bits)
  266. {
  267. int num_items = esp_efuse_utility_get_number_of_items(num_used_bits + count_bits, 8);
  268. memcpy(arr_out, arr_in, num_items);
  269. memset(arr_out, 0, num_used_bits / 8);
  270. cut_start_arr(arr_out, num_used_bits);
  271. cut_tail_arr(arr_out, num_used_bits, count_bits);
  272. }
  273. void fill_part_arr(uint8_t *arr_in, uint8_t *arr_out, int count_bits)
  274. {
  275. int num_items = esp_efuse_utility_get_number_of_items(count_bits, 8);
  276. memcpy(arr_out, arr_in, num_items);
  277. cut_tail_arr(arr_out, 0, count_bits);
  278. }
  279. // Writes a random array to efuse, then reads and compares it.
  280. void test_blob(const esp_efuse_desc_t* field[], uint8_t *arr_w, uint8_t *arr_r, uint8_t *arr_temp, int arr_size, size_t field_size)
  281. {
  282. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_w, arr_size, ESP_LOG_INFO);
  283. TEST_ESP_OK(esp_efuse_write_field_blob(field, arr_w, field_size));
  284. memset(arr_r, 0, arr_size);
  285. TEST_ESP_OK(esp_efuse_read_field_blob(field, arr_r, field_size));
  286. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_r, arr_size, ESP_LOG_INFO);
  287. esp_efuse_utility_debug_dump_blocks();
  288. TEST_ASSERT_TRUE_MESSAGE(memcmp(arr_w, arr_r, arr_size) == 0, "Operation write/read blob is not success");
  289. int count_once = 0;
  290. for (int i = 0; i < arr_size; ++i) {
  291. count_once += __builtin_popcount(arr_w[i]);
  292. }
  293. size_t num_bits_r = 0;
  294. TEST_ESP_OK(esp_efuse_read_field_cnt(field, &num_bits_r));
  295. TEST_ASSERT_EQUAL_INT(count_once, num_bits_r);
  296. size_t num_bits_w = field_size - count_once;
  297. if (num_bits_w == 0) {
  298. esp_efuse_utility_erase_virt_blocks();
  299. num_bits_w = field_size;
  300. }
  301. TEST_ESP_OK(esp_efuse_write_field_cnt(field, num_bits_w));
  302. TEST_ESP_OK(esp_efuse_read_field_cnt(field, &num_bits_r));
  303. esp_efuse_utility_debug_dump_blocks();
  304. TEST_ASSERT_EQUAL_INT(field_size, num_bits_r);
  305. memset(arr_r, 0, arr_size);
  306. TEST_ESP_OK(esp_efuse_read_field_blob(field, arr_r, field_size));
  307. memset(arr_temp, 0xFF, arr_size);
  308. cut_tail_arr(arr_temp, 0, field_size);
  309. esp_efuse_utility_debug_dump_blocks();
  310. TEST_ASSERT_TRUE_MESSAGE(memcmp(arr_temp, arr_r, arr_size) == 0, "Operation write/read blob is not success");
  311. }
  312. // Records a random number of bits (as "1") in the efuse field, then reads and compares.
  313. void test_cnt_part(const esp_efuse_desc_t* field[], uint8_t *arr_r, int arr_size, size_t field_size)
  314. {
  315. size_t num_bits_r = 0;
  316. TEST_ESP_OK(esp_efuse_read_field_cnt(field, &num_bits_r));
  317. TEST_ASSERT_EQUAL_INT(0, num_bits_r);
  318. TEST_ESP_OK(esp_efuse_write_field_cnt(field, field_size));
  319. TEST_ESP_OK(esp_efuse_read_field_cnt(field, &num_bits_r));
  320. TEST_ASSERT_EQUAL_INT(field_size, num_bits_r);
  321. esp_efuse_utility_erase_virt_blocks();
  322. int num_bits_summ_r = 0;
  323. int num_bits_w = 0;
  324. while(field_size > num_bits_summ_r) {
  325. num_bits_w = 0;
  326. while(num_bits_w == 0 || (num_bits_summ_r + num_bits_w) > field_size) {
  327. bootloader_random_enable();
  328. bootloader_fill_random(&num_bits_w, 1);
  329. bootloader_random_disable();
  330. num_bits_w = num_bits_w * field_size / 255;
  331. if (num_bits_w != 0 && (num_bits_summ_r + num_bits_w) <= field_size) {
  332. break;
  333. }
  334. }
  335. TEST_ESP_OK(esp_efuse_write_field_cnt(field, num_bits_w));
  336. TEST_ESP_OK(esp_efuse_read_field_cnt(field, &num_bits_r));
  337. num_bits_summ_r += num_bits_w;
  338. TEST_ASSERT_EQUAL_INT(num_bits_summ_r, num_bits_r);
  339. memset(arr_r, 0, arr_size);
  340. TEST_ESP_OK(esp_efuse_read_field_blob(field, arr_r, field_size));
  341. int count_once = 0;
  342. for (int i = 0; i < arr_size; ++i) {
  343. count_once += __builtin_popcount(arr_r[i]);
  344. }
  345. TEST_ASSERT_EQUAL_INT(num_bits_summ_r, count_once);
  346. ESP_LOGI(TAG, "Once bits=%d, step=%d", num_bits_summ_r, num_bits_w);
  347. }
  348. esp_efuse_utility_debug_dump_blocks();
  349. }
  350. // From a random array takes a random number of bits and write to efuse, it repeats until the entire length of the field is written down.
  351. void test_blob_part(const esp_efuse_desc_t* field[], uint8_t *arr_w, uint8_t *arr_r, uint8_t *arr_temp, int arr_size, size_t field_size)
  352. {
  353. esp_efuse_utility_debug_dump_blocks();
  354. int num_bits_summ_r = 0;
  355. int num_bits_w = 0;
  356. memset(arr_w, 0, arr_size);
  357. bootloader_random_enable();
  358. bootloader_fill_random(arr_w, arr_size);
  359. bootloader_random_disable();
  360. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_w, arr_size, ESP_LOG_INFO);
  361. while(field_size > num_bits_summ_r) {
  362. num_bits_w = 0;
  363. while(num_bits_w == 0 || (num_bits_summ_r + num_bits_w) > field_size) {
  364. bootloader_random_enable();
  365. bootloader_fill_random(&num_bits_w, 1);
  366. bootloader_random_disable();
  367. num_bits_w = num_bits_w * field_size / 255;
  368. if (num_bits_w != 0 && (num_bits_summ_r + num_bits_w) <= field_size) {
  369. break;
  370. }
  371. }
  372. ESP_LOGI(TAG, "Summ bits=%d, step=%d", num_bits_summ_r, num_bits_w);
  373. memset(arr_temp, 0, arr_size);
  374. get_part_arr(arr_w, arr_temp, num_bits_summ_r, num_bits_w);
  375. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_temp, arr_size, ESP_LOG_INFO);
  376. TEST_ESP_OK(esp_efuse_write_field_blob(field, arr_temp, field_size));
  377. memset(arr_r, 0, arr_size);
  378. TEST_ESP_OK(esp_efuse_read_field_blob(field, arr_r, field_size));
  379. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_r, arr_size, ESP_LOG_INFO);
  380. esp_efuse_utility_debug_dump_blocks();
  381. num_bits_summ_r += num_bits_w;
  382. memset(arr_temp, 0, arr_size);
  383. fill_part_arr(arr_w, arr_temp, num_bits_summ_r);
  384. ESP_LOG_BUFFER_HEX_LEVEL(TAG, arr_temp, arr_size, ESP_LOG_INFO);
  385. TEST_ASSERT_TRUE_MESSAGE(memcmp(arr_temp, arr_r, arr_size) == 0, "Operation write/read blob is not success");
  386. }
  387. }
  388. void check_efuse_table_test(int cycle)
  389. {
  390. int num_test = 0;
  391. while(1) {
  392. const esp_efuse_desc_t** field;
  393. switch (num_test++) {
  394. case 0: field = ESP_EFUSE_TEST1_LEN_8; break;
  395. case 1: field = ESP_EFUSE_TEST2_LEN_16; break;
  396. case 2: field = ESP_EFUSE_TEST3_LEN_6; break;
  397. case 3: field = ESP_EFUSE_TEST4_LEN_182; break;
  398. case 4: field = ESP_EFUSE_TEST5_LEN_1; break;
  399. case 5: field = ESP_EFUSE_TEST6_LEN_17; break;
  400. default:
  401. return;
  402. break;
  403. }
  404. size_t field_size = esp_efuse_get_field_size(field);
  405. int arr_size = esp_efuse_utility_get_number_of_items(field_size, 8);
  406. uint8_t *arr_w = (uint8_t *) malloc(arr_size);
  407. uint8_t *arr_r = (uint8_t *) malloc(arr_size);
  408. uint8_t *arr_temp = (uint8_t *) malloc(arr_size);
  409. ESP_LOGI(TAG, "Test#%d", num_test);
  410. for (int c = 1; c <= cycle; ++c) {
  411. ESP_LOGI(TAG, "Cycle#%d/%d", c, cycle);
  412. memset(arr_w, 0, arr_size);
  413. bootloader_random_enable();
  414. bootloader_fill_random(arr_w, arr_size);
  415. bootloader_random_disable();
  416. cut_tail_arr(arr_w, 0, field_size);
  417. esp_efuse_utility_erase_virt_blocks();
  418. ESP_LOGI(TAG, "1) blob write/read");
  419. test_blob(field, arr_w, arr_r, arr_temp, arr_size, field_size);
  420. esp_efuse_utility_erase_virt_blocks();
  421. ESP_LOGI(TAG, "2) cnt part write/read");
  422. test_cnt_part(field, arr_r, arr_size, field_size);
  423. esp_efuse_utility_erase_virt_blocks();
  424. ESP_LOGI(TAG, "3) blob part write/read");
  425. test_blob_part(field, arr_w, arr_r, arr_temp, arr_size, field_size);
  426. }
  427. free(arr_temp);
  428. free(arr_r);
  429. free(arr_w);
  430. }
  431. }
  432. TEST_CASE("efuse esp_efuse_table_test", "[efuse]")
  433. {
  434. esp_efuse_coding_scheme_t coding_scheme = esp_efuse_get_coding_scheme(EFUSE_BLK2);
  435. if (coding_scheme == EFUSE_CODING_SCHEME_NONE) {
  436. check_efuse_table_test(2);
  437. } else {
  438. ESP_LOGI(TAG, "This test is applicable only to the EFUSE_CODING_SCHEME_NONE. Skip this test.");
  439. }
  440. }
  441. TEST_CASE("Test esp_efuse_read_block esp_efuse_write_block functions", "[efuse]")
  442. {
  443. int count_useful_reg = 0;
  444. esp_efuse_coding_scheme_t coding_scheme = esp_efuse_get_coding_scheme(EFUSE_BLK2);
  445. if (coding_scheme == EFUSE_CODING_SCHEME_NONE) {
  446. printf("EFUSE_CODING_SCHEME_NONE\n");
  447. count_useful_reg = 8;
  448. }
  449. #if CONFIG_IDF_TARGET_ESP32
  450. if (coding_scheme == EFUSE_CODING_SCHEME_3_4) {
  451. printf("EFUSE_CODING_SCHEME_3_4\n");
  452. count_useful_reg = 6;
  453. } else if (coding_scheme == EFUSE_CODING_SCHEME_REPEAT) {
  454. printf("EFUSE_CODING_SCHEME_REPEAT\n");
  455. count_useful_reg = 4;
  456. }
  457. #else
  458. if (coding_scheme == EFUSE_CODING_SCHEME_RS) {
  459. printf("EFUSE_CODING_SCHEME_RS\n");
  460. count_useful_reg = 8;
  461. }
  462. #endif
  463. esp_efuse_utility_reset();
  464. esp_efuse_utility_erase_virt_blocks();
  465. uint8_t src_key[32] = { 0 };
  466. uint8_t dst_key[32] = { 0 };
  467. int offset_in_bits = 0;
  468. for (int i = 0; i < count_useful_reg * 4; ++i) {
  469. src_key[i] = 0xAB + i;
  470. }
  471. TEST_ESP_OK(esp_efuse_write_block(EFUSE_BLK2, src_key, offset_in_bits, count_useful_reg * 32));
  472. TEST_ESP_OK(esp_efuse_read_block(EFUSE_BLK2, dst_key, offset_in_bits, count_useful_reg * 32));
  473. esp_efuse_utility_debug_dump_blocks();
  474. TEST_ASSERT_EQUAL_HEX8_ARRAY(src_key, dst_key, sizeof(src_key));
  475. esp_efuse_utility_erase_virt_blocks();
  476. memset(src_key, 0, sizeof(src_key));
  477. memset(dst_key, 0, sizeof(dst_key));
  478. offset_in_bits = count_useful_reg * 32 / 2;
  479. for (int i = 0; i < count_useful_reg * 4 / 2; ++i) {
  480. src_key[i] = 0xCD + i;
  481. }
  482. TEST_ESP_OK(esp_efuse_write_block(EFUSE_BLK2, src_key, offset_in_bits, count_useful_reg * 32 / 2));
  483. TEST_ESP_OK(esp_efuse_read_block(EFUSE_BLK2, dst_key, offset_in_bits, count_useful_reg * 32 / 2));
  484. esp_efuse_utility_debug_dump_blocks();
  485. TEST_ASSERT_EQUAL_HEX8_ARRAY(src_key, dst_key, count_useful_reg * 4 / 2);
  486. esp_efuse_utility_erase_virt_blocks();
  487. }
  488. TEST_CASE("Test Bits are not empty. Write operation is forbidden", "[efuse]")
  489. {
  490. esp_efuse_utility_update_virt_blocks();
  491. esp_efuse_utility_debug_dump_blocks();
  492. int count_useful_reg = 0;
  493. uint8_t r_buff[32];
  494. int st_offset = -1;
  495. int num_block;
  496. for (num_block = EFUSE_BLK1; num_block < 4; ++num_block) {
  497. memset(r_buff, 0, sizeof(r_buff));
  498. esp_efuse_coding_scheme_t coding_scheme = esp_efuse_get_coding_scheme(num_block);
  499. if (coding_scheme == EFUSE_CODING_SCHEME_NONE) {
  500. printf("EFUSE_CODING_SCHEME_NONE. The test is not applicable.\n");
  501. count_useful_reg = 8;
  502. return;
  503. }
  504. #if CONFIG_IDF_TARGET_ESP32
  505. if (coding_scheme == EFUSE_CODING_SCHEME_3_4) {
  506. printf("EFUSE_CODING_SCHEME_3_4\n");
  507. count_useful_reg = 6;
  508. } else if (coding_scheme == EFUSE_CODING_SCHEME_REPEAT) {
  509. printf("EFUSE_CODING_SCHEME_REPEAT\n");
  510. count_useful_reg = 4;
  511. }
  512. #else
  513. if (coding_scheme == EFUSE_CODING_SCHEME_RS) {
  514. printf("EFUSE_CODING_SCHEME_RS\n");
  515. if (num_block == EFUSE_BLK1) {
  516. count_useful_reg = 6;
  517. } else {
  518. count_useful_reg = 8;
  519. }
  520. }
  521. #endif
  522. TEST_ESP_OK(esp_efuse_read_block(num_block, r_buff, 0, count_useful_reg * 32));
  523. for (int i = 0; i < count_useful_reg * 4; ++i) {
  524. if (r_buff[i] != 0) {
  525. // found used byte
  526. for (int j = 0; j < 8; ++j) {
  527. if ((r_buff[i] & (1 << j)) == 0) {
  528. // found empty bit into this byte
  529. st_offset = i * 8 + j;
  530. printf("Byte = 0x%02x. offset is = %d\n", r_buff[i], st_offset);
  531. break;
  532. }
  533. }
  534. if (st_offset != -1) {
  535. break;
  536. }
  537. }
  538. }
  539. if (st_offset != -1) {
  540. break;
  541. }
  542. }
  543. if (st_offset != -1) {
  544. // write 1 bit to empty place.
  545. uint8_t val = 1;
  546. TEST_ESP_ERR(ESP_ERR_CODING, esp_efuse_write_block(num_block, &val, st_offset, 1));
  547. } else {
  548. printf("Test skipped. It is not applicable, the device has no written bits.");
  549. }
  550. }
  551. #ifndef CONFIG_FREERTOS_UNICORE
  552. static const int delay_ms = 2000;
  553. static xSemaphoreHandle sema;
  554. static void task1(void* arg)
  555. {
  556. TEST_ESP_OK(esp_efuse_batch_write_begin());
  557. ESP_LOGI(TAG, "Start work in batch mode");
  558. xSemaphoreGive(sema);
  559. vTaskDelay((delay_ms + 100) / portTICK_PERIOD_MS);
  560. ESP_LOGI(TAG, "Finish work in batch mode");
  561. TEST_ESP_OK(esp_efuse_batch_write_cancel());
  562. vTaskDelete(NULL);
  563. }
  564. static void task2(void* arg)
  565. {
  566. xSemaphoreTake(sema, portMAX_DELAY);
  567. uint8_t mac[6];
  568. int64_t t1 = esp_timer_get_time();
  569. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &mac, sizeof(mac) * 8));
  570. int64_t t2 = esp_timer_get_time();
  571. int diff_ms = (t2 - t1) / 1000;
  572. TEST_ASSERT_GREATER_THAN(delay_ms, diff_ms);
  573. ESP_LOGI(TAG, "read MAC address: %02x:%02x:%02x:%02x:%02x:%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  574. xSemaphoreGive(sema);
  575. vTaskDelete(NULL);
  576. }
  577. static void task3(void* arg)
  578. {
  579. xSemaphoreTake(sema, portMAX_DELAY);
  580. size_t test3_len_6 = 2;
  581. int64_t t1 = esp_timer_get_time();
  582. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_TEST3_LEN_6, test3_len_6));
  583. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_TEST3_LEN_6, &test3_len_6));
  584. int64_t t2 = esp_timer_get_time();
  585. ESP_LOGI(TAG, "write&read test3_len_6: %d", test3_len_6);
  586. int diff_ms = (t2 - t1) / 1000;
  587. TEST_ASSERT_GREATER_THAN(delay_ms, diff_ms);
  588. TEST_ASSERT_EQUAL_INT(2, test3_len_6);
  589. xSemaphoreGive(sema);
  590. vTaskDelete(NULL);
  591. }
  592. TEST_CASE("Batch mode is thread-safe", "[efuse]")
  593. {
  594. // Batch mode blocks work with efuse on other tasks.
  595. esp_efuse_utility_update_virt_blocks();
  596. esp_efuse_utility_debug_dump_blocks();
  597. sema = xSemaphoreCreateBinary();
  598. printf("\n");
  599. xTaskCreatePinnedToCore(task1, "task1", 3072, NULL, UNITY_FREERTOS_PRIORITY - 1, NULL, 0);
  600. xTaskCreatePinnedToCore(task2, "task2", 3072, NULL, UNITY_FREERTOS_PRIORITY - 1, NULL, 1);
  601. vTaskDelay(3000 / portTICK_PERIOD_MS);
  602. xSemaphoreTake(sema, portMAX_DELAY);
  603. esp_efuse_utility_reset();
  604. esp_efuse_utility_erase_virt_blocks();
  605. printf("\n");
  606. xTaskCreatePinnedToCore(task1, "task1", 3072, NULL, UNITY_FREERTOS_PRIORITY - 1, NULL, 0);
  607. xTaskCreatePinnedToCore(task3, "task3", 3072, NULL, UNITY_FREERTOS_PRIORITY - 1, NULL, 1);
  608. vTaskDelay(3000 / portTICK_PERIOD_MS);
  609. xSemaphoreTake(sema, portMAX_DELAY);
  610. printf("\n");
  611. vSemaphoreDelete(sema);
  612. esp_efuse_utility_reset();
  613. esp_efuse_utility_erase_virt_blocks();
  614. }
  615. #endif // #ifndef CONFIG_FREERTOS_UNICORE
  616. static void test_wp(esp_efuse_block_t blk, const esp_efuse_desc_t* field[])
  617. {
  618. size_t out_cnt;
  619. TEST_ESP_OK(esp_efuse_set_write_protect(blk));
  620. esp_efuse_read_field_cnt(field, &out_cnt);
  621. TEST_ASSERT_EQUAL_INT(1, out_cnt);
  622. }
  623. static void test_rp(esp_efuse_block_t blk, const esp_efuse_desc_t* field[], bool read_first)
  624. {
  625. size_t out_cnt;
  626. if (read_first) {
  627. esp_efuse_read_field_cnt(field, &out_cnt);
  628. TEST_ASSERT_EQUAL_INT(0, out_cnt);
  629. }
  630. TEST_ESP_OK(esp_efuse_set_read_protect(blk));
  631. esp_efuse_read_field_cnt(field, &out_cnt);
  632. TEST_ASSERT_EQUAL_INT(1, out_cnt);
  633. if (read_first) {
  634. TEST_ESP_ERR(ESP_ERR_EFUSE_CNT_IS_FULL, esp_efuse_set_read_protect(blk));
  635. }
  636. }
  637. TEST_CASE("Test a write/read protection", "[efuse]")
  638. {
  639. esp_efuse_utility_reset();
  640. esp_efuse_utility_erase_virt_blocks();
  641. esp_efuse_utility_debug_dump_blocks();
  642. TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_set_write_protect(EFUSE_BLK0));
  643. TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_set_read_protect(EFUSE_BLK0));
  644. size_t out_cnt;
  645. esp_efuse_read_field_cnt(ESP_EFUSE_WR_DIS_BLK1, &out_cnt);
  646. TEST_ASSERT_EQUAL_INT(0, out_cnt);
  647. TEST_ESP_OK(esp_efuse_set_write_protect(EFUSE_BLK1));
  648. esp_efuse_read_field_cnt(ESP_EFUSE_WR_DIS_BLK1, &out_cnt);
  649. TEST_ASSERT_EQUAL_INT(1, out_cnt);
  650. TEST_ESP_ERR(ESP_ERR_EFUSE_CNT_IS_FULL, esp_efuse_set_write_protect(EFUSE_BLK1));
  651. #ifdef CONFIG_IDF_TARGET_ESP32
  652. test_wp(EFUSE_BLK2, ESP_EFUSE_WR_DIS_BLK2);
  653. test_wp(EFUSE_BLK3, ESP_EFUSE_WR_DIS_BLK3);
  654. esp_efuse_utility_debug_dump_blocks();
  655. test_rp(EFUSE_BLK1, ESP_EFUSE_RD_DIS_BLK1, true);
  656. test_rp(EFUSE_BLK2, ESP_EFUSE_RD_DIS_BLK2, false);
  657. test_rp(EFUSE_BLK3, ESP_EFUSE_RD_DIS_BLK3, false);
  658. #else
  659. test_wp(EFUSE_BLK2, ESP_EFUSE_WR_DIS_SYS_DATA_PART1);
  660. test_wp(EFUSE_BLK3, ESP_EFUSE_WR_DIS_USER_DATA);
  661. esp_efuse_utility_debug_dump_blocks();
  662. test_rp(EFUSE_BLK4, ESP_EFUSE_RD_DIS_KEY0, true);
  663. test_rp(EFUSE_BLK5, ESP_EFUSE_RD_DIS_KEY1, false);
  664. test_rp(EFUSE_BLK6, ESP_EFUSE_RD_DIS_KEY2, false);
  665. #endif
  666. esp_efuse_utility_debug_dump_blocks();
  667. esp_efuse_utility_reset();
  668. esp_efuse_utility_erase_virt_blocks();
  669. }
  670. #endif // #ifdef CONFIG_EFUSE_VIRTUAL
  671. #ifdef CONFIG_IDF_ENV_FPGA
  672. TEST_CASE("Test a real write (FPGA)", "[efuse]")
  673. {
  674. ESP_LOGI(TAG, "1. Write MAC address");
  675. esp_efuse_utility_debug_dump_blocks();
  676. uint8_t mac[6];
  677. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &mac, sizeof(mac) * 8));
  678. ESP_LOGI(TAG, "MAC: %02x:%02x:%02x:%02x:%02x:%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
  679. uint8_t new_mac[6];
  680. if (mac[0] == 0) {
  681. new_mac[0] = 0x71;
  682. new_mac[1] = 0x62;
  683. new_mac[2] = 0x53;
  684. new_mac[3] = 0x44;
  685. new_mac[4] = 0x35;
  686. new_mac[5] = 0x26;
  687. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_MAC_FACTORY, &new_mac, sizeof(new_mac) * 8));
  688. ESP_LOGI(TAG, "new MAC: %02x:%02x:%02x:%02x:%02x:%02x", new_mac[0], new_mac[1], new_mac[2], new_mac[3], new_mac[4], new_mac[5]);
  689. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_MAC_FACTORY, &mac, sizeof(mac) * 8));
  690. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_mac, mac, sizeof(new_mac));
  691. esp_efuse_utility_debug_dump_blocks();
  692. }
  693. #ifndef CONFIG_IDF_TARGET_ESP32
  694. ESP_LOGI(TAG, "2. Write KEY3");
  695. uint8_t key[32] = {0};
  696. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY3, &key, 256));
  697. for (int i = 0; i < sizeof(key); ++i) {
  698. TEST_ASSERT_EQUAL_INT(0, key[i]);
  699. }
  700. uint8_t new_key[32] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
  701. 10, 11, 12, 12, 14, 15, 16, 17, 18, 19,
  702. 20, 21, 22, 22, 24, 25, 26, 27, 28, 29,
  703. 30, 31};
  704. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_KEY3, &new_key, 256));
  705. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY3, &key, 256));
  706. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_key, key, sizeof(key));
  707. esp_efuse_utility_debug_dump_blocks();
  708. ESP_LOGI(TAG, "3. Set a read protection for KEY3");
  709. TEST_ESP_OK(esp_efuse_set_read_protect(EFUSE_BLK7));
  710. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY3, &key, 256));
  711. #ifndef CONFIG_EFUSE_VIRTUAL
  712. TEST_ASSERT_EACH_EQUAL_HEX8(0, key, sizeof(key));
  713. #else
  714. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_key, key, sizeof(key));
  715. #endif // CONFIG_EFUSE_VIRTUAL
  716. esp_efuse_utility_debug_dump_blocks();
  717. #endif // not CONFIG_IDF_TARGET_ESP32
  718. ESP_LOGI(TAG, "4. Write SECURE_VERSION");
  719. int max_bits = esp_efuse_get_field_size(ESP_EFUSE_SECURE_VERSION);
  720. size_t read_sec_version;
  721. esp_efuse_utility_debug_dump_blocks();
  722. for (int i = 0; i < max_bits; ++i) {
  723. ESP_LOGI(TAG, "# %d", i);
  724. TEST_ESP_OK(esp_efuse_write_field_cnt(ESP_EFUSE_SECURE_VERSION, 1));
  725. TEST_ESP_OK(esp_efuse_read_field_cnt(ESP_EFUSE_SECURE_VERSION, &read_sec_version));
  726. esp_efuse_utility_debug_dump_blocks();
  727. TEST_ASSERT_EQUAL_INT(i + 1, read_sec_version);
  728. }
  729. }
  730. #endif // CONFIG_IDF_ENV_FPGA
  731. TEST_CASE("Test chip_ver_pkg APIs return the same value", "[efuse]")
  732. {
  733. esp_efuse_utility_update_virt_blocks();
  734. TEST_ASSERT_EQUAL_INT(esp_efuse_get_pkg_ver(), bootloader_common_get_chip_ver_pkg());
  735. }
  736. TEST_CASE("Test chip_revision APIs return the same value", "[efuse]")
  737. {
  738. esp_efuse_utility_update_virt_blocks();
  739. TEST_ASSERT_EQUAL_INT(esp_efuse_get_chip_ver(), bootloader_common_get_chip_revision());
  740. }
  741. #ifndef CONFIG_IDF_TARGET_ESP32
  742. #if CONFIG_IDF_ENV_FPGA || CONFIG_EFUSE_VIRTUAL
  743. TEST_CASE("Test writing order is BLK_MAX->BLK0", "[efuse]")
  744. {
  745. uint8_t new_key[32] = {33, 1, 2, 3, 4, 5, 6, 7, 8, 9,
  746. 10, 11, 12, 12, 14, 15, 16, 17, 18, 19,
  747. 20, 21, 22, 22, 24, 25, 26, 27, 28, 29,
  748. 30, 31};
  749. esp_efuse_utility_erase_virt_blocks();
  750. esp_efuse_utility_debug_dump_blocks();
  751. TEST_ESP_OK(esp_efuse_batch_write_begin());
  752. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_KEY4, &new_key, 256));
  753. // If the order of writing blocks is wrong (ex. BLK0 -> BLK_MAX)
  754. // then the write protection bit will be set early and the key was left un-updated.
  755. TEST_ESP_OK(esp_efuse_set_write_protect(EFUSE_BLK_KEY4));
  756. TEST_ESP_OK(esp_efuse_batch_write_commit());
  757. esp_efuse_utility_debug_dump_blocks();
  758. uint8_t key[32] = { 0xEE };
  759. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY4, &key, 256));
  760. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_key, key, sizeof(key));
  761. }
  762. TEST_CASE("Test reading inside of batch mode in a nested way", "[efuse]")
  763. {
  764. uint8_t new_key[32] = {44, 1, 2, 3, 4, 5, 6, 7, 8, 9,
  765. 10, 11, 12, 12, 14, 15, 16, 17, 18, 19,
  766. 20, 21, 22, 22, 24, 25, 26, 27, 28, 29,
  767. 30, 31};
  768. uint8_t key[32] = { 0xEE };
  769. esp_efuse_utility_reset();
  770. esp_efuse_utility_erase_virt_blocks();
  771. esp_efuse_utility_debug_dump_blocks();
  772. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY5, &key, 256));
  773. TEST_ASSERT_EACH_EQUAL_HEX8(0, key, sizeof(key));
  774. TEST_ESP_OK(esp_efuse_batch_write_begin());
  775. TEST_ESP_OK(esp_efuse_batch_write_begin());
  776. TEST_ESP_OK(esp_efuse_batch_write_begin());
  777. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_KEY5, &new_key, 256));
  778. TEST_ESP_OK(esp_efuse_set_write_protect(EFUSE_BLK_KEY5));
  779. ESP_LOGI(TAG, "Reading inside Batch mode, the key was not burn yet and it is empty");
  780. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY5, &key, 256));
  781. TEST_ASSERT_EACH_EQUAL_HEX8(0, key, sizeof(key));
  782. TEST_ESP_OK(esp_efuse_batch_write_commit());
  783. TEST_ESP_OK(esp_efuse_batch_write_commit());
  784. TEST_ESP_OK(esp_efuse_batch_write_commit());
  785. TEST_ESP_OK(esp_efuse_batch_write_begin());
  786. TEST_ESP_OK(esp_efuse_batch_write_begin());
  787. TEST_ESP_OK(esp_efuse_batch_write_begin());
  788. TEST_ESP_OK(esp_efuse_batch_write_begin());
  789. ESP_LOGI(TAG, "Reading inside Batch mode, the key is already set");
  790. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY5, &key, 256));
  791. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_key, key, sizeof(key));
  792. TEST_ESP_OK(esp_efuse_batch_write_commit());
  793. TEST_ESP_OK(esp_efuse_batch_write_commit());
  794. TEST_ESP_OK(esp_efuse_batch_write_commit());
  795. TEST_ESP_OK(esp_efuse_batch_write_commit());
  796. esp_efuse_utility_debug_dump_blocks();
  797. ESP_LOGI(TAG, "Reading inside Batch mode, the key is already set");
  798. TEST_ESP_ERR(ESP_ERR_INVALID_STATE, esp_efuse_batch_write_commit());
  799. TEST_ESP_ERR(ESP_ERR_INVALID_STATE, esp_efuse_batch_write_cancel());
  800. TEST_ESP_OK(esp_efuse_batch_write_begin());
  801. TEST_ESP_OK(esp_efuse_write_field_blob(ESP_EFUSE_KEY2, &new_key, 256));
  802. TEST_ESP_OK(esp_efuse_batch_write_commit());
  803. TEST_ESP_OK(esp_efuse_read_field_blob(ESP_EFUSE_KEY2, &key, 256));
  804. TEST_ASSERT_EQUAL_HEX8_ARRAY(new_key, key, sizeof(key));
  805. esp_efuse_utility_debug_dump_blocks();
  806. }
  807. #endif // CONFIG_IDF_ENV_FPGA || CONFIG_EFUSE_VIRTUAL
  808. #endif // not CONFIG_IDF_TARGET_ESP32