regi2c_ctrl.c 1.8 KB

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  1. // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include "regi2c_ctrl.h"
  15. #include <stdint.h>
  16. #include <freertos/FreeRTOS.h>
  17. #include <freertos/semphr.h>
  18. static portMUX_TYPE mux = portMUX_INITIALIZER_UNLOCKED;
  19. uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add)
  20. {
  21. portENTER_CRITICAL_ISR(&mux);
  22. uint8_t value = i2c_read_reg_raw(block, host_id, reg_add);
  23. portEXIT_CRITICAL_ISR(&mux);
  24. return value;
  25. }
  26. uint8_t IRAM_ATTR regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb)
  27. {
  28. portENTER_CRITICAL_ISR(&mux);
  29. uint8_t value = i2c_read_reg_mask_raw(block, host_id, reg_add, msb, lsb);
  30. portEXIT_CRITICAL_ISR(&mux);
  31. return value;
  32. }
  33. void IRAM_ATTR regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data)
  34. {
  35. portENTER_CRITICAL_ISR(&mux);
  36. i2c_write_reg_raw(block, host_id, reg_add, data);
  37. portEXIT_CRITICAL_ISR(&mux);
  38. }
  39. void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data)
  40. {
  41. portENTER_CRITICAL_ISR(&mux);
  42. i2c_write_reg_mask_raw(block, host_id, reg_add, msb, lsb, data);
  43. portEXIT_CRITICAL_ISR(&mux);
  44. }