esp_async_memcpy_impl.h 3.3 KB

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  1. // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stdint.h>
  15. #include <stdbool.h>
  16. #include "esp_err.h"
  17. #include "esp_intr_alloc.h"
  18. #include "soc/soc_caps.h"
  19. #include "hal/dma_types.h"
  20. #include "freertos/FreeRTOS.h"
  21. #if SOC_CP_DMA_SUPPORTED
  22. #include "hal/cp_dma_ll.h"
  23. #include "hal/cp_dma_hal.h"
  24. #elif SOC_GDMA_SUPPORTED
  25. #include "esp_private/gdma.h"
  26. #endif
  27. /**
  28. * @brief Type of async mcp implementation layer context
  29. *
  30. */
  31. typedef struct {
  32. #if SOC_CP_DMA_SUPPORTED
  33. cp_dma_hal_context_t hal; // CP DMA hal
  34. intr_handle_t intr; // CP DMA interrupt handle
  35. portMUX_TYPE hal_lock; // CP DMA HAL level spin lock
  36. #elif SOC_GDMA_SUPPORTED
  37. gdma_channel_handle_t tx_channel;
  38. gdma_channel_handle_t rx_channel;
  39. #endif
  40. intptr_t rx_eof_addr;
  41. bool isr_need_yield; // if current isr needs a yield for higher priority task
  42. } async_memcpy_impl_t;
  43. /**
  44. * @brief ISR callback function, invoked when RX done event triggered
  45. *
  46. * @param impl async mcp implementation layer context pointer
  47. */
  48. void async_memcpy_isr_on_rx_done_event(async_memcpy_impl_t *impl);
  49. /**
  50. * @brief Initialize async mcp implementation layer
  51. *
  52. * @param impl async mcp implementation layer context pointer
  53. * @return Always return ESP_OK
  54. */
  55. esp_err_t async_memcpy_impl_init(async_memcpy_impl_t *impl);
  56. /**
  57. * @brief Deinitialize async mcp implementation layer
  58. *
  59. * @param impl async mcp implementation layer context pointer
  60. * @return Always return ESP_OK
  61. */
  62. esp_err_t async_memcpy_impl_deinit(async_memcpy_impl_t *impl);
  63. /**
  64. * @brief Start async mcp (on implementation layer)
  65. *
  66. * @param impl async mcp implementation layer context pointer
  67. * @param outlink_base base descriptor address for TX DMA channel
  68. * @param inlink_base base descriptor address for RX DMA channel
  69. * @return Always return ESP_OK
  70. */
  71. esp_err_t async_memcpy_impl_start(async_memcpy_impl_t *impl, intptr_t outlink_base, intptr_t inlink_base);
  72. /**
  73. * @brief Stop async mcp (on implementation layer)
  74. *
  75. * @param impl async mcp implementation layer context pointer
  76. * @return Always return ESP_OK
  77. */
  78. esp_err_t async_memcpy_impl_stop(async_memcpy_impl_t *impl);
  79. /**
  80. * @brief Restart async mcp DMA engine
  81. *
  82. * @param impl async mcp implementation layer context pointer
  83. * @return Always return ESP_OK
  84. */
  85. esp_err_t async_memcpy_impl_restart(async_memcpy_impl_t *impl);
  86. /**
  87. * @brief check if buffer address is valid
  88. * @note This is related to underlying target (e.g. on esp32-s2, only buffer located in SRAM is supported)
  89. *
  90. * @param impl async mcp implementation layer context pointer
  91. * @param src Source buffer address
  92. * @param dst Destination buffer address
  93. * @return True if both address are valid
  94. */
  95. bool async_memcpy_impl_is_buffer_address_valid(async_memcpy_impl_t *impl, void *src, void *dst);