Kconfig 3.9 KB

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  1. menu "Core dump"
  2. choice ESP_COREDUMP_TO_FLASH_OR_UART
  3. prompt "Data destination"
  4. default ESP_COREDUMP_ENABLE_TO_NONE
  5. help
  6. Select place to store core dump: flash, uart or none (to disable core dumps generation).
  7. Core dumps to Flash are not available if PSRAM is used for task stacks.
  8. If core dump is configured to be stored in flash and custom partition table is used add
  9. corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
  10. in the components/partition_table directory.
  11. config ESP_COREDUMP_ENABLE_TO_FLASH
  12. bool "Flash"
  13. depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
  14. select ESP_COREDUMP_ENABLE
  15. config ESP_COREDUMP_ENABLE_TO_UART
  16. bool "UART"
  17. select ESP_COREDUMP_ENABLE
  18. config ESP_COREDUMP_ENABLE_TO_NONE
  19. bool "None"
  20. endchoice
  21. choice ESP_COREDUMP_DATA_FORMAT
  22. prompt "Core dump data format"
  23. default ESP_COREDUMP_DATA_FORMAT_ELF
  24. depends on !ESP_COREDUMP_ENABLE_TO_NONE
  25. help
  26. Select the data format for core dump.
  27. config ESP_COREDUMP_DATA_FORMAT_BIN
  28. bool "Binary format"
  29. config ESP_COREDUMP_DATA_FORMAT_ELF
  30. bool "ELF format"
  31. endchoice
  32. choice ESP_COREDUMP_CHECKSUM
  33. prompt "Core dump data integrity check"
  34. default ESP_COREDUMP_CHECKSUM_CRC32
  35. depends on !ESP_COREDUMP_ENABLE_TO_NONE
  36. help
  37. Select the integrity check for the core dump.
  38. config ESP_COREDUMP_CHECKSUM_CRC32
  39. bool "Use CRC32 for integrity verification"
  40. config ESP_COREDUMP_CHECKSUM_SHA256
  41. bool "Use SHA256 for integrity verification"
  42. depends on ESP_COREDUMP_DATA_FORMAT_ELF && IDF_TARGET_ESP32
  43. endchoice
  44. config ESP_COREDUMP_CHECK_BOOT
  45. bool "Check core dump data integrity on boot"
  46. default y
  47. depends on ESP_COREDUMP_ENABLE_TO_FLASH
  48. help
  49. When enabled, if any data are found on the flash core dump partition,
  50. they will be checked by calculating their checksum.
  51. config ESP_COREDUMP_ENABLE
  52. bool
  53. default F
  54. help
  55. Enables/disable core dump module.
  56. config ESP_COREDUMP_MAX_TASKS_NUM
  57. int "Maximum number of tasks"
  58. depends on ESP_COREDUMP_ENABLE
  59. default 64
  60. help
  61. Maximum number of tasks snapshots in core dump.
  62. config ESP_COREDUMP_UART_DELAY
  63. int "Delay before print to UART"
  64. depends on ESP_COREDUMP_ENABLE_TO_UART
  65. default 0
  66. help
  67. Config delay (in ms) before printing core dump to UART.
  68. Delay can be interrupted by pressing Enter key.
  69. config ESP_COREDUMP_STACK_SIZE
  70. int "Reserved stack size"
  71. depends on ESP_COREDUMP_ENABLE
  72. # Temporarily disable this feature on Xtensa boards as switching stack
  73. # pointer triggers an exception (IDF-2797)
  74. depends on IDF_TARGET_ARCH_RISCV
  75. default 0
  76. help
  77. Size of the memory to be reserved for core dump stack. If 0 core dump process will run on
  78. the stack of crashed task/ISR, otherwise special stack will be allocated.
  79. To ensure that core dump itself will not overflow task/ISR stack set this to the value above 800.
  80. NOTE: It eats DRAM.
  81. choice ESP_COREDUMP_DECODE
  82. prompt "Handling of UART core dumps in IDF Monitor"
  83. depends on ESP_COREDUMP_ENABLE_TO_UART
  84. config ESP_COREDUMP_DECODE_INFO
  85. bool "Decode and show summary (info_corefile)"
  86. config ESP_COREDUMP_DECODE_DISABLE
  87. bool "Don't decode"
  88. endchoice
  89. config ESP_COREDUMP_DECODE
  90. string
  91. default "disable" if ESP_COREDUMP_DECODE_DISABLE
  92. default "info" if ESP_COREDUMP_DECODE_INFO
  93. endmenu