test_sd.c 20 KB

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  1. // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
  2. //
  3. // Licensed under the Apache License, Version 2.0 (the "License");
  4. // you may not use this file except in compliance with the License.
  5. // You may obtain a copy of the License at
  6. //
  7. // http://www.apache.org/licenses/LICENSE-2.0
  8. //
  9. // Unless required by applicable law or agreed to in writing, software
  10. // distributed under the License is distributed on an "AS IS" BASIS,
  11. // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  12. // See the License for the specific language governing permissions and
  13. // limitations under the License.
  14. #include <stdio.h>
  15. #include <stdlib.h>
  16. #include <string.h>
  17. #include <time.h>
  18. #include <sys/time.h>
  19. #include <unistd.h>
  20. #include "unity.h"
  21. #include "driver/gpio.h"
  22. #include "soc/soc_caps.h"
  23. #if SOC_SDMMC_HOST_SUPPORTED
  24. #include "driver/sdmmc_host.h"
  25. #endif
  26. #include "driver/sdspi_host.h"
  27. #include "driver/sdmmc_defs.h"
  28. #include "sdmmc_cmd.h"
  29. #include "esp_log.h"
  30. #include "esp_heap_caps.h"
  31. #include "esp_rom_gpio.h"
  32. // Can't test eMMC (slot 0) and PSRAM together
  33. #ifndef CONFIG_SPIRAM
  34. #define WITH_EMMC_TEST
  35. #endif
  36. /* power supply enable pin */
  37. #define SD_TEST_BOARD_VSEL_EN_GPIO 27
  38. /* power supply voltage select pin */
  39. #define SD_TEST_BOARD_VSEL_GPIO 26
  40. #define SD_TEST_BOARD_VSEL_3V3 1
  41. #define SD_TEST_BOARD_VSEL_1V8 0
  42. #define TEST_SDSPI_DMACHAN 1
  43. /* time to wait for reset / power-on */
  44. #define SD_TEST_BOARD_PWR_RST_DELAY_MS 5
  45. #define SD_TEST_BOARD_PWR_ON_DELAY_MS 50
  46. /* gpio which is not connected to actual CD pin, used to simulate CD behavior */
  47. #define CD_WP_TEST_GPIO 18
  48. __attribute__((unused)) static void sd_test_board_power_on(void)
  49. {
  50. gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
  51. gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
  52. gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_OUTPUT);
  53. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
  54. usleep(SD_TEST_BOARD_PWR_RST_DELAY_MS * 1000);
  55. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 1);
  56. usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
  57. }
  58. __attribute__((unused)) static void sd_test_board_power_off(void)
  59. {
  60. gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
  61. gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
  62. gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, 0);
  63. gpio_set_direction(SD_TEST_BOARD_VSEL_EN_GPIO, GPIO_MODE_INPUT);
  64. }
  65. TEST_CASE("MMC_RSP_BITS", "[sd]")
  66. {
  67. uint32_t data[2] = { 0x01234567, 0x89abcdef };
  68. TEST_ASSERT_EQUAL_HEX32(0x7, MMC_RSP_BITS(data, 0, 4));
  69. TEST_ASSERT_EQUAL_HEX32(0x567, MMC_RSP_BITS(data, 0, 12));
  70. TEST_ASSERT_EQUAL_HEX32(0xf0, MMC_RSP_BITS(data, 28, 8));
  71. TEST_ASSERT_EQUAL_HEX32(0x3, MMC_RSP_BITS(data, 1, 3));
  72. TEST_ASSERT_EQUAL_HEX32(0x11, MMC_RSP_BITS(data, 59, 5));
  73. }
  74. #if SOC_SDMMC_HOST_SUPPORTED
  75. static void probe_sd(int slot, int width, int freq_khz, int ddr)
  76. {
  77. sd_test_board_power_on();
  78. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  79. config.slot = slot;
  80. config.max_freq_khz = freq_khz;
  81. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  82. if (width == 1) {
  83. config.flags = SDMMC_HOST_FLAG_1BIT;
  84. slot_config.width = 1;
  85. } else if (width == 4) {
  86. config.flags &= ~SDMMC_HOST_FLAG_8BIT;
  87. slot_config.width = 4;
  88. } else {
  89. assert(!ddr && "host driver does not support 8-line DDR mode yet");
  90. }
  91. if (!ddr) {
  92. config.flags &= ~SDMMC_HOST_FLAG_DDR;
  93. }
  94. TEST_ESP_OK(sdmmc_host_init());
  95. TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
  96. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  97. TEST_ASSERT_NOT_NULL(card);
  98. TEST_ESP_OK(sdmmc_card_init(&config, card));
  99. sdmmc_card_print_info(stdout, card);
  100. uint8_t* buffer = heap_caps_malloc(512, MALLOC_CAP_DMA);
  101. TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 0, 1));
  102. free(buffer);
  103. TEST_ESP_OK(sdmmc_host_deinit());
  104. free(card);
  105. sd_test_board_power_off();
  106. }
  107. TEST_CASE("probe SD, slot 1, 4-bit", "[sd][test_env=UT_T1_SDMODE]")
  108. {
  109. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_PROBING, 0);
  110. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_DEFAULT, 0);
  111. probe_sd(SDMMC_HOST_SLOT_1, 4, SDMMC_FREQ_HIGHSPEED, 0);
  112. }
  113. TEST_CASE("probe SD, slot 1, 1-bit", "[sd][test_env=UT_T1_SDMODE]")
  114. {
  115. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_PROBING, 0);
  116. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_DEFAULT, 0);
  117. probe_sd(SDMMC_HOST_SLOT_1, 1, SDMMC_FREQ_HIGHSPEED, 0);
  118. }
  119. #ifdef WITH_EMMC_TEST
  120. TEST_CASE("probe eMMC, slot 0, 4-bit, DDR", "[sd][test_env=EMMC]")
  121. {
  122. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 1);
  123. }
  124. TEST_CASE("probe eMMC, slot 0, 8-bit", "[sd][test_env=EMMC]")
  125. {
  126. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_PROBING, 0);
  127. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_DEFAULT, 0);
  128. probe_sd(SDMMC_HOST_SLOT_0, 8, SDMMC_FREQ_HIGHSPEED, 0);
  129. }
  130. #endif // WITH_EMMC_TEST
  131. TEST_CASE("probe SD, slot 0, 4-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
  132. {
  133. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_PROBING, 0);
  134. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_DEFAULT, 0);
  135. probe_sd(SDMMC_HOST_SLOT_0, 4, SDMMC_FREQ_HIGHSPEED, 0);
  136. }
  137. TEST_CASE("probe SD, slot 0, 1-bit", "[sd][test_env=UT_T1_SDCARD][ignore]")
  138. {
  139. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_PROBING, 0);
  140. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_DEFAULT, 0);
  141. probe_sd(SDMMC_HOST_SLOT_0, 1, SDMMC_FREQ_HIGHSPEED, 0);
  142. }
  143. #endif
  144. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  145. //No runners
  146. static void test_sdspi_init_bus(spi_host_device_t host, int mosi_pin, int miso_pin, int clk_pin, int dma_chan)
  147. {
  148. spi_bus_config_t bus_config = {
  149. .mosi_io_num = mosi_pin,
  150. .miso_io_num = miso_pin,
  151. .sclk_io_num = clk_pin,
  152. .quadwp_io_num = -1,
  153. .quadhd_io_num = -1,
  154. };
  155. esp_err_t err = spi_bus_initialize(host, &bus_config, dma_chan);
  156. TEST_ESP_OK(err);
  157. }
  158. static void test_sdspi_deinit_bus(spi_host_device_t host)
  159. {
  160. esp_err_t err = spi_bus_free(host);
  161. TEST_ESP_OK(err);
  162. }
  163. static void probe_core(int slot)
  164. {
  165. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  166. config.slot = slot;
  167. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  168. TEST_ASSERT_NOT_NULL(card);
  169. TEST_ESP_OK(sdmmc_card_init(&config, card));
  170. sdmmc_card_print_info(stdout, card);
  171. free(card);
  172. }
  173. static void probe_spi(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs)
  174. {
  175. sd_test_board_power_on();
  176. sdspi_dev_handle_t handle;
  177. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  178. dev_config.gpio_cs = pin_cs;
  179. test_sdspi_init_bus(dev_config.host_id, pin_mosi, pin_miso, pin_sck, TEST_SDSPI_DMACHAN);
  180. TEST_ESP_OK(sdspi_host_init());
  181. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  182. probe_core(handle);
  183. TEST_ESP_OK(sdspi_host_deinit());
  184. test_sdspi_deinit_bus(dev_config.host_id);
  185. sd_test_board_power_off();
  186. }
  187. static void probe_spi_legacy(int freq_khz, int pin_miso, int pin_mosi, int pin_sck, int pin_cs)
  188. {
  189. sd_test_board_power_on();
  190. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  191. sdspi_slot_config_t slot_config = SDSPI_SLOT_CONFIG_DEFAULT();
  192. slot_config.gpio_miso = pin_miso;
  193. slot_config.gpio_mosi = pin_mosi;
  194. slot_config.gpio_sck = pin_sck;
  195. slot_config.gpio_cs = pin_cs;
  196. TEST_ESP_OK(sdspi_host_init());
  197. TEST_ESP_OK(sdspi_host_init_slot(config.slot, &slot_config));
  198. probe_core(config.slot);
  199. TEST_ESP_OK(sdspi_host_deinit());
  200. sd_test_board_power_off();
  201. }
  202. TEST_CASE("probe SD in SPI mode, slot 1", "[sd][test_env=UT_T1_SPIMODE]")
  203. {
  204. probe_spi(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
  205. probe_spi_legacy(SDMMC_FREQ_DEFAULT, 2, 15, 14, 13);
  206. }
  207. TEST_CASE("probe SD in SPI mode, slot 0", "[sd][test_env=UT_T1_SDCARD][ignore]")
  208. {
  209. probe_spi(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
  210. probe_spi_legacy(SDMMC_FREQ_DEFAULT, 7, 11, 6, 10);
  211. }
  212. #endif //DISABLED(ESP32S2)
  213. // Fill buffer pointed to by 'dst' with 'count' 32-bit ints generated
  214. // from 'rand' with the starting value of 'seed'
  215. __attribute__((unused)) static void fill_buffer(uint32_t seed, uint8_t* dst, size_t count) {
  216. srand(seed);
  217. for (size_t i = 0; i < count; ++i) {
  218. uint32_t val = rand();
  219. memcpy(dst + i * sizeof(uint32_t), &val, sizeof(val));
  220. }
  221. }
  222. // Check if the buffer pointed to by 'dst' contains 'count' 32-bit
  223. // ints generated from 'rand' with the starting value of 'seed'
  224. __attribute__((unused)) static void check_buffer(uint32_t seed, const uint8_t* src, size_t count) {
  225. srand(seed);
  226. for (size_t i = 0; i < count; ++i) {
  227. uint32_t val;
  228. memcpy(&val, src + i * sizeof(uint32_t), sizeof(val));
  229. TEST_ASSERT_EQUAL_HEX32(rand(), val);
  230. }
  231. }
  232. __attribute__((unused)) static void do_single_write_read_test(sdmmc_card_t* card,
  233. size_t start_block, size_t block_count, size_t alignment)
  234. {
  235. size_t block_size = card->csd.sector_size;
  236. size_t total_size = block_size * block_count;
  237. printf(" %8d | %3d | %d | %4.1f ", start_block, block_count, alignment, total_size / 1024.0f);
  238. uint32_t* buffer = heap_caps_malloc(total_size + 4, MALLOC_CAP_DMA);
  239. size_t offset = alignment % 4;
  240. uint8_t* c_buffer = (uint8_t*) buffer + offset;
  241. fill_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
  242. struct timeval t_start_wr;
  243. gettimeofday(&t_start_wr, NULL);
  244. TEST_ESP_OK(sdmmc_write_sectors(card, c_buffer, start_block, block_count));
  245. struct timeval t_stop_wr;
  246. gettimeofday(&t_stop_wr, NULL);
  247. float time_wr = 1e3f * (t_stop_wr.tv_sec - t_start_wr.tv_sec) + 1e-3f * (t_stop_wr.tv_usec - t_start_wr.tv_usec);
  248. memset(buffer, 0xbb, total_size + 4);
  249. struct timeval t_start_rd;
  250. gettimeofday(&t_start_rd, NULL);
  251. TEST_ESP_OK(sdmmc_read_sectors(card, c_buffer, start_block, block_count));
  252. struct timeval t_stop_rd;
  253. gettimeofday(&t_stop_rd, NULL);
  254. float time_rd = 1e3f * (t_stop_rd.tv_sec - t_start_rd.tv_sec) + 1e-3f * (t_stop_rd.tv_usec - t_start_rd.tv_usec);
  255. printf(" | %6.2f | %5.2f | %6.2f | %5.2f\n",
  256. time_wr, total_size / (time_wr / 1000) / (1024 * 1024),
  257. time_rd, total_size / (time_rd / 1000) / (1024 * 1024));
  258. check_buffer(start_block, c_buffer, total_size / sizeof(buffer[0]));
  259. free(buffer);
  260. }
  261. __attribute__((unused)) static void read_write_test(sdmmc_card_t* card)
  262. {
  263. sdmmc_card_print_info(stdout, card);
  264. printf(" sector | count | align | size(kB) | wr_time(ms) | wr_speed(MB/s) | rd_time(ms) | rd_speed(MB/s)\n");
  265. do_single_write_read_test(card, 0, 1, 4);
  266. do_single_write_read_test(card, 0, 4, 4);
  267. do_single_write_read_test(card, 1, 16, 4);
  268. do_single_write_read_test(card, 16, 32, 4);
  269. do_single_write_read_test(card, 48, 64, 4);
  270. do_single_write_read_test(card, 128, 128, 4);
  271. do_single_write_read_test(card, card->csd.capacity - 64, 32, 4);
  272. do_single_write_read_test(card, card->csd.capacity - 64, 64, 4);
  273. do_single_write_read_test(card, card->csd.capacity - 8, 1, 4);
  274. do_single_write_read_test(card, card->csd.capacity/2, 1, 4);
  275. do_single_write_read_test(card, card->csd.capacity/2, 4, 4);
  276. do_single_write_read_test(card, card->csd.capacity/2, 8, 4);
  277. do_single_write_read_test(card, card->csd.capacity/2, 16, 4);
  278. do_single_write_read_test(card, card->csd.capacity/2, 32, 4);
  279. do_single_write_read_test(card, card->csd.capacity/2, 64, 4);
  280. do_single_write_read_test(card, card->csd.capacity/2, 128, 4);
  281. do_single_write_read_test(card, card->csd.capacity/2, 1, 1);
  282. do_single_write_read_test(card, card->csd.capacity/2, 8, 1);
  283. do_single_write_read_test(card, card->csd.capacity/2, 128, 1);
  284. }
  285. #if SOC_SDMMC_HOST_SUPPORTED
  286. void test_sd_rw_blocks(int slot, int width)
  287. {
  288. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  289. config.max_freq_khz = SDMMC_FREQ_HIGHSPEED;
  290. config.slot = slot;
  291. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  292. if (width != 0) {
  293. slot_config.width = width;
  294. }
  295. if (slot_config.width == 8) {
  296. config.flags &= ~SDMMC_HOST_FLAG_DDR;
  297. }
  298. TEST_ESP_OK(sdmmc_host_init());
  299. TEST_ESP_OK(sdmmc_host_init_slot(slot, &slot_config));
  300. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  301. TEST_ASSERT_NOT_NULL(card);
  302. TEST_ESP_OK(sdmmc_card_init(&config, card));
  303. read_write_test(card);
  304. free(card);
  305. TEST_ESP_OK(sdmmc_host_deinit());
  306. }
  307. TEST_CASE("SDMMC read/write test (SD slot 1)", "[sd][test_env=UT_T1_SDMODE]")
  308. {
  309. sd_test_board_power_on();
  310. test_sd_rw_blocks(1, 4);
  311. sd_test_board_power_off();
  312. }
  313. #ifdef WITH_EMMC_TEST
  314. TEST_CASE("SDMMC read/write test (eMMC slot 0, 4 line DDR)", "[sd][test_env=EMMC]")
  315. {
  316. sd_test_board_power_on();
  317. test_sd_rw_blocks(0, 4);
  318. sd_test_board_power_off();
  319. }
  320. TEST_CASE("SDMMC read/write test (eMMC slot 0, 8 line)", "[sd][test_env=EMMC]")
  321. {
  322. sd_test_board_power_on();
  323. test_sd_rw_blocks(0, 8);
  324. sd_test_board_power_off();
  325. }
  326. #endif // WITH_EMMC_TEST
  327. #endif // SDMMC_HOST_SUPPORTED
  328. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  329. //No runners
  330. TEST_CASE("SDMMC read/write test (SD slot 1, in SPI mode)", "[sdspi][test_env=UT_T1_SPIMODE]")
  331. {
  332. sd_test_board_power_on();
  333. sdspi_dev_handle_t handle;
  334. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  335. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  336. TEST_ESP_OK(sdspi_host_init());
  337. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  338. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  339. config.slot = handle;
  340. // This test can only run under 20MHz on ESP32, because the runner connects the card to
  341. // non-IOMUX pins of HSPI.
  342. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  343. TEST_ASSERT_NOT_NULL(card);
  344. TEST_ESP_OK(sdmmc_card_init(&config, card));
  345. read_write_test(card);
  346. TEST_ESP_OK(sdspi_host_deinit());
  347. free(card);
  348. test_sdspi_deinit_bus(dev_config.host_id);
  349. sd_test_board_power_off();
  350. }
  351. #endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  352. #if SOC_SDMMC_HOST_SUPPORTED
  353. TEST_CASE("reads and writes with an unaligned buffer", "[sd][test_env=UT_T1_SDMODE]")
  354. {
  355. sd_test_board_power_on();
  356. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  357. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  358. TEST_ESP_OK(sdmmc_host_init());
  359. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  360. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  361. TEST_ASSERT_NOT_NULL(card);
  362. TEST_ESP_OK(sdmmc_card_init(&config, card));
  363. const size_t buffer_size = 4096;
  364. const size_t block_count = buffer_size / 512;
  365. const size_t extra = 4;
  366. uint8_t* buffer = heap_caps_malloc(buffer_size + extra, MALLOC_CAP_DMA);
  367. // Check read behavior: do aligned write, then unaligned read
  368. const uint32_t seed = 0x89abcdef;
  369. fill_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
  370. TEST_ESP_OK(sdmmc_write_sectors(card, buffer, 0, block_count));
  371. memset(buffer, 0xcc, buffer_size + extra);
  372. TEST_ESP_OK(sdmmc_read_sectors(card, buffer + 1, 0, block_count));
  373. check_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
  374. // Check write behavior: do unaligned write, then aligned read
  375. fill_buffer(seed, buffer + 1, buffer_size / sizeof(uint32_t));
  376. TEST_ESP_OK(sdmmc_write_sectors(card, buffer + 1, 8, block_count));
  377. memset(buffer, 0xcc, buffer_size + extra);
  378. TEST_ESP_OK(sdmmc_read_sectors(card, buffer, 8, block_count));
  379. check_buffer(seed, buffer, buffer_size / sizeof(uint32_t));
  380. free(buffer);
  381. free(card);
  382. TEST_ESP_OK(sdmmc_host_deinit());
  383. sd_test_board_power_off();
  384. }
  385. #endif
  386. __attribute__((unused)) static void test_cd_input(int gpio_cd_num, const sdmmc_host_t* config)
  387. {
  388. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  389. TEST_ASSERT_NOT_NULL(card);
  390. // SDMMC host should have configured CD as input.
  391. // Enable output as well (not using the driver, to avoid touching input
  392. // enable bits).
  393. esp_rom_gpio_connect_out_signal(gpio_cd_num, SIG_GPIO_OUT_IDX, false, false);
  394. REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_cd_num));
  395. // Check that card initialization fails if CD is high
  396. REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_cd_num));
  397. usleep(1000);
  398. TEST_ESP_ERR(ESP_ERR_NOT_FOUND, sdmmc_card_init(config, card));
  399. // Check that card initialization succeeds if CD is low
  400. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_cd_num));
  401. usleep(1000);
  402. TEST_ESP_OK(sdmmc_card_init(config, card));
  403. free(card);
  404. }
  405. #if SOC_SDMMC_HOST_SUPPORTED
  406. TEST_CASE("CD input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
  407. {
  408. sd_test_board_power_on();
  409. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  410. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  411. slot_config.gpio_cd = CD_WP_TEST_GPIO;
  412. TEST_ESP_OK(sdmmc_host_init());
  413. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  414. test_cd_input(CD_WP_TEST_GPIO, &config);
  415. TEST_ESP_OK(sdmmc_host_deinit());
  416. sd_test_board_power_off();
  417. }
  418. #endif
  419. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  420. //No runners
  421. TEST_CASE("CD input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
  422. {
  423. sd_test_board_power_on();
  424. sdspi_dev_handle_t handle;
  425. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  426. dev_config.gpio_cd = CD_WP_TEST_GPIO;
  427. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  428. TEST_ESP_OK(sdspi_host_init());
  429. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  430. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  431. config.slot = handle;
  432. test_cd_input(CD_WP_TEST_GPIO, &config);
  433. TEST_ESP_OK(sdspi_host_deinit());
  434. test_sdspi_deinit_bus(dev_config.host_id);
  435. sd_test_board_power_off();
  436. }
  437. #endif //DISABLED_FOR_TARGETS(ESP32S2)
  438. __attribute__((unused)) static void test_wp_input(int gpio_wp_num, const sdmmc_host_t* config)
  439. {
  440. sdmmc_card_t* card = malloc(sizeof(sdmmc_card_t));
  441. TEST_ASSERT_NOT_NULL(card);
  442. // SDMMC host should have configured WP as input.
  443. // Enable output as well (not using the driver, to avoid touching input
  444. // enable bits).
  445. esp_rom_gpio_connect_out_signal(gpio_wp_num, SIG_GPIO_OUT_IDX, false, false);
  446. REG_WRITE(GPIO_ENABLE_W1TS_REG, BIT(gpio_wp_num));
  447. // Check that the card can be initialized with WP low
  448. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
  449. TEST_ESP_OK(sdmmc_card_init(config, card));
  450. uint32_t* data = heap_caps_calloc(1, 512, MALLOC_CAP_DMA);
  451. // Check that card write succeeds if WP is high
  452. REG_WRITE(GPIO_OUT_W1TS_REG, BIT(gpio_wp_num));
  453. usleep(1000);
  454. TEST_ESP_OK(sdmmc_write_sectors(card, &data, 0, 1));
  455. // Check that write fails if WP is low
  456. REG_WRITE(GPIO_OUT_W1TC_REG, BIT(gpio_wp_num));
  457. usleep(1000);
  458. TEST_ESP_ERR(ESP_ERR_INVALID_STATE, sdmmc_write_sectors(card, &data, 0, 1));
  459. // ...but reads still work
  460. TEST_ESP_OK(sdmmc_read_sectors(card, &data, 0, 1));
  461. free(data);
  462. free(card);
  463. }
  464. #if SOC_SDMMC_HOST_SUPPORTED
  465. TEST_CASE("WP input works in SD mode", "[sd][test_env=UT_T1_SDMODE]")
  466. {
  467. sd_test_board_power_on();
  468. sdmmc_host_t config = SDMMC_HOST_DEFAULT();
  469. sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT();
  470. slot_config.gpio_wp = CD_WP_TEST_GPIO;
  471. TEST_ESP_OK(sdmmc_host_init());
  472. TEST_ESP_OK(sdmmc_host_init_slot(SDMMC_HOST_SLOT_1, &slot_config));
  473. test_wp_input(CD_WP_TEST_GPIO, &config);
  474. TEST_ESP_OK(sdmmc_host_deinit());
  475. sd_test_board_power_off();
  476. }
  477. #endif
  478. #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
  479. //No runners
  480. TEST_CASE("WP input works in SPI mode", "[sd][test_env=UT_T1_SPIMODE]")
  481. {
  482. sd_test_board_power_on();
  483. sdspi_dev_handle_t handle;
  484. sdspi_device_config_t dev_config = SDSPI_DEVICE_CONFIG_DEFAULT();
  485. dev_config.gpio_wp = CD_WP_TEST_GPIO;
  486. test_sdspi_init_bus(dev_config.host_id, GPIO_NUM_15, GPIO_NUM_2, GPIO_NUM_14, TEST_SDSPI_DMACHAN);
  487. TEST_ESP_OK(sdspi_host_init());
  488. TEST_ESP_OK(sdspi_host_init_device(&dev_config, &handle));
  489. sdmmc_host_t config = SDSPI_HOST_DEFAULT();
  490. config.slot = handle;
  491. test_wp_input(CD_WP_TEST_GPIO, &config);
  492. TEST_ESP_OK(sdspi_host_deinit());
  493. test_sdspi_deinit_bus(dev_config.host_id);
  494. sd_test_board_power_off();
  495. }
  496. #endif //DISABLED_FOR_TARGETS(ESP32S2)