gdma.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773
  1. /*
  2. * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. // #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  7. #include <stdlib.h>
  8. #include <sys/cdefs.h>
  9. #include "freertos/FreeRTOS.h"
  10. #include "freertos/task.h"
  11. #include "soc/soc_caps.h"
  12. #include "soc/periph_defs.h"
  13. #include "esp_intr_alloc.h"
  14. #include "esp_log.h"
  15. #include "esp_check.h"
  16. #include "driver/periph_ctrl.h"
  17. #include "esp_private/gdma.h"
  18. #include "hal/gdma_hal.h"
  19. #include "hal/gdma_ll.h"
  20. #include "soc/gdma_periph.h"
  21. static const char *TAG = "gdma";
  22. #define GDMA_INVALID_PERIPH_TRIG (0x3F)
  23. #define SEARCH_REQUEST_RX_CHANNEL (1 << 0)
  24. #define SEARCH_REQUEST_TX_CHANNEL (1 << 1)
  25. typedef struct gdma_platform_t gdma_platform_t;
  26. typedef struct gdma_group_t gdma_group_t;
  27. typedef struct gdma_pair_t gdma_pair_t;
  28. typedef struct gdma_channel_t gdma_channel_t;
  29. typedef struct gdma_tx_channel_t gdma_tx_channel_t;
  30. typedef struct gdma_rx_channel_t gdma_rx_channel_t;
  31. /**
  32. * GDMA driver consists of there object class, namely: Group, Pair and Channel.
  33. * Channel is allocated when user calls `gdma_new_channel`, its lifecycle is maintained by user.
  34. * Pair and Group are all lazy allocated, their life cycles are maintained by this driver.
  35. * We use reference count to track their life cycles, i.e. the driver will free their memory only when their reference count reached to 0.
  36. *
  37. * We don't use an all-in-one spin lock in this driver, instead, we created different spin locks at different level.
  38. * For platform, it has a spinlock, which is used to protect the group handle slots and reference count of each group.
  39. * For group, it has a spinlock, which is used to protect group level stuffs, e.g. hal object, pair handle slots and reference count of each pair.
  40. * For pair, it has a spinlock, which is used to protect pair level stuffs, e.g. channel handle slots, occupy code.
  41. */
  42. struct gdma_platform_t {
  43. portMUX_TYPE spinlock; // platform level spinlock
  44. gdma_group_t *groups[SOC_GDMA_GROUPS]; // array of GDMA group instances
  45. int group_ref_counts[SOC_GDMA_GROUPS]; // reference count used to protect group install/uninstall
  46. };
  47. struct gdma_group_t {
  48. int group_id; // Group ID, index from 0
  49. gdma_hal_context_t hal; // HAL instance is at group level
  50. portMUX_TYPE spinlock; // group level spinlock
  51. gdma_pair_t *pairs[SOC_GDMA_PAIRS_PER_GROUP]; // handles of GDMA pairs
  52. int pair_ref_counts[SOC_GDMA_PAIRS_PER_GROUP]; // reference count used to protect pair install/uninstall
  53. };
  54. struct gdma_pair_t {
  55. gdma_group_t *group; // which group the pair belongs to
  56. int pair_id; // Pair ID, index from 0
  57. gdma_tx_channel_t *tx_chan; // pointer of tx channel in the pair
  58. gdma_rx_channel_t *rx_chan; // pointer of rx channel in the pair
  59. int occupy_code; // each bit indicates which channel has been occupied (an occupied channel will be skipped during channel search)
  60. portMUX_TYPE spinlock; // pair level spinlock
  61. };
  62. struct gdma_channel_t {
  63. gdma_pair_t *pair; // which pair the channel belongs to
  64. intr_handle_t intr; // per-channel interrupt handle
  65. gdma_channel_direction_t direction; // channel direction
  66. int periph_id; // Peripheral instance ID, indicates which peripheral is connected to this GDMA channel
  67. size_t sram_alignment; // alignment for memory in SRAM
  68. size_t psram_alignment; // alignment for memory in PSRAM
  69. esp_err_t (*del)(gdma_channel_t *channel); // channel deletion function, it's polymorphic, see `gdma_del_tx_channel` or `gdma_del_rx_channel`
  70. };
  71. struct gdma_tx_channel_t {
  72. gdma_channel_t base; // GDMA channel, base class
  73. void *user_data; // user registered DMA event data
  74. gdma_event_callback_t on_trans_eof; // TX EOF callback
  75. };
  76. struct gdma_rx_channel_t {
  77. gdma_channel_t base; // GDMA channel, base class
  78. void *user_data; // user registered DMA event data
  79. gdma_event_callback_t on_recv_eof; // RX EOF callback
  80. };
  81. static gdma_group_t *gdma_acquire_group_handle(int group_id);
  82. static void gdma_release_group_handle(gdma_group_t *group);
  83. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id);
  84. static void gdma_release_pair_handle(gdma_pair_t *pair);
  85. static void gdma_uninstall_group(gdma_group_t *group);
  86. static void gdma_uninstall_pair(gdma_pair_t *pair);
  87. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel);
  88. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel);
  89. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan);
  90. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan);
  91. // gdma driver platform
  92. static gdma_platform_t s_platform = {
  93. .spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED,
  94. .groups = {} // groups will be lazy installed
  95. };
  96. esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_channel_handle_t *ret_chan)
  97. {
  98. esp_err_t ret = ESP_OK;
  99. gdma_tx_channel_t *alloc_tx_channel = NULL;
  100. gdma_rx_channel_t *alloc_rx_channel = NULL;
  101. int search_code = 0;
  102. gdma_pair_t *pair = NULL;
  103. gdma_group_t *group = NULL;
  104. ESP_GOTO_ON_FALSE(config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  105. if (config->flags.reserve_sibling) {
  106. search_code = SEARCH_REQUEST_RX_CHANNEL | SEARCH_REQUEST_TX_CHANNEL; // search for a pair of channels
  107. }
  108. if (config->direction == GDMA_CHANNEL_DIRECTION_TX) {
  109. search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only
  110. alloc_tx_channel = calloc(1, sizeof(gdma_tx_channel_t));
  111. ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel");
  112. } else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) {
  113. search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only
  114. alloc_rx_channel = calloc(1, sizeof(gdma_rx_channel_t));
  115. ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel");
  116. }
  117. if (config->sibling_chan) {
  118. pair = config->sibling_chan->pair;
  119. ESP_GOTO_ON_FALSE(pair, ESP_ERR_INVALID_ARG, err, TAG, "invalid sibling channel");
  120. ESP_GOTO_ON_FALSE(config->sibling_chan->direction != config->direction, ESP_ERR_INVALID_ARG, err, TAG, "sibling channel should have a different direction");
  121. group = pair->group;
  122. portENTER_CRITICAL(&group->spinlock);
  123. group->pair_ref_counts[pair->pair_id]++; // channel obtains a reference to pair
  124. portEXIT_CRITICAL(&group->spinlock);
  125. goto search_done; // skip the search path below if user has specify a sibling channel
  126. }
  127. for (int i = 0; i < SOC_GDMA_GROUPS && search_code; i++) { // loop to search group
  128. group = gdma_acquire_group_handle(i);
  129. for (int j = 0; j < SOC_GDMA_PAIRS_PER_GROUP && search_code && group; j++) { // loop to search pair
  130. pair = gdma_acquire_pair_handle(group, j);
  131. if (pair) {
  132. portENTER_CRITICAL(&pair->spinlock);
  133. if (!(search_code & pair->occupy_code)) { // pair has suitable position for acquired channel(s)
  134. pair->occupy_code |= search_code;
  135. search_code = 0; // exit search loop
  136. }
  137. portEXIT_CRITICAL(&pair->spinlock);
  138. if (!search_code) {
  139. portENTER_CRITICAL(&group->spinlock);
  140. group->pair_ref_counts[j]++; // channel obtains a reference to pair
  141. portEXIT_CRITICAL(&group->spinlock);
  142. }
  143. }
  144. gdma_release_pair_handle(pair);
  145. } // loop used to search pair
  146. gdma_release_group_handle(group);
  147. } // loop used to search group
  148. ESP_GOTO_ON_FALSE(search_code == 0, ESP_ERR_NOT_FOUND, err, TAG, "no free gdma channel, search code=%d", search_code);
  149. search_done:
  150. // register TX channel
  151. if (alloc_tx_channel) {
  152. pair->tx_chan = alloc_tx_channel;
  153. alloc_tx_channel->base.pair = pair;
  154. alloc_tx_channel->base.direction = GDMA_CHANNEL_DIRECTION_TX;
  155. alloc_tx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  156. alloc_tx_channel->base.del = gdma_del_tx_channel; // set channel deletion function
  157. *ret_chan = &alloc_tx_channel->base; // return the installed channel
  158. }
  159. // register RX channel
  160. if (alloc_rx_channel) {
  161. pair->rx_chan = alloc_rx_channel;
  162. alloc_rx_channel->base.pair = pair;
  163. alloc_rx_channel->base.direction = GDMA_CHANNEL_DIRECTION_RX;
  164. alloc_rx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  165. alloc_rx_channel->base.del = gdma_del_rx_channel; // set channel deletion function
  166. *ret_chan = &alloc_rx_channel->base; // return the installed channel
  167. }
  168. ESP_LOGD(TAG, "new %s channel (%d,%d) at %p", (config->direction == GDMA_CHANNEL_DIRECTION_TX) ? "tx" : "rx",
  169. group->group_id, pair->pair_id, *ret_chan);
  170. return ESP_OK;
  171. err:
  172. if (alloc_tx_channel) {
  173. free(alloc_tx_channel);
  174. }
  175. if (alloc_rx_channel) {
  176. free(alloc_rx_channel);
  177. }
  178. return ret;
  179. }
  180. esp_err_t gdma_del_channel(gdma_channel_handle_t dma_chan)
  181. {
  182. esp_err_t ret = ESP_OK;
  183. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  184. ret = dma_chan->del(dma_chan); // call `gdma_del_tx_channel` or `gdma_del_rx_channel`
  185. err:
  186. return ret;
  187. }
  188. esp_err_t gdma_get_channel_id(gdma_channel_handle_t dma_chan, int *channel_id)
  189. {
  190. esp_err_t ret = ESP_OK;
  191. gdma_pair_t *pair = NULL;
  192. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  193. pair = dma_chan->pair;
  194. *channel_id = pair->pair_id;
  195. err:
  196. return ret;
  197. }
  198. esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_periph)
  199. {
  200. esp_err_t ret = ESP_OK;
  201. gdma_pair_t *pair = NULL;
  202. gdma_group_t *group = NULL;
  203. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  204. ESP_GOTO_ON_FALSE(dma_chan->periph_id == GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "channel is using by peripheral: %d", dma_chan->periph_id);
  205. pair = dma_chan->pair;
  206. group = pair->group;
  207. dma_chan->periph_id = trig_periph.instance_id;
  208. // enable/disable m2m mode
  209. gdma_ll_enable_m2m_mode(group->hal.dev, pair->pair_id, trig_periph.periph == GDMA_TRIG_PERIPH_M2M);
  210. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  211. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  212. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  213. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  214. }
  215. } else {
  216. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  217. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  218. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  219. }
  220. }
  221. err:
  222. return ret;
  223. }
  224. esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan)
  225. {
  226. esp_err_t ret = ESP_OK;
  227. gdma_pair_t *pair = NULL;
  228. gdma_group_t *group = NULL;
  229. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  230. ESP_GOTO_ON_FALSE(dma_chan->periph_id != GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "no peripheral is connected to the channel");
  231. pair = dma_chan->pair;
  232. group = pair->group;
  233. dma_chan->periph_id = GDMA_INVALID_PERIPH_TRIG;
  234. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  235. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  236. } else {
  237. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  238. }
  239. err:
  240. return ret;
  241. }
  242. esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability)
  243. {
  244. esp_err_t ret = ESP_OK;
  245. gdma_pair_t *pair = NULL;
  246. gdma_group_t *group = NULL;
  247. bool en_burst = true;
  248. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  249. pair = dma_chan->pair;
  250. group = pair->group;
  251. size_t sram_alignment = ability->sram_trans_align;
  252. size_t psram_alignment = ability->psram_trans_align;
  253. // alignment should be 2^n
  254. ESP_GOTO_ON_FALSE((sram_alignment & (sram_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, err, TAG, "invalid sram alignment: %zu", sram_alignment);
  255. #if SOC_GDMA_SUPPORT_PSRAM
  256. int block_size_index = 0;
  257. switch (psram_alignment) {
  258. case 64: // 64 Bytes alignment
  259. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_64B;
  260. break;
  261. case 32: // 32 Bytes alignment
  262. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_32B;
  263. break;
  264. case 16: // 16 Bytes alignment
  265. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  266. break;
  267. case 0: // no alignment is requirement
  268. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  269. psram_alignment = SOC_GDMA_PSRAM_MIN_ALIGN; // fall back to minimal alignment
  270. break;
  271. default:
  272. ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid psram alignment: %zu", psram_alignment);
  273. break;
  274. }
  275. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  276. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  277. // TX channel can always enable burst mode, no matter data alignment
  278. gdma_ll_tx_enable_data_burst(group->hal.dev, pair->pair_id, true);
  279. gdma_ll_tx_enable_descriptor_burst(group->hal.dev, pair->pair_id, true);
  280. #if SOC_GDMA_SUPPORT_PSRAM
  281. gdma_ll_tx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  282. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  283. } else {
  284. // RX channel burst mode depends on specific data alignment
  285. en_burst = sram_alignment >= 4;
  286. gdma_ll_rx_enable_data_burst(group->hal.dev, pair->pair_id, en_burst);
  287. gdma_ll_rx_enable_descriptor_burst(group->hal.dev, pair->pair_id, en_burst);
  288. #if SOC_GDMA_SUPPORT_PSRAM
  289. gdma_ll_rx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  290. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  291. }
  292. dma_chan->sram_alignment = sram_alignment;
  293. dma_chan->psram_alignment = psram_alignment;
  294. ESP_LOGD(TAG, "%s channel (%d,%d), (%zu:%zu) bytes aligned, burst %s", dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX ? "tx" : "rx",
  295. group->group_id, pair->pair_id, sram_alignment, psram_alignment, en_burst ? "enabled" : "disabled");
  296. err:
  297. return ret;
  298. }
  299. esp_err_t gdma_apply_strategy(gdma_channel_handle_t dma_chan, const gdma_strategy_config_t *config)
  300. {
  301. esp_err_t ret = ESP_OK;
  302. gdma_pair_t *pair = NULL;
  303. gdma_group_t *group = NULL;
  304. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  305. pair = dma_chan->pair;
  306. group = pair->group;
  307. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  308. gdma_ll_tx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  309. gdma_ll_tx_enable_auto_write_back(group->hal.dev, pair->pair_id, config->auto_update_desc);
  310. } else {
  311. gdma_ll_rx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  312. }
  313. err:
  314. return ret;
  315. }
  316. esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_tx_event_callbacks_t *cbs, void *user_data)
  317. {
  318. esp_err_t ret = ESP_OK;
  319. gdma_pair_t *pair = NULL;
  320. gdma_group_t *group = NULL;
  321. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  322. pair = dma_chan->pair;
  323. group = pair->group;
  324. gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base);
  325. // lazy install interrupt service
  326. ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed");
  327. // enable/disable GDMA interrupt events for TX channel
  328. portENTER_CRITICAL(&pair->spinlock);
  329. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_TX_EOF, cbs->on_trans_eof != NULL);
  330. portEXIT_CRITICAL(&pair->spinlock);
  331. tx_chan->on_trans_eof = cbs->on_trans_eof;
  332. tx_chan->user_data = user_data;
  333. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  334. err:
  335. return ret;
  336. }
  337. esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_rx_event_callbacks_t *cbs, void *user_data)
  338. {
  339. esp_err_t ret = ESP_OK;
  340. gdma_pair_t *pair = NULL;
  341. gdma_group_t *group = NULL;
  342. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  343. pair = dma_chan->pair;
  344. group = pair->group;
  345. gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base);
  346. // lazy install interrupt service
  347. ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed");
  348. // enable/disable GDMA interrupt events for RX channel
  349. portENTER_CRITICAL(&pair->spinlock);
  350. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_RX_SUC_EOF, cbs->on_recv_eof != NULL);
  351. portEXIT_CRITICAL(&pair->spinlock);
  352. rx_chan->on_recv_eof = cbs->on_recv_eof;
  353. rx_chan->user_data = user_data;
  354. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  355. err:
  356. return ret;
  357. }
  358. esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
  359. {
  360. esp_err_t ret = ESP_OK;
  361. gdma_pair_t *pair = NULL;
  362. gdma_group_t *group = NULL;
  363. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  364. pair = dma_chan->pair;
  365. group = pair->group;
  366. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  367. gdma_ll_rx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  368. gdma_ll_rx_start(group->hal.dev, pair->pair_id);
  369. } else {
  370. gdma_ll_tx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  371. gdma_ll_tx_start(group->hal.dev, pair->pair_id);
  372. }
  373. err:
  374. return ret;
  375. }
  376. esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
  377. {
  378. esp_err_t ret = ESP_OK;
  379. gdma_pair_t *pair = NULL;
  380. gdma_group_t *group = NULL;
  381. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  382. pair = dma_chan->pair;
  383. group = pair->group;
  384. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  385. gdma_ll_rx_stop(group->hal.dev, pair->pair_id);
  386. } else {
  387. gdma_ll_tx_stop(group->hal.dev, pair->pair_id);
  388. }
  389. err:
  390. return ret;
  391. }
  392. esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
  393. {
  394. esp_err_t ret = ESP_OK;
  395. gdma_pair_t *pair = NULL;
  396. gdma_group_t *group = NULL;
  397. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  398. pair = dma_chan->pair;
  399. group = pair->group;
  400. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  401. gdma_ll_rx_restart(group->hal.dev, pair->pair_id);
  402. } else {
  403. gdma_ll_tx_restart(group->hal.dev, pair->pair_id);
  404. }
  405. err:
  406. return ret;
  407. }
  408. esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
  409. {
  410. esp_err_t ret = ESP_OK;
  411. gdma_pair_t *pair = NULL;
  412. gdma_group_t *group = NULL;
  413. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  414. pair = dma_chan->pair;
  415. group = pair->group;
  416. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  417. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id);
  418. } else {
  419. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id);
  420. }
  421. err:
  422. return ret;
  423. }
  424. static void gdma_uninstall_group(gdma_group_t *group)
  425. {
  426. int group_id = group->group_id;
  427. bool do_deinitialize = false;
  428. portENTER_CRITICAL(&s_platform.spinlock);
  429. s_platform.group_ref_counts[group_id]--;
  430. if (s_platform.group_ref_counts[group_id] == 0) {
  431. assert(s_platform.groups[group_id]);
  432. do_deinitialize = true;
  433. s_platform.groups[group_id] = NULL; // deregister from platfrom
  434. gdma_ll_enable_clock(group->hal.dev, false);
  435. periph_module_disable(gdma_periph_signals.groups[group_id].module);
  436. }
  437. portEXIT_CRITICAL(&s_platform.spinlock);
  438. if (do_deinitialize) {
  439. free(group);
  440. ESP_LOGD(TAG, "del group %d", group_id);
  441. }
  442. }
  443. static gdma_group_t *gdma_acquire_group_handle(int group_id)
  444. {
  445. bool new_group = false;
  446. gdma_group_t *group = NULL;
  447. gdma_group_t *pre_alloc_group = calloc(1, sizeof(gdma_group_t));
  448. if (!pre_alloc_group) {
  449. goto out;
  450. }
  451. portENTER_CRITICAL(&s_platform.spinlock);
  452. if (!s_platform.groups[group_id]) {
  453. new_group = true;
  454. group = pre_alloc_group;
  455. s_platform.groups[group_id] = group; // register to platform
  456. group->group_id = group_id;
  457. group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  458. periph_module_enable(gdma_periph_signals.groups[group_id].module); // enable APB to access GDMA registers
  459. gdma_hal_init(&group->hal, group_id); // initialize HAL context
  460. gdma_ll_enable_clock(group->hal.dev, true); // enable gdma clock
  461. } else {
  462. group = s_platform.groups[group_id];
  463. }
  464. // someone acquired the group handle means we have a new object that refer to this group
  465. s_platform.group_ref_counts[group_id]++;
  466. portEXIT_CRITICAL(&s_platform.spinlock);
  467. if (new_group) {
  468. ESP_LOGD(TAG, "new group (%d) at %p", group->group_id, group);
  469. } else {
  470. free(pre_alloc_group);
  471. }
  472. out:
  473. return group;
  474. }
  475. static void gdma_release_group_handle(gdma_group_t *group)
  476. {
  477. if (group) {
  478. gdma_uninstall_group(group);
  479. }
  480. }
  481. static void gdma_uninstall_pair(gdma_pair_t *pair)
  482. {
  483. gdma_group_t *group = pair->group;
  484. int pair_id = pair->pair_id;
  485. bool do_deinitialize = false;
  486. portENTER_CRITICAL(&group->spinlock);
  487. group->pair_ref_counts[pair_id]--;
  488. if (group->pair_ref_counts[pair_id] == 0) {
  489. assert(group->pairs[pair_id]);
  490. do_deinitialize = true;
  491. group->pairs[pair_id] = NULL; // deregister from pair
  492. }
  493. portEXIT_CRITICAL(&group->spinlock);
  494. if (do_deinitialize) {
  495. free(pair);
  496. ESP_LOGD(TAG, "del pair (%d,%d)", group->group_id, pair_id);
  497. gdma_uninstall_group(group);
  498. }
  499. }
  500. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id)
  501. {
  502. bool new_pair = false;
  503. gdma_pair_t *pair = NULL;
  504. gdma_pair_t *pre_alloc_pair = calloc(1, sizeof(gdma_pair_t));
  505. if (!pre_alloc_pair) {
  506. goto out;
  507. }
  508. portENTER_CRITICAL(&group->spinlock);
  509. if (!group->pairs[pair_id]) {
  510. new_pair = true;
  511. pair = pre_alloc_pair;
  512. group->pairs[pair_id] = pair; // register to group
  513. pair->group = group;
  514. pair->pair_id = pair_id;
  515. pair->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  516. } else {
  517. pair = group->pairs[pair_id];
  518. }
  519. // someone acquired the pair handle means we have a new object that refer to this pair
  520. group->pair_ref_counts[pair_id]++;
  521. portEXIT_CRITICAL(&group->spinlock);
  522. if (new_pair) {
  523. portENTER_CRITICAL(&s_platform.spinlock);
  524. s_platform.group_ref_counts[group->group_id]++; // pair obtains a reference to group
  525. portEXIT_CRITICAL(&s_platform.spinlock);
  526. ESP_LOGD(TAG, "new pair (%d,%d) at %p", group->group_id, pair->pair_id, pair);
  527. } else {
  528. free(pre_alloc_pair);
  529. }
  530. out:
  531. return pair;
  532. }
  533. static void gdma_release_pair_handle(gdma_pair_t *pair)
  534. {
  535. if (pair) {
  536. gdma_uninstall_pair(pair);
  537. }
  538. }
  539. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel)
  540. {
  541. gdma_pair_t *pair = dma_channel->pair;
  542. gdma_group_t *group = pair->group;
  543. gdma_tx_channel_t *tx_chan = __containerof(dma_channel, gdma_tx_channel_t, base);
  544. portENTER_CRITICAL(&pair->spinlock);
  545. pair->tx_chan = NULL;
  546. pair->occupy_code &= ~SEARCH_REQUEST_TX_CHANNEL;
  547. portEXIT_CRITICAL(&pair->spinlock);
  548. if (dma_channel->intr) {
  549. esp_intr_free(dma_channel->intr);
  550. portENTER_CRITICAL(&pair->spinlock);
  551. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  552. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  553. portEXIT_CRITICAL(&pair->spinlock);
  554. ESP_LOGD(TAG, "uninstall interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  555. }
  556. ESP_LOGD(TAG, "del tx channel (%d,%d)", group->group_id, pair->pair_id);
  557. free(tx_chan);
  558. gdma_uninstall_pair(pair);
  559. return ESP_OK;
  560. }
  561. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel)
  562. {
  563. gdma_pair_t *pair = dma_channel->pair;
  564. gdma_group_t *group = pair->group;
  565. gdma_rx_channel_t *rx_chan = __containerof(dma_channel, gdma_rx_channel_t, base);
  566. portENTER_CRITICAL(&pair->spinlock);
  567. pair->rx_chan = NULL;
  568. pair->occupy_code &= ~SEARCH_REQUEST_RX_CHANNEL;
  569. portEXIT_CRITICAL(&pair->spinlock);
  570. if (dma_channel->intr) {
  571. esp_intr_free(dma_channel->intr);
  572. portENTER_CRITICAL(&pair->spinlock);
  573. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  574. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  575. portEXIT_CRITICAL(&pair->spinlock);
  576. ESP_LOGD(TAG, "uninstall interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  577. }
  578. ESP_LOGD(TAG, "del rx channel (%d,%d)", group->group_id, pair->pair_id);
  579. free(rx_chan);
  580. gdma_uninstall_pair(pair);
  581. return ESP_OK;
  582. }
  583. static void IRAM_ATTR gdma_default_rx_isr(void *args)
  584. {
  585. gdma_rx_channel_t *rx_chan = (gdma_rx_channel_t *)args;
  586. gdma_pair_t *pair = rx_chan->base.pair;
  587. gdma_group_t *group = pair->group;
  588. bool need_yield = false;
  589. // clear pending interrupt event
  590. uint32_t intr_status = gdma_ll_rx_get_interrupt_status(group->hal.dev, pair->pair_id);
  591. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  592. if (intr_status & GDMA_LL_EVENT_RX_SUC_EOF) {
  593. if (rx_chan && rx_chan->on_recv_eof) {
  594. uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id);
  595. gdma_event_data_t edata = {
  596. .rx_eof_desc_addr = eof_addr
  597. };
  598. if (rx_chan->on_recv_eof(&rx_chan->base, &edata, rx_chan->user_data)) {
  599. need_yield = true;
  600. }
  601. }
  602. }
  603. if (need_yield) {
  604. portYIELD_FROM_ISR();
  605. }
  606. }
  607. static void IRAM_ATTR gdma_default_tx_isr(void *args)
  608. {
  609. gdma_tx_channel_t *tx_chan = (gdma_tx_channel_t *)args;
  610. gdma_pair_t *pair = tx_chan->base.pair;
  611. gdma_group_t *group = pair->group;
  612. bool need_yield = false;
  613. // clear pending interrupt event
  614. uint32_t intr_status = gdma_ll_tx_get_interrupt_status(group->hal.dev, pair->pair_id);
  615. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  616. if (intr_status & GDMA_LL_EVENT_TX_EOF) {
  617. if (tx_chan && tx_chan->on_trans_eof) {
  618. uint32_t eof_addr = gdma_ll_tx_get_eof_desc_addr(group->hal.dev, pair->pair_id);
  619. gdma_event_data_t edata = {
  620. .tx_eof_desc_addr = eof_addr
  621. };
  622. if (tx_chan->on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data)) {
  623. need_yield = true;
  624. }
  625. }
  626. }
  627. if (need_yield) {
  628. portYIELD_FROM_ISR();
  629. }
  630. }
  631. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan)
  632. {
  633. esp_err_t ret = ESP_OK;
  634. gdma_pair_t *pair = rx_chan->base.pair;
  635. gdma_group_t *group = pair->group;
  636. // pre-alloc a interrupt handle, with handler disabled
  637. int isr_flags = ESP_INTR_FLAG_INTRDISABLED;
  638. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  639. isr_flags |= ESP_INTR_FLAG_SHARED;
  640. #endif
  641. intr_handle_t intr = NULL;
  642. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].rx_irq_id, isr_flags,
  643. (uint32_t)gdma_ll_rx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_RX_EVENT_MASK,
  644. gdma_default_rx_isr, rx_chan, &intr);
  645. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  646. rx_chan->base.intr = intr;
  647. portENTER_CRITICAL(&pair->spinlock);
  648. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  649. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  650. portEXIT_CRITICAL(&pair->spinlock);
  651. ESP_LOGD(TAG, "install interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  652. err:
  653. return ret;
  654. }
  655. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan)
  656. {
  657. esp_err_t ret = ESP_OK;
  658. gdma_pair_t *pair = tx_chan->base.pair;
  659. gdma_group_t *group = pair->group;
  660. // pre-alloc a interrupt handle, with handler disabled
  661. int isr_flags = ESP_INTR_FLAG_INTRDISABLED;
  662. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  663. isr_flags |= ESP_INTR_FLAG_SHARED;
  664. #endif
  665. intr_handle_t intr = NULL;
  666. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].tx_irq_id, isr_flags,
  667. (uint32_t)gdma_ll_tx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_TX_EVENT_MASK,
  668. gdma_default_tx_isr, tx_chan, &intr);
  669. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  670. tx_chan->base.intr = intr;
  671. portENTER_CRITICAL(&pair->spinlock);
  672. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  673. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  674. portEXIT_CRITICAL(&pair->spinlock);
  675. ESP_LOGD(TAG, "install interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  676. err:
  677. return ret;
  678. }