gdma.c 31 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. // #define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
  7. #include <stdlib.h>
  8. #include <sys/cdefs.h>
  9. #include "sdkconfig.h"
  10. #include "freertos/FreeRTOS.h"
  11. #include "freertos/task.h"
  12. #include "soc/soc_caps.h"
  13. #include "soc/periph_defs.h"
  14. #include "esp_intr_alloc.h"
  15. #include "esp_log.h"
  16. #include "esp_check.h"
  17. #include "driver/periph_ctrl.h"
  18. #include "esp_private/gdma.h"
  19. #include "esp_heap_caps.h"
  20. #include "hal/gdma_hal.h"
  21. #include "hal/gdma_ll.h"
  22. #include "soc/gdma_periph.h"
  23. #include "soc/soc_memory_types.h"
  24. static const char *TAG = "gdma";
  25. #if CONFIG_GDMA_ISR_IRAM_SAFE
  26. #define GDMA_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_INTRDISABLED)
  27. #define GDMA_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
  28. #else
  29. #define GDMA_INTR_ALLOC_FLAGS ESP_INTR_FLAG_INTRDISABLED
  30. #define GDMA_MEM_ALLOC_CAPS MALLOC_CAP_DEFAULT
  31. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  32. #if CONFIG_GDMA_CTRL_FUNC_IN_IRAM
  33. #define GDMA_CTRL_FUNC_ATTR IRAM_ATTR
  34. #else
  35. #define GDMA_CTRL_FUNC_ATTR
  36. #endif // CONFIG_GDMA_CTRL_FUNC_IN_IRAM
  37. #define GDMA_INVALID_PERIPH_TRIG (0x3F)
  38. #define SEARCH_REQUEST_RX_CHANNEL (1 << 0)
  39. #define SEARCH_REQUEST_TX_CHANNEL (1 << 1)
  40. typedef struct gdma_platform_t gdma_platform_t;
  41. typedef struct gdma_group_t gdma_group_t;
  42. typedef struct gdma_pair_t gdma_pair_t;
  43. typedef struct gdma_channel_t gdma_channel_t;
  44. typedef struct gdma_tx_channel_t gdma_tx_channel_t;
  45. typedef struct gdma_rx_channel_t gdma_rx_channel_t;
  46. /**
  47. * GDMA driver consists of there object class, namely: Group, Pair and Channel.
  48. * Channel is allocated when user calls `gdma_new_channel`, its lifecycle is maintained by user.
  49. * Pair and Group are all lazy allocated, their life cycles are maintained by this driver.
  50. * We use reference count to track their life cycles, i.e. the driver will free their memory only when their reference count reached to 0.
  51. *
  52. * We don't use an all-in-one spin lock in this driver, instead, we created different spin locks at different level.
  53. * For platform, it has a spinlock, which is used to protect the group handle slots and reference count of each group.
  54. * For group, it has a spinlock, which is used to protect group level stuffs, e.g. hal object, pair handle slots and reference count of each pair.
  55. * For pair, it has a spinlock, which is used to protect pair level stuffs, e.g. channel handle slots, occupy code.
  56. */
  57. struct gdma_platform_t {
  58. portMUX_TYPE spinlock; // platform level spinlock
  59. gdma_group_t *groups[SOC_GDMA_GROUPS]; // array of GDMA group instances
  60. int group_ref_counts[SOC_GDMA_GROUPS]; // reference count used to protect group install/uninstall
  61. };
  62. struct gdma_group_t {
  63. int group_id; // Group ID, index from 0
  64. gdma_hal_context_t hal; // HAL instance is at group level
  65. portMUX_TYPE spinlock; // group level spinlock
  66. gdma_pair_t *pairs[SOC_GDMA_PAIRS_PER_GROUP]; // handles of GDMA pairs
  67. int pair_ref_counts[SOC_GDMA_PAIRS_PER_GROUP]; // reference count used to protect pair install/uninstall
  68. };
  69. struct gdma_pair_t {
  70. gdma_group_t *group; // which group the pair belongs to
  71. int pair_id; // Pair ID, index from 0
  72. gdma_tx_channel_t *tx_chan; // pointer of tx channel in the pair
  73. gdma_rx_channel_t *rx_chan; // pointer of rx channel in the pair
  74. int occupy_code; // each bit indicates which channel has been occupied (an occupied channel will be skipped during channel search)
  75. portMUX_TYPE spinlock; // pair level spinlock
  76. };
  77. struct gdma_channel_t {
  78. gdma_pair_t *pair; // which pair the channel belongs to
  79. intr_handle_t intr; // per-channel interrupt handle
  80. gdma_channel_direction_t direction; // channel direction
  81. int periph_id; // Peripheral instance ID, indicates which peripheral is connected to this GDMA channel
  82. size_t sram_alignment; // alignment for memory in SRAM
  83. size_t psram_alignment; // alignment for memory in PSRAM
  84. esp_err_t (*del)(gdma_channel_t *channel); // channel deletion function, it's polymorphic, see `gdma_del_tx_channel` or `gdma_del_rx_channel`
  85. };
  86. struct gdma_tx_channel_t {
  87. gdma_channel_t base; // GDMA channel, base class
  88. void *user_data; // user registered DMA event data
  89. gdma_event_callback_t on_trans_eof; // TX EOF callback
  90. };
  91. struct gdma_rx_channel_t {
  92. gdma_channel_t base; // GDMA channel, base class
  93. void *user_data; // user registered DMA event data
  94. gdma_event_callback_t on_recv_eof; // RX EOF callback
  95. };
  96. static gdma_group_t *gdma_acquire_group_handle(int group_id);
  97. static void gdma_release_group_handle(gdma_group_t *group);
  98. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id);
  99. static void gdma_release_pair_handle(gdma_pair_t *pair);
  100. static void gdma_uninstall_group(gdma_group_t *group);
  101. static void gdma_uninstall_pair(gdma_pair_t *pair);
  102. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel);
  103. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel);
  104. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan);
  105. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan);
  106. // gdma driver platform
  107. static gdma_platform_t s_platform = {
  108. .spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED,
  109. .groups = {} // groups will be lazy installed
  110. };
  111. esp_err_t gdma_new_channel(const gdma_channel_alloc_config_t *config, gdma_channel_handle_t *ret_chan)
  112. {
  113. esp_err_t ret = ESP_OK;
  114. gdma_tx_channel_t *alloc_tx_channel = NULL;
  115. gdma_rx_channel_t *alloc_rx_channel = NULL;
  116. int search_code = 0;
  117. gdma_pair_t *pair = NULL;
  118. gdma_group_t *group = NULL;
  119. ESP_GOTO_ON_FALSE(config && ret_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  120. if (config->flags.reserve_sibling) {
  121. search_code = SEARCH_REQUEST_RX_CHANNEL | SEARCH_REQUEST_TX_CHANNEL; // search for a pair of channels
  122. }
  123. if (config->direction == GDMA_CHANNEL_DIRECTION_TX) {
  124. search_code |= SEARCH_REQUEST_TX_CHANNEL; // search TX only
  125. alloc_tx_channel = heap_caps_calloc(1, sizeof(gdma_tx_channel_t), GDMA_MEM_ALLOC_CAPS);
  126. ESP_GOTO_ON_FALSE(alloc_tx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma tx channel");
  127. } else if (config->direction == GDMA_CHANNEL_DIRECTION_RX) {
  128. search_code |= SEARCH_REQUEST_RX_CHANNEL; // search RX only
  129. alloc_rx_channel = heap_caps_calloc(1, sizeof(gdma_rx_channel_t), GDMA_MEM_ALLOC_CAPS);
  130. ESP_GOTO_ON_FALSE(alloc_rx_channel, ESP_ERR_NO_MEM, err, TAG, "no mem for gdma rx channel");
  131. }
  132. if (config->sibling_chan) {
  133. pair = config->sibling_chan->pair;
  134. ESP_GOTO_ON_FALSE(pair, ESP_ERR_INVALID_ARG, err, TAG, "invalid sibling channel");
  135. ESP_GOTO_ON_FALSE(config->sibling_chan->direction != config->direction, ESP_ERR_INVALID_ARG, err, TAG, "sibling channel should have a different direction");
  136. group = pair->group;
  137. portENTER_CRITICAL(&group->spinlock);
  138. group->pair_ref_counts[pair->pair_id]++; // channel obtains a reference to pair
  139. portEXIT_CRITICAL(&group->spinlock);
  140. goto search_done; // skip the search path below if user has specify a sibling channel
  141. }
  142. for (int i = 0; i < SOC_GDMA_GROUPS && search_code; i++) { // loop to search group
  143. group = gdma_acquire_group_handle(i);
  144. for (int j = 0; j < SOC_GDMA_PAIRS_PER_GROUP && search_code && group; j++) { // loop to search pair
  145. pair = gdma_acquire_pair_handle(group, j);
  146. if (pair) {
  147. portENTER_CRITICAL(&pair->spinlock);
  148. if (!(search_code & pair->occupy_code)) { // pair has suitable position for acquired channel(s)
  149. pair->occupy_code |= search_code;
  150. search_code = 0; // exit search loop
  151. }
  152. portEXIT_CRITICAL(&pair->spinlock);
  153. if (!search_code) {
  154. portENTER_CRITICAL(&group->spinlock);
  155. group->pair_ref_counts[j]++; // channel obtains a reference to pair
  156. portEXIT_CRITICAL(&group->spinlock);
  157. }
  158. }
  159. gdma_release_pair_handle(pair);
  160. } // loop used to search pair
  161. gdma_release_group_handle(group);
  162. } // loop used to search group
  163. ESP_GOTO_ON_FALSE(search_code == 0, ESP_ERR_NOT_FOUND, err, TAG, "no free gdma channel, search code=%d", search_code);
  164. search_done:
  165. // register TX channel
  166. if (alloc_tx_channel) {
  167. pair->tx_chan = alloc_tx_channel;
  168. alloc_tx_channel->base.pair = pair;
  169. alloc_tx_channel->base.direction = GDMA_CHANNEL_DIRECTION_TX;
  170. alloc_tx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  171. alloc_tx_channel->base.del = gdma_del_tx_channel; // set channel deletion function
  172. *ret_chan = &alloc_tx_channel->base; // return the installed channel
  173. }
  174. // register RX channel
  175. if (alloc_rx_channel) {
  176. pair->rx_chan = alloc_rx_channel;
  177. alloc_rx_channel->base.pair = pair;
  178. alloc_rx_channel->base.direction = GDMA_CHANNEL_DIRECTION_RX;
  179. alloc_rx_channel->base.periph_id = GDMA_INVALID_PERIPH_TRIG;
  180. alloc_rx_channel->base.del = gdma_del_rx_channel; // set channel deletion function
  181. *ret_chan = &alloc_rx_channel->base; // return the installed channel
  182. }
  183. ESP_LOGD(TAG, "new %s channel (%d,%d) at %p", (config->direction == GDMA_CHANNEL_DIRECTION_TX) ? "tx" : "rx",
  184. group->group_id, pair->pair_id, *ret_chan);
  185. return ESP_OK;
  186. err:
  187. if (alloc_tx_channel) {
  188. free(alloc_tx_channel);
  189. }
  190. if (alloc_rx_channel) {
  191. free(alloc_rx_channel);
  192. }
  193. return ret;
  194. }
  195. esp_err_t gdma_del_channel(gdma_channel_handle_t dma_chan)
  196. {
  197. esp_err_t ret = ESP_OK;
  198. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  199. ret = dma_chan->del(dma_chan); // call `gdma_del_tx_channel` or `gdma_del_rx_channel`
  200. err:
  201. return ret;
  202. }
  203. esp_err_t gdma_get_channel_id(gdma_channel_handle_t dma_chan, int *channel_id)
  204. {
  205. esp_err_t ret = ESP_OK;
  206. gdma_pair_t *pair = NULL;
  207. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  208. pair = dma_chan->pair;
  209. *channel_id = pair->pair_id;
  210. err:
  211. return ret;
  212. }
  213. esp_err_t gdma_connect(gdma_channel_handle_t dma_chan, gdma_trigger_t trig_periph)
  214. {
  215. esp_err_t ret = ESP_OK;
  216. gdma_pair_t *pair = NULL;
  217. gdma_group_t *group = NULL;
  218. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  219. ESP_GOTO_ON_FALSE(dma_chan->periph_id == GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "channel is using by peripheral: %d", dma_chan->periph_id);
  220. pair = dma_chan->pair;
  221. group = pair->group;
  222. dma_chan->periph_id = trig_periph.instance_id;
  223. // enable/disable m2m mode
  224. gdma_ll_enable_m2m_mode(group->hal.dev, pair->pair_id, trig_periph.periph == GDMA_TRIG_PERIPH_M2M);
  225. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  226. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  227. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  228. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  229. }
  230. } else {
  231. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id); // reset channel
  232. if (trig_periph.periph != GDMA_TRIG_PERIPH_M2M) {
  233. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, trig_periph.instance_id);
  234. }
  235. }
  236. err:
  237. return ret;
  238. }
  239. esp_err_t gdma_disconnect(gdma_channel_handle_t dma_chan)
  240. {
  241. esp_err_t ret = ESP_OK;
  242. gdma_pair_t *pair = NULL;
  243. gdma_group_t *group = NULL;
  244. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  245. ESP_GOTO_ON_FALSE(dma_chan->periph_id != GDMA_INVALID_PERIPH_TRIG, ESP_ERR_INVALID_STATE, err, TAG, "no peripheral is connected to the channel");
  246. pair = dma_chan->pair;
  247. group = pair->group;
  248. dma_chan->periph_id = GDMA_INVALID_PERIPH_TRIG;
  249. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  250. gdma_ll_tx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  251. } else {
  252. gdma_ll_rx_connect_to_periph(group->hal.dev, pair->pair_id, GDMA_INVALID_PERIPH_TRIG);
  253. }
  254. err:
  255. return ret;
  256. }
  257. esp_err_t gdma_set_transfer_ability(gdma_channel_handle_t dma_chan, const gdma_transfer_ability_t *ability)
  258. {
  259. esp_err_t ret = ESP_OK;
  260. gdma_pair_t *pair = NULL;
  261. gdma_group_t *group = NULL;
  262. bool en_burst = true;
  263. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  264. pair = dma_chan->pair;
  265. group = pair->group;
  266. size_t sram_alignment = ability->sram_trans_align;
  267. size_t psram_alignment = ability->psram_trans_align;
  268. // alignment should be 2^n
  269. ESP_GOTO_ON_FALSE((sram_alignment & (sram_alignment - 1)) == 0, ESP_ERR_INVALID_ARG, err, TAG, "invalid sram alignment: %zu", sram_alignment);
  270. #if SOC_GDMA_SUPPORT_PSRAM
  271. int block_size_index = 0;
  272. switch (psram_alignment) {
  273. case 64: // 64 Bytes alignment
  274. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_64B;
  275. break;
  276. case 32: // 32 Bytes alignment
  277. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_32B;
  278. break;
  279. case 16: // 16 Bytes alignment
  280. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  281. break;
  282. case 0: // no alignment is requirement
  283. block_size_index = GDMA_LL_EXT_MEM_BK_SIZE_16B;
  284. psram_alignment = SOC_GDMA_PSRAM_MIN_ALIGN; // fall back to minimal alignment
  285. break;
  286. default:
  287. ESP_GOTO_ON_FALSE(false, ESP_ERR_INVALID_ARG, err, TAG, "invalid psram alignment: %zu", psram_alignment);
  288. break;
  289. }
  290. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  291. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  292. // TX channel can always enable burst mode, no matter data alignment
  293. gdma_ll_tx_enable_data_burst(group->hal.dev, pair->pair_id, true);
  294. gdma_ll_tx_enable_descriptor_burst(group->hal.dev, pair->pair_id, true);
  295. #if SOC_GDMA_SUPPORT_PSRAM
  296. gdma_ll_tx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  297. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  298. } else {
  299. // RX channel burst mode depends on specific data alignment
  300. en_burst = sram_alignment >= 4;
  301. gdma_ll_rx_enable_data_burst(group->hal.dev, pair->pair_id, en_burst);
  302. gdma_ll_rx_enable_descriptor_burst(group->hal.dev, pair->pair_id, en_burst);
  303. #if SOC_GDMA_SUPPORT_PSRAM
  304. gdma_ll_rx_set_block_size_psram(group->hal.dev, pair->pair_id, block_size_index);
  305. #endif // #if SOC_GDMA_SUPPORT_PSRAM
  306. }
  307. dma_chan->sram_alignment = sram_alignment;
  308. dma_chan->psram_alignment = psram_alignment;
  309. ESP_LOGD(TAG, "%s channel (%d,%d), (%zu:%zu) bytes aligned, burst %s", dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX ? "tx" : "rx",
  310. group->group_id, pair->pair_id, sram_alignment, psram_alignment, en_burst ? "enabled" : "disabled");
  311. err:
  312. return ret;
  313. }
  314. esp_err_t gdma_apply_strategy(gdma_channel_handle_t dma_chan, const gdma_strategy_config_t *config)
  315. {
  316. esp_err_t ret = ESP_OK;
  317. gdma_pair_t *pair = NULL;
  318. gdma_group_t *group = NULL;
  319. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  320. pair = dma_chan->pair;
  321. group = pair->group;
  322. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX) {
  323. gdma_ll_tx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  324. gdma_ll_tx_enable_auto_write_back(group->hal.dev, pair->pair_id, config->auto_update_desc);
  325. } else {
  326. gdma_ll_rx_enable_owner_check(group->hal.dev, pair->pair_id, config->owner_check);
  327. }
  328. err:
  329. return ret;
  330. }
  331. esp_err_t gdma_register_tx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_tx_event_callbacks_t *cbs, void *user_data)
  332. {
  333. esp_err_t ret = ESP_OK;
  334. gdma_pair_t *pair = NULL;
  335. gdma_group_t *group = NULL;
  336. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_TX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  337. pair = dma_chan->pair;
  338. group = pair->group;
  339. gdma_tx_channel_t *tx_chan = __containerof(dma_chan, gdma_tx_channel_t, base);
  340. #if CONFIG_GDMA_ISR_IRAM_SAFE
  341. if (cbs->on_trans_eof) {
  342. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_trans_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_trans_eof not in IRAM");
  343. }
  344. if (user_data) {
  345. ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
  346. esp_ptr_in_diram_dram(user_data) ||
  347. esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
  348. }
  349. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  350. // lazy install interrupt service
  351. ESP_GOTO_ON_ERROR(gdma_install_tx_interrupt(tx_chan), err, TAG, "install interrupt service failed");
  352. // enable/disable GDMA interrupt events for TX channel
  353. portENTER_CRITICAL(&pair->spinlock);
  354. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_TX_EOF, cbs->on_trans_eof != NULL);
  355. portEXIT_CRITICAL(&pair->spinlock);
  356. tx_chan->on_trans_eof = cbs->on_trans_eof;
  357. tx_chan->user_data = user_data;
  358. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  359. err:
  360. return ret;
  361. }
  362. esp_err_t gdma_register_rx_event_callbacks(gdma_channel_handle_t dma_chan, gdma_rx_event_callbacks_t *cbs, void *user_data)
  363. {
  364. esp_err_t ret = ESP_OK;
  365. gdma_pair_t *pair = NULL;
  366. gdma_group_t *group = NULL;
  367. ESP_GOTO_ON_FALSE(dma_chan && dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  368. pair = dma_chan->pair;
  369. group = pair->group;
  370. gdma_rx_channel_t *rx_chan = __containerof(dma_chan, gdma_rx_channel_t, base);
  371. #if CONFIG_GDMA_ISR_IRAM_SAFE
  372. if (cbs->on_recv_eof) {
  373. ESP_GOTO_ON_FALSE(esp_ptr_in_iram(cbs->on_recv_eof), ESP_ERR_INVALID_ARG, err, TAG, "on_recv_eof not in IRAM");
  374. }
  375. if (user_data) {
  376. ESP_GOTO_ON_FALSE(esp_ptr_in_dram(user_data) ||
  377. esp_ptr_in_diram_dram(user_data) ||
  378. esp_ptr_in_rtc_dram_fast(user_data), ESP_ERR_INVALID_ARG, err, TAG, "user context not in DRAM");
  379. }
  380. #endif // CONFIG_GDMA_ISR_IRAM_SAFE
  381. // lazy install interrupt service
  382. ESP_GOTO_ON_ERROR(gdma_install_rx_interrupt(rx_chan), err, TAG, "install interrupt service failed");
  383. // enable/disable GDMA interrupt events for RX channel
  384. portENTER_CRITICAL(&pair->spinlock);
  385. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, GDMA_LL_EVENT_RX_SUC_EOF, cbs->on_recv_eof != NULL);
  386. portEXIT_CRITICAL(&pair->spinlock);
  387. rx_chan->on_recv_eof = cbs->on_recv_eof;
  388. rx_chan->user_data = user_data;
  389. ESP_GOTO_ON_ERROR(esp_intr_enable(dma_chan->intr), err, TAG, "enable interrupt failed");
  390. err:
  391. return ret;
  392. }
  393. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_start(gdma_channel_handle_t dma_chan, intptr_t desc_base_addr)
  394. {
  395. esp_err_t ret = ESP_OK;
  396. gdma_pair_t *pair = NULL;
  397. gdma_group_t *group = NULL;
  398. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  399. pair = dma_chan->pair;
  400. group = pair->group;
  401. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  402. gdma_ll_rx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  403. gdma_ll_rx_start(group->hal.dev, pair->pair_id);
  404. } else {
  405. gdma_ll_tx_set_desc_addr(group->hal.dev, pair->pair_id, desc_base_addr);
  406. gdma_ll_tx_start(group->hal.dev, pair->pair_id);
  407. }
  408. err:
  409. return ret;
  410. }
  411. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_stop(gdma_channel_handle_t dma_chan)
  412. {
  413. esp_err_t ret = ESP_OK;
  414. gdma_pair_t *pair = NULL;
  415. gdma_group_t *group = NULL;
  416. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  417. pair = dma_chan->pair;
  418. group = pair->group;
  419. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  420. gdma_ll_rx_stop(group->hal.dev, pair->pair_id);
  421. } else {
  422. gdma_ll_tx_stop(group->hal.dev, pair->pair_id);
  423. }
  424. err:
  425. return ret;
  426. }
  427. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_append(gdma_channel_handle_t dma_chan)
  428. {
  429. esp_err_t ret = ESP_OK;
  430. gdma_pair_t *pair = NULL;
  431. gdma_group_t *group = NULL;
  432. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  433. pair = dma_chan->pair;
  434. group = pair->group;
  435. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  436. gdma_ll_rx_restart(group->hal.dev, pair->pair_id);
  437. } else {
  438. gdma_ll_tx_restart(group->hal.dev, pair->pair_id);
  439. }
  440. err:
  441. return ret;
  442. }
  443. GDMA_CTRL_FUNC_ATTR esp_err_t gdma_reset(gdma_channel_handle_t dma_chan)
  444. {
  445. esp_err_t ret = ESP_OK;
  446. gdma_pair_t *pair = NULL;
  447. gdma_group_t *group = NULL;
  448. ESP_GOTO_ON_FALSE(dma_chan, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
  449. pair = dma_chan->pair;
  450. group = pair->group;
  451. if (dma_chan->direction == GDMA_CHANNEL_DIRECTION_RX) {
  452. gdma_ll_rx_reset_channel(group->hal.dev, pair->pair_id);
  453. } else {
  454. gdma_ll_tx_reset_channel(group->hal.dev, pair->pair_id);
  455. }
  456. err:
  457. return ret;
  458. }
  459. static void gdma_uninstall_group(gdma_group_t *group)
  460. {
  461. int group_id = group->group_id;
  462. bool do_deinitialize = false;
  463. portENTER_CRITICAL(&s_platform.spinlock);
  464. s_platform.group_ref_counts[group_id]--;
  465. if (s_platform.group_ref_counts[group_id] == 0) {
  466. assert(s_platform.groups[group_id]);
  467. do_deinitialize = true;
  468. s_platform.groups[group_id] = NULL; // deregister from platfrom
  469. gdma_ll_enable_clock(group->hal.dev, false);
  470. periph_module_disable(gdma_periph_signals.groups[group_id].module);
  471. }
  472. portEXIT_CRITICAL(&s_platform.spinlock);
  473. if (do_deinitialize) {
  474. free(group);
  475. ESP_LOGD(TAG, "del group %d", group_id);
  476. }
  477. }
  478. static gdma_group_t *gdma_acquire_group_handle(int group_id)
  479. {
  480. bool new_group = false;
  481. gdma_group_t *group = NULL;
  482. gdma_group_t *pre_alloc_group = heap_caps_calloc(1, sizeof(gdma_group_t), GDMA_MEM_ALLOC_CAPS);
  483. if (!pre_alloc_group) {
  484. goto out;
  485. }
  486. portENTER_CRITICAL(&s_platform.spinlock);
  487. if (!s_platform.groups[group_id]) {
  488. new_group = true;
  489. group = pre_alloc_group;
  490. s_platform.groups[group_id] = group; // register to platform
  491. group->group_id = group_id;
  492. group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  493. periph_module_enable(gdma_periph_signals.groups[group_id].module); // enable APB to access GDMA registers
  494. gdma_hal_init(&group->hal, group_id); // initialize HAL context
  495. gdma_ll_enable_clock(group->hal.dev, true); // enable gdma clock
  496. } else {
  497. group = s_platform.groups[group_id];
  498. }
  499. // someone acquired the group handle means we have a new object that refer to this group
  500. s_platform.group_ref_counts[group_id]++;
  501. portEXIT_CRITICAL(&s_platform.spinlock);
  502. if (new_group) {
  503. ESP_LOGD(TAG, "new group (%d) at %p", group->group_id, group);
  504. } else {
  505. free(pre_alloc_group);
  506. }
  507. out:
  508. return group;
  509. }
  510. static void gdma_release_group_handle(gdma_group_t *group)
  511. {
  512. if (group) {
  513. gdma_uninstall_group(group);
  514. }
  515. }
  516. static void gdma_uninstall_pair(gdma_pair_t *pair)
  517. {
  518. gdma_group_t *group = pair->group;
  519. int pair_id = pair->pair_id;
  520. bool do_deinitialize = false;
  521. portENTER_CRITICAL(&group->spinlock);
  522. group->pair_ref_counts[pair_id]--;
  523. if (group->pair_ref_counts[pair_id] == 0) {
  524. assert(group->pairs[pair_id]);
  525. do_deinitialize = true;
  526. group->pairs[pair_id] = NULL; // deregister from pair
  527. }
  528. portEXIT_CRITICAL(&group->spinlock);
  529. if (do_deinitialize) {
  530. free(pair);
  531. ESP_LOGD(TAG, "del pair (%d,%d)", group->group_id, pair_id);
  532. gdma_uninstall_group(group);
  533. }
  534. }
  535. static gdma_pair_t *gdma_acquire_pair_handle(gdma_group_t *group, int pair_id)
  536. {
  537. bool new_pair = false;
  538. gdma_pair_t *pair = NULL;
  539. gdma_pair_t *pre_alloc_pair = heap_caps_calloc(1, sizeof(gdma_pair_t), GDMA_MEM_ALLOC_CAPS);
  540. if (!pre_alloc_pair) {
  541. goto out;
  542. }
  543. portENTER_CRITICAL(&group->spinlock);
  544. if (!group->pairs[pair_id]) {
  545. new_pair = true;
  546. pair = pre_alloc_pair;
  547. group->pairs[pair_id] = pair; // register to group
  548. pair->group = group;
  549. pair->pair_id = pair_id;
  550. pair->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
  551. } else {
  552. pair = group->pairs[pair_id];
  553. }
  554. // someone acquired the pair handle means we have a new object that refer to this pair
  555. group->pair_ref_counts[pair_id]++;
  556. portEXIT_CRITICAL(&group->spinlock);
  557. if (new_pair) {
  558. portENTER_CRITICAL(&s_platform.spinlock);
  559. s_platform.group_ref_counts[group->group_id]++; // pair obtains a reference to group
  560. portEXIT_CRITICAL(&s_platform.spinlock);
  561. ESP_LOGD(TAG, "new pair (%d,%d) at %p", group->group_id, pair->pair_id, pair);
  562. } else {
  563. free(pre_alloc_pair);
  564. }
  565. out:
  566. return pair;
  567. }
  568. static void gdma_release_pair_handle(gdma_pair_t *pair)
  569. {
  570. if (pair) {
  571. gdma_uninstall_pair(pair);
  572. }
  573. }
  574. static esp_err_t gdma_del_tx_channel(gdma_channel_t *dma_channel)
  575. {
  576. gdma_pair_t *pair = dma_channel->pair;
  577. gdma_group_t *group = pair->group;
  578. gdma_tx_channel_t *tx_chan = __containerof(dma_channel, gdma_tx_channel_t, base);
  579. portENTER_CRITICAL(&pair->spinlock);
  580. pair->tx_chan = NULL;
  581. pair->occupy_code &= ~SEARCH_REQUEST_TX_CHANNEL;
  582. portEXIT_CRITICAL(&pair->spinlock);
  583. if (dma_channel->intr) {
  584. esp_intr_free(dma_channel->intr);
  585. portENTER_CRITICAL(&pair->spinlock);
  586. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  587. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  588. portEXIT_CRITICAL(&pair->spinlock);
  589. ESP_LOGD(TAG, "uninstall interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  590. }
  591. ESP_LOGD(TAG, "del tx channel (%d,%d)", group->group_id, pair->pair_id);
  592. free(tx_chan);
  593. gdma_uninstall_pair(pair);
  594. return ESP_OK;
  595. }
  596. static esp_err_t gdma_del_rx_channel(gdma_channel_t *dma_channel)
  597. {
  598. gdma_pair_t *pair = dma_channel->pair;
  599. gdma_group_t *group = pair->group;
  600. gdma_rx_channel_t *rx_chan = __containerof(dma_channel, gdma_rx_channel_t, base);
  601. portENTER_CRITICAL(&pair->spinlock);
  602. pair->rx_chan = NULL;
  603. pair->occupy_code &= ~SEARCH_REQUEST_RX_CHANNEL;
  604. portEXIT_CRITICAL(&pair->spinlock);
  605. if (dma_channel->intr) {
  606. esp_intr_free(dma_channel->intr);
  607. portENTER_CRITICAL(&pair->spinlock);
  608. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  609. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  610. portEXIT_CRITICAL(&pair->spinlock);
  611. ESP_LOGD(TAG, "uninstall interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  612. }
  613. ESP_LOGD(TAG, "del rx channel (%d,%d)", group->group_id, pair->pair_id);
  614. free(rx_chan);
  615. gdma_uninstall_pair(pair);
  616. return ESP_OK;
  617. }
  618. static void IRAM_ATTR gdma_default_rx_isr(void *args)
  619. {
  620. gdma_rx_channel_t *rx_chan = (gdma_rx_channel_t *)args;
  621. gdma_pair_t *pair = rx_chan->base.pair;
  622. gdma_group_t *group = pair->group;
  623. bool need_yield = false;
  624. // clear pending interrupt event
  625. uint32_t intr_status = gdma_ll_rx_get_interrupt_status(group->hal.dev, pair->pair_id);
  626. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  627. if (intr_status & GDMA_LL_EVENT_RX_SUC_EOF) {
  628. if (rx_chan && rx_chan->on_recv_eof) {
  629. uint32_t eof_addr = gdma_ll_rx_get_success_eof_desc_addr(group->hal.dev, pair->pair_id);
  630. gdma_event_data_t edata = {
  631. .rx_eof_desc_addr = eof_addr
  632. };
  633. if (rx_chan->on_recv_eof(&rx_chan->base, &edata, rx_chan->user_data)) {
  634. need_yield = true;
  635. }
  636. }
  637. }
  638. if (need_yield) {
  639. portYIELD_FROM_ISR();
  640. }
  641. }
  642. static void IRAM_ATTR gdma_default_tx_isr(void *args)
  643. {
  644. gdma_tx_channel_t *tx_chan = (gdma_tx_channel_t *)args;
  645. gdma_pair_t *pair = tx_chan->base.pair;
  646. gdma_group_t *group = pair->group;
  647. bool need_yield = false;
  648. // clear pending interrupt event
  649. uint32_t intr_status = gdma_ll_tx_get_interrupt_status(group->hal.dev, pair->pair_id);
  650. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, intr_status);
  651. if (intr_status & GDMA_LL_EVENT_TX_EOF) {
  652. if (tx_chan && tx_chan->on_trans_eof) {
  653. uint32_t eof_addr = gdma_ll_tx_get_eof_desc_addr(group->hal.dev, pair->pair_id);
  654. gdma_event_data_t edata = {
  655. .tx_eof_desc_addr = eof_addr
  656. };
  657. if (tx_chan->on_trans_eof(&tx_chan->base, &edata, tx_chan->user_data)) {
  658. need_yield = true;
  659. }
  660. }
  661. }
  662. if (need_yield) {
  663. portYIELD_FROM_ISR();
  664. }
  665. }
  666. static esp_err_t gdma_install_rx_interrupt(gdma_rx_channel_t *rx_chan)
  667. {
  668. esp_err_t ret = ESP_OK;
  669. gdma_pair_t *pair = rx_chan->base.pair;
  670. gdma_group_t *group = pair->group;
  671. // pre-alloc a interrupt handle, with handler disabled
  672. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  673. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  674. isr_flags |= ESP_INTR_FLAG_SHARED;
  675. #endif
  676. intr_handle_t intr = NULL;
  677. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].rx_irq_id, isr_flags,
  678. (uint32_t)gdma_ll_rx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_RX_EVENT_MASK,
  679. gdma_default_rx_isr, rx_chan, &intr);
  680. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  681. rx_chan->base.intr = intr;
  682. portENTER_CRITICAL(&pair->spinlock);
  683. gdma_ll_rx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  684. gdma_ll_rx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  685. portEXIT_CRITICAL(&pair->spinlock);
  686. ESP_LOGD(TAG, "install interrupt service for rx channel (%d,%d)", group->group_id, pair->pair_id);
  687. err:
  688. return ret;
  689. }
  690. static esp_err_t gdma_install_tx_interrupt(gdma_tx_channel_t *tx_chan)
  691. {
  692. esp_err_t ret = ESP_OK;
  693. gdma_pair_t *pair = tx_chan->base.pair;
  694. gdma_group_t *group = pair->group;
  695. // pre-alloc a interrupt handle, with handler disabled
  696. int isr_flags = GDMA_INTR_ALLOC_FLAGS;
  697. #if SOC_GDMA_TX_RX_SHARE_INTERRUPT
  698. isr_flags |= ESP_INTR_FLAG_SHARED;
  699. #endif
  700. intr_handle_t intr = NULL;
  701. ret = esp_intr_alloc_intrstatus(gdma_periph_signals.groups[group->group_id].pairs[pair->pair_id].tx_irq_id, isr_flags,
  702. (uint32_t)gdma_ll_tx_get_interrupt_status_reg(group->hal.dev, pair->pair_id), GDMA_LL_TX_EVENT_MASK,
  703. gdma_default_tx_isr, tx_chan, &intr);
  704. ESP_GOTO_ON_ERROR(ret, err, TAG, "alloc interrupt failed");
  705. tx_chan->base.intr = intr;
  706. portENTER_CRITICAL(&pair->spinlock);
  707. gdma_ll_tx_enable_interrupt(group->hal.dev, pair->pair_id, UINT32_MAX, false); // disable all interupt events
  708. gdma_ll_tx_clear_interrupt_status(group->hal.dev, pair->pair_id, UINT32_MAX); // clear all pending events
  709. portEXIT_CRITICAL(&pair->spinlock);
  710. ESP_LOGD(TAG, "install interrupt service for tx channel (%d,%d)", group->group_id, pair->pair_id);
  711. err:
  712. return ret;
  713. }