Kconfig 18 KB

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  1. menu "ESP32S2-specific"
  2. # TODO: this component simply shouldn't be included
  3. # in the build at the CMake level, but this is currently
  4. # not working so we just hide all items here
  5. visible if IDF_TARGET_ESP32S2
  6. choice ESP32S2_DEFAULT_CPU_FREQ_MHZ
  7. prompt "CPU frequency"
  8. default ESP32S2_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
  9. default ESP32S2_DEFAULT_CPU_FREQ_FPGA if IDF_ENV_FPGA
  10. help
  11. CPU frequency to be set on application startup.
  12. config ESP32S2_DEFAULT_CPU_FREQ_FPGA
  13. depends on IDF_ENV_FPGA
  14. bool "FPGA"
  15. config ESP32S2_DEFAULT_CPU_FREQ_80
  16. bool "80 MHz"
  17. config ESP32S2_DEFAULT_CPU_FREQ_160
  18. bool "160 MHz"
  19. config ESP32S2_DEFAULT_CPU_FREQ_240
  20. bool "240 MHz"
  21. endchoice
  22. config ESP32S2_DEFAULT_CPU_FREQ_MHZ
  23. int
  24. default 40 if IDF_ENV_FPGA
  25. default 80 if ESP32S2_DEFAULT_CPU_FREQ_80
  26. default 160 if ESP32S2_DEFAULT_CPU_FREQ_160
  27. default 240 if ESP32S2_DEFAULT_CPU_FREQ_240
  28. menu "Cache config"
  29. choice ESP32S2_INSTRUCTION_CACHE_SIZE
  30. prompt "Instruction cache size"
  31. default ESP32S2_INSTRUCTION_CACHE_8KB
  32. help
  33. Instruction cache size to be set on application startup.
  34. If you use 8KB instruction cache rather than 16KB instruction cache,
  35. then the other 8KB will be added to the heap.
  36. config ESP32S2_INSTRUCTION_CACHE_8KB
  37. bool "8KB"
  38. config ESP32S2_INSTRUCTION_CACHE_16KB
  39. bool "16KB"
  40. endchoice
  41. choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
  42. prompt "Instruction cache line size"
  43. default ESP32S2_INSTRUCTION_CACHE_LINE_32B
  44. help
  45. Instruction cache line size to be set on application startup.
  46. config ESP32S2_INSTRUCTION_CACHE_LINE_16B
  47. bool "16 Bytes"
  48. config ESP32S2_INSTRUCTION_CACHE_LINE_32B
  49. bool "32 Bytes"
  50. endchoice
  51. choice ESP32S2_DATA_CACHE_SIZE
  52. prompt "Data cache size"
  53. default ESP32S2_DATA_CACHE_0KB if !ESP32S2_SPIRAM_SUPPORT
  54. default ESP32S2_DATA_CACHE_8KB if ESP32S2_SPIRAM_SUPPORT
  55. help
  56. Data cache size to be set on application startup.
  57. If you use 0KB data cache, the other 16KB will be added to the heap
  58. If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap
  59. config ESP32S2_DATA_CACHE_0KB
  60. depends on !ESP32S2_SPIRAM_SUPPORT
  61. bool "0KB"
  62. config ESP32S2_DATA_CACHE_8KB
  63. bool "8KB"
  64. config ESP32S2_DATA_CACHE_16KB
  65. bool "16KB"
  66. endchoice
  67. choice ESP32S2_DATA_CACHE_LINE_SIZE
  68. prompt "Data cache line size"
  69. default ESP32S2_DATA_CACHE_LINE_32B
  70. help
  71. Data cache line size to be set on application startup.
  72. config ESP32S2_DATA_CACHE_LINE_16B
  73. bool "16 Bytes"
  74. config ESP32S2_DATA_CACHE_LINE_32B
  75. bool "32 Bytes"
  76. endchoice
  77. config ESP32S2_INSTRUCTION_CACHE_WRAP
  78. bool "Enable instruction cache wrap"
  79. default "n"
  80. help
  81. If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram).
  82. The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE.
  83. However, it depends on complex conditions.
  84. config ESP32S2_DATA_CACHE_WRAP
  85. bool "Enable data cache wrap"
  86. default "n"
  87. help
  88. If enabled, data cache will use wrap mode to read spiram (maybe spi flash).
  89. The wrap length equals to DATA_CACHE_LINE_SIZE.
  90. However, it depends on complex conditions.
  91. endmenu # Cache config
  92. # Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
  93. # instead
  94. config ESP32S2_SPIRAM_SUPPORT
  95. bool "Support for external, SPI-connected RAM"
  96. default "n"
  97. select SPIRAM
  98. help
  99. This enables support for an external SPI RAM chip, connected in parallel with the
  100. main SPI flash chip.
  101. menu "SPI RAM config"
  102. depends on ESP32S2_SPIRAM_SUPPORT
  103. choice SPIRAM_TYPE
  104. prompt "Type of SPI RAM chip in use"
  105. default SPIRAM_TYPE_AUTO
  106. config SPIRAM_TYPE_AUTO
  107. bool "Auto-detect"
  108. config SPIRAM_TYPE_ESPPSRAM16
  109. bool "ESP-PSRAM16 or APS1604"
  110. config SPIRAM_TYPE_ESPPSRAM32
  111. bool "ESP-PSRAM32 or IS25WP032"
  112. config SPIRAM_TYPE_ESPPSRAM64
  113. bool "ESP-PSRAM64 or LY68L6400"
  114. endchoice
  115. config SPIRAM_SIZE
  116. int
  117. default -1 if SPIRAM_TYPE_AUTO
  118. default 2097152 if SPIRAM_TYPE_ESPPSRAM16
  119. default 4194304 if SPIRAM_TYPE_ESPPSRAM32
  120. default 8388608 if SPIRAM_TYPE_ESPPSRAM64
  121. default 0
  122. menu "PSRAM clock and cs IO for ESP32S2"
  123. depends on ESP32S2_SPIRAM_SUPPORT
  124. config DEFAULT_PSRAM_CLK_IO
  125. int "PSRAM CLK IO number"
  126. range 0 33
  127. default 30
  128. help
  129. The PSRAM CLOCK IO can be any unused GPIO, user can config it based on hardware design.
  130. config DEFAULT_PSRAM_CS_IO
  131. int "PSRAM CS IO number"
  132. range 0 33
  133. default 26
  134. help
  135. The PSRAM CS IO can be any unused GPIO, user can config it based on hardware design.
  136. endmenu
  137. config SPIRAM_FETCH_INSTRUCTIONS
  138. bool "Cache fetch instructions from SPI RAM"
  139. default n
  140. help
  141. If enabled, instruction in flash will be copied into SPIRAM.
  142. If SPIRAM_RODATA also enabled,
  143. you can run the instruction when erasing or programming the flash.
  144. config SPIRAM_RODATA
  145. bool "Cache load read only data from SPI RAM"
  146. default n
  147. help
  148. If enabled, radata in flash will be copied into SPIRAM.
  149. If SPIRAM_FETCH_INSTRUCTIONS also enabled,
  150. you can run the instruction when erasing or programming the flash.
  151. choice SPIRAM_SPEED
  152. prompt "Set RAM clock speed"
  153. default SPIRAM_SPEED_40M
  154. help
  155. Select the speed for the SPI RAM chip.
  156. config SPIRAM_SPEED_80M
  157. bool "80MHz clock speed"
  158. config SPIRAM_SPEED_40M
  159. bool "40Mhz clock speed"
  160. config SPIRAM_SPEED_26M
  161. bool "26Mhz clock speed"
  162. config SPIRAM_SPEED_20M
  163. bool "20Mhz clock speed"
  164. endchoice
  165. # insert non-chip-specific items here
  166. source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common"
  167. endmenu
  168. config ESP32S2_MEMMAP_TRACEMEM
  169. bool
  170. default "n"
  171. config ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
  172. bool
  173. default "n"
  174. config ESP32S2_TRAX
  175. bool "Use TRAX tracing feature"
  176. default "n"
  177. select ESP32S2_MEMMAP_TRACEMEM
  178. help
  179. The ESP32S2 contains a feature which allows you to trace the execution path the processor
  180. has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
  181. of memory that can't be used for general purposes anymore. Disable this if you do not know
  182. what this is.
  183. config ESP32S2_TRACEMEM_RESERVE_DRAM
  184. hex
  185. default 0x8000 if ESP32S2_MEMMAP_TRACEMEM && ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
  186. default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS
  187. default 0x0
  188. config ESP32S2_ULP_COPROC_ENABLED
  189. bool "Enable Ultra Low Power (ULP) Coprocessor"
  190. default "n"
  191. help
  192. Set to 'y' if you plan to load a firmware for the coprocessor.
  193. If this option is enabled, further coprocessor configuration will appear in the Components menu.
  194. config ESP32S2_ULP_COPROC_RESERVE_MEM
  195. int
  196. prompt "RTC slow memory reserved for coprocessor" if ESP32S2_ULP_COPROC_ENABLED
  197. default 2048 if ESP32S2_ULP_COPROC_ENABLED
  198. range 32 8176 if ESP32S2_ULP_COPROC_ENABLED
  199. default 0 if !ESP32S2_ULP_COPROC_ENABLED
  200. range 0 0 if !ESP32S2_ULP_COPROC_ENABLED
  201. help
  202. Bytes of memory to reserve for ULP coprocessor firmware & data.
  203. Data is reserved at the beginning of RTC slow memory.
  204. config ESP32S2_ULP_COPROC_RISCV
  205. bool "Enable RISC-V as ULP coprocessor"
  206. depends on ESP32S2_ULP_COPROC_ENABLED
  207. default n
  208. help
  209. Set this to y to use the RISC-V coprocessor instead of the FSM-ULP.
  210. config ESP32S2_DEBUG_OCDAWARE
  211. bool "Make exception and panic handlers JTAG/OCD aware"
  212. default y
  213. select FREERTOS_DEBUG_OCDAWARE
  214. help
  215. The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
  216. instead of panicking, have the debugger stop on the offending instruction.
  217. config ESP32S2_BROWNOUT_DET
  218. bool "Hardware brownout detect & reset"
  219. depends on !IDF_ENV_FPGA
  220. default y
  221. help
  222. The ESP32-S2 has a built-in brownout detector which can detect if the voltage is lower than
  223. a specific value. If this happens, it will reset the chip in order to prevent unintended
  224. behaviour.
  225. choice ESP32S2_BROWNOUT_DET_LVL_SEL
  226. prompt "Brownout voltage level"
  227. depends on ESP32S2_BROWNOUT_DET
  228. default ESP32S2_BROWNOUT_DET_LVL_SEL_7
  229. help
  230. The brownout detector will reset the chip when the supply voltage is approximately
  231. below this level. Note that there may be some variation of brownout voltage level
  232. between each ESP3-S2 chip.
  233. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
  234. #of the brownout threshold levels.
  235. config ESP32S2_BROWNOUT_DET_LVL_SEL_7
  236. bool "2.44V"
  237. config ESP32S2_BROWNOUT_DET_LVL_SEL_6
  238. bool "2.56V"
  239. config ESP32S2_BROWNOUT_DET_LVL_SEL_5
  240. bool "2.67V"
  241. config ESP32S2_BROWNOUT_DET_LVL_SEL_4
  242. bool "2.84V"
  243. config ESP32S2_BROWNOUT_DET_LVL_SEL_3
  244. bool "2.98V"
  245. config ESP32S2_BROWNOUT_DET_LVL_SEL_2
  246. bool "3.19V"
  247. config ESP32S2_BROWNOUT_DET_LVL_SEL_1
  248. bool "3.30V"
  249. endchoice
  250. config ESP32S2_BROWNOUT_DET_LVL
  251. int
  252. default 1 if ESP32S2_BROWNOUT_DET_LVL_SEL_1
  253. default 2 if ESP32S2_BROWNOUT_DET_LVL_SEL_2
  254. default 3 if ESP32S2_BROWNOUT_DET_LVL_SEL_3
  255. default 4 if ESP32S2_BROWNOUT_DET_LVL_SEL_4
  256. default 5 if ESP32S2_BROWNOUT_DET_LVL_SEL_5
  257. default 6 if ESP32S2_BROWNOUT_DET_LVL_SEL_6
  258. default 7 if ESP32S2_BROWNOUT_DET_LVL_SEL_7
  259. # Note about the use of "FRC1" name: currently FRC1 timer is not used for
  260. # high resolution timekeeping anymore. Instead the esp_timer API, implemented
  261. # using FRC2 timer, is used.
  262. # FRC1 name in the option name is kept for compatibility.
  263. choice ESP32S2_TIME_SYSCALL
  264. prompt "Timers used for gettimeofday function"
  265. default ESP32S2_TIME_SYSCALL_USE_RTC_FRC1
  266. help
  267. This setting defines which hardware timers are used to
  268. implement 'gettimeofday' and 'time' functions in C library.
  269. - If both high-resolution and RTC timers are used, timekeeping will
  270. continue in deep sleep. Time will be reported at 1 microsecond
  271. resolution. This is the default, and the recommended option.
  272. - If only high-resolution timer is used, gettimeofday will
  273. provide time at microsecond resolution.
  274. Time will not be preserved when going into deep sleep mode.
  275. - If only RTC timer is used, timekeeping will continue in
  276. deep sleep, but time will be measured at 6.(6) microsecond
  277. resolution. Also the gettimeofday function itself may take
  278. longer to run.
  279. - If no timers are used, gettimeofday and time functions
  280. return -1 and set errno to ENOSYS.
  281. - When RTC is used for timekeeping, two RTC_STORE registers are
  282. used to keep time in deep sleep mode.
  283. config ESP32S2_TIME_SYSCALL_USE_RTC_FRC1
  284. bool "RTC and high-resolution timer"
  285. select ESP_TIME_FUNCS_USE_RTC_TIMER
  286. select ESP_TIME_FUNCS_USE_ESP_TIMER
  287. config ESP32S2_TIME_SYSCALL_USE_RTC
  288. bool "RTC"
  289. select ESP_TIME_FUNCS_USE_RTC_TIMER
  290. config ESP32S2_TIME_SYSCALL_USE_FRC1
  291. bool "High-resolution timer"
  292. select ESP_TIME_FUNCS_USE_ESP_TIMER
  293. config ESP32S2_TIME_SYSCALL_USE_NONE
  294. bool "None"
  295. select ESP_TIME_FUNCS_USE_NONE
  296. endchoice
  297. choice ESP32S2_RTC_CLK_SRC
  298. prompt "RTC clock source"
  299. default ESP32S2_RTC_CLK_SRC_INT_RC
  300. help
  301. Choose which clock is used as RTC clock source.
  302. - "Internal 90kHz oscillator" option provides lowest deep sleep current
  303. consumption, and does not require extra external components. However
  304. frequency stability with respect to temperature is poor, so time may
  305. drift in deep/light sleep modes.
  306. - "External 32kHz crystal" provides better frequency stability, at the
  307. expense of slightly higher (1uA) deep sleep current consumption.
  308. - "External 32kHz oscillator" allows using 32kHz clock generated by an
  309. external circuit. In this case, external clock signal must be connected
  310. to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal,
  311. and <1V in case of square wave signal. Common mode voltage should be
  312. 0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
  313. Additionally, 1nF capacitor must be connected between 32K_XP pin and
  314. ground. 32K_XP pin can not be used as a GPIO in this case.
  315. - "Internal 8MHz oscillator divided by 256" option results in higher
  316. deep sleep current (by 5uA) but has better frequency stability than
  317. the internal 90kHz oscillator. It does not require external components.
  318. config ESP32S2_RTC_CLK_SRC_INT_RC
  319. bool "Internal 90kHz RC oscillator"
  320. config ESP32S2_RTC_CLK_SRC_EXT_CRYS
  321. bool "External 32kHz crystal"
  322. select ESP_SYSTEM_RTC_EXT_XTAL
  323. config ESP32S2_RTC_CLK_SRC_EXT_OSC
  324. bool "External 32kHz oscillator at 32K_XN pin"
  325. select ESP_SYSTEM_RTC_EXT_OSC
  326. config ESP32S2_RTC_CLK_SRC_INT_8MD256
  327. bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
  328. endchoice
  329. config ESP32S2_RTC_CLK_CAL_CYCLES
  330. int "Number of cycles for RTC_SLOW_CLK calibration"
  331. default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256
  332. default 576 if ESP32S2_RTC_CLK_SRC_INT_RC
  333. range 0 125000
  334. help
  335. When the startup code initializes RTC_SLOW_CLK, it can perform
  336. calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
  337. frequency. This option sets the number of RTC_SLOW_CLK cycles measured
  338. by the calibration routine. Higher numbers increase calibration
  339. precision, which may be important for applications which spend a lot of
  340. time in deep sleep. Lower numbers reduce startup time.
  341. When this option is set to 0, clock calibration will not be performed at
  342. startup, and approximate clock frequencies will be assumed:
  343. - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
  344. - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
  345. In case more value will help improve the definition of the launch of the crystal.
  346. If the crystal could not start, it will be switched to internal RC.
  347. config ESP32S2_RTC_XTAL_CAL_RETRY
  348. int "Number of attempts to repeat 32k XTAL calibration"
  349. default 3
  350. depends on ESP32S2_RTC_CLK_SRC_EXT_CRYS
  351. help
  352. Number of attempts to repeat 32k XTAL calibration
  353. before giving up and switching to the internal RC.
  354. Increase this option if the 32k crystal oscillator
  355. does not start and switches to internal RC.
  356. config ESP32S2_NO_BLOBS
  357. bool "No Binary Blobs"
  358. depends on !BT_ENABLED
  359. default n
  360. help
  361. If enabled, this disables the linking of binary libraries in the application build. Note
  362. that after enabling this Wi-Fi/Bluetooth will not work.
  363. config ESP32S2_KEEP_USB_ALIVE
  364. bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC
  365. default y if ESP_CONSOLE_USB_CDC
  366. help
  367. During the application initialization process, all the peripherals except UARTs and timers
  368. are reset. Enable this option to keep USB peripheral enabled.
  369. This option is automatically enabled if "USB CDC" console is selected.
  370. config ESP32S2_RTCDATA_IN_FAST_MEM
  371. bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
  372. default n
  373. help
  374. This option allows to place .rtc_data and .rtc_rodata sections into
  375. RTC fast memory segment to free the slow memory region for ULP programs.
  376. config ESP32S2_USE_FIXED_STATIC_RAM_SIZE
  377. bool "Use fixed static RAM size"
  378. default n
  379. help
  380. If this option is disabled, the DRAM part of the heap starts right after the .bss section,
  381. within the dram0_0 region. As a result, adding or removing some static variables
  382. will change the available heap size.
  383. If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
  384. where its length is set with ESP32S2_FIXED_STATIC_RAM_SIZE
  385. config ESP32S2_FIXED_STATIC_RAM_SIZE
  386. hex "Fixed Static RAM size"
  387. default 0x10000
  388. range 0 0x34000
  389. depends on ESP32S2_USE_FIXED_STATIC_RAM_SIZE
  390. help
  391. RAM size dedicated for static variables (.data & .bss sections).
  392. endmenu # ESP32S2-Specific