Kconfig 4.1 KB

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  1. menu "Hardware Settings"
  2. menu "MAC Config"
  3. config ESP_MAC_ADDR_UNIVERSE_WIFI_STA
  4. bool
  5. config ESP_MAC_ADDR_UNIVERSE_WIFI_AP
  6. bool
  7. config ESP_MAC_ADDR_UNIVERSE_BT
  8. bool
  9. config ESP_MAC_ADDR_UNIVERSE_ETH
  10. bool
  11. # Insert chip-specific MAC config
  12. rsource "./port/$IDF_TARGET/Kconfig.mac"
  13. endmenu
  14. menu "Sleep Config"
  15. # This is here since this option affect behavior of esp_light_sleep_start
  16. # regardless of power management configuration.
  17. config ESP_SLEEP_POWER_DOWN_FLASH
  18. bool "Power down flash in light sleep when there is no SPIRAM"
  19. depends on !SPIRAM
  20. default y
  21. help
  22. If enabled, chip will try to power down flash as part of esp_light_sleep_start(), which costs
  23. more time when chip wakes up. Can only be enabled if there is no SPIRAM configured.
  24. This option will in fact consider VDD_SDIO auto power value (ESP_PD_OPTION_AUTO) as OFF. Also, it is
  25. possible to force a power domain to stay ON during light sleep by using esp_sleep_pd_config()
  26. function.
  27. config ESP_SLEEP_RTC_BUS_ISO_WORKAROUND
  28. bool
  29. default y if IDF_TARGET_ESP32 || IDF_TARGET_ESP32S2 || IDF_TARGET_ESP32S3
  30. config ESP_SLEEP_GPIO_RESET_WORKAROUND
  31. bool "light sleep GPIO reset workaround"
  32. default y if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
  33. select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE
  34. help
  35. esp32c3 and esp32s3 will reset at wake-up if GPIO is received a small electrostatic
  36. pulse during light sleep, with specific condition
  37. - GPIO needs to be configured as input-mode only
  38. - The pin receives a small electrostatic pulse, and reset occurs when the pulse
  39. voltage is higher than 6 V
  40. For GPIO set to input mode only, it is not a good practice to leave it open/floating,
  41. The hardware design needs to controlled it with determined supply or ground voltage
  42. is necessary.
  43. This option provides a software workaround for this issue. Configure to isolate all
  44. GPIO pins in sleep state.
  45. config ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND
  46. bool "PSRAM leakage current workaround in light sleep"
  47. depends on SPIRAM
  48. help
  49. When the CS pin of SPIRAM is not pulled up, the sleep current will
  50. increase during light sleep. If the CS pin of SPIRAM has an external
  51. pull-up, you do not need to select this option, otherwise, you
  52. should enable this option.
  53. config ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
  54. bool "Flash leakage current workaround in light sleep"
  55. help
  56. When the CS pin of Flash is not pulled up, the sleep current will
  57. increase during light sleep. If the CS pin of Flash has an external
  58. pull-up, you do not need to select this option, otherwise, you
  59. should enable this option.
  60. endmenu
  61. menu "RTC Clock Config"
  62. # This is used for configure the RTC clock.
  63. config RTC_CLOCK_BBPLL_POWER_ON_WITH_USB
  64. bool "Keep BBPLL clock always work"
  65. depends on ESP_CONSOLE_USB_SERIAL_JTAG || ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG
  66. default y
  67. help
  68. When the chip goes sleep or software reset, the clock source would change to XTAL
  69. and switch off the BBPLL clock for saving power. However, this might make the
  70. USB_SERIAL_JTAG down which depends on BBPLL as its unique clock source.
  71. Therefore, this is used for keeping bbpll clock always on when USB_SERIAL_JTAG PORT is using.
  72. If you want to use USB_SERIAL_JTAG under sw_reset case or sleep-wakeup case, you shoule select
  73. this option. But be aware that this might increase the power consumption.
  74. endmenu
  75. endmenu