esp_efuse_fields.c 3.3 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "esp_efuse.h"
  7. #include "esp_efuse_utility.h"
  8. #include "esp_efuse_table.h"
  9. #include "stdlib.h"
  10. #include "esp_types.h"
  11. #include "assert.h"
  12. #include "esp_err.h"
  13. #include "esp_log.h"
  14. #include "soc/efuse_periph.h"
  15. #include "bootloader_random.h"
  16. #include "sys/param.h"
  17. #include "soc/syscon_reg.h"
  18. const static char *TAG = "efuse";
  19. // Contains functions that provide access to efuse fields which are often used in IDF.
  20. // Returns chip version from efuse
  21. uint8_t esp_efuse_get_chip_ver(void)
  22. {
  23. uint8_t eco_bit0, eco_bit1, eco_bit2;
  24. esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV1, &eco_bit0, 1);
  25. esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_REV2, &eco_bit1, 1);
  26. eco_bit2 = (REG_READ(SYSCON_DATE_REG) & 0x80000000) >> 31;
  27. uint32_t combine_value = (eco_bit2 << 2) | (eco_bit1 << 1) | eco_bit0;
  28. uint8_t chip_ver = 0;
  29. switch (combine_value) {
  30. case 0:
  31. chip_ver = 0;
  32. break;
  33. case 1:
  34. chip_ver = 1;
  35. break;
  36. case 3:
  37. chip_ver = 2;
  38. break;
  39. case 7:
  40. chip_ver = 3;
  41. break;
  42. default:
  43. chip_ver = 0;
  44. break;
  45. }
  46. return chip_ver;
  47. }
  48. // Returns chip package from efuse
  49. uint32_t esp_efuse_get_pkg_ver(void)
  50. {
  51. uint32_t pkg_ver = 0;
  52. esp_efuse_read_field_blob(ESP_EFUSE_CHIP_VER_PKG, &pkg_ver, 4);
  53. return pkg_ver;
  54. }
  55. // Disable BASIC ROM Console via efuse
  56. void esp_efuse_disable_basic_rom_console(void)
  57. {
  58. if (!esp_efuse_read_field_bit(ESP_EFUSE_CONSOLE_DEBUG_DISABLE)) {
  59. esp_efuse_write_field_cnt(ESP_EFUSE_CONSOLE_DEBUG_DISABLE, 1);
  60. ESP_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
  61. }
  62. }
  63. esp_err_t esp_efuse_disable_rom_download_mode(void)
  64. {
  65. #ifndef CONFIG_ESP32_REV_MIN_3
  66. /* Check if we support this revision at all */
  67. if(esp_efuse_get_chip_ver() < 3) {
  68. return ESP_ERR_NOT_SUPPORTED;
  69. }
  70. #endif
  71. if (esp_efuse_read_field_bit(ESP_EFUSE_UART_DOWNLOAD_DIS)) {
  72. return ESP_OK;
  73. }
  74. /* WR_DIS_FLASH_CRYPT_CNT also covers UART_DOWNLOAD_DIS on ESP32 */
  75. if(esp_efuse_read_field_bit(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT)) {
  76. return ESP_ERR_INVALID_STATE;
  77. }
  78. return esp_efuse_write_field_bit(ESP_EFUSE_UART_DOWNLOAD_DIS);
  79. }
  80. esp_err_t esp_efuse_set_rom_log_scheme(esp_efuse_rom_log_scheme_t log_scheme)
  81. {
  82. return ESP_ERR_NOT_SUPPORTED;
  83. }
  84. void esp_efuse_write_random_key(uint32_t blk_wdata0_reg)
  85. {
  86. uint32_t buf[8];
  87. uint8_t raw[24];
  88. if (esp_efuse_get_coding_scheme(EFUSE_BLK2) == EFUSE_CODING_SCHEME_NONE) {
  89. bootloader_fill_random(buf, sizeof(buf));
  90. } else { // 3/4 Coding Scheme
  91. bootloader_fill_random(raw, sizeof(raw));
  92. esp_err_t r = esp_efuse_utility_apply_34_encoding(raw, buf, sizeof(raw));
  93. (void) r;
  94. assert(r == ESP_OK);
  95. }
  96. ESP_LOGV(TAG, "Writing random values to address 0x%08x", blk_wdata0_reg);
  97. for (int i = 0; i < 8; i++) {
  98. ESP_LOGV(TAG, "EFUSE_BLKx_WDATA%d_REG = 0x%08x", i, buf[i]);
  99. REG_WRITE(blk_wdata0_reg + 4*i, buf[i]);
  100. }
  101. bzero(buf, sizeof(buf));
  102. bzero(raw, sizeof(raw));
  103. }
  104. // Permanently update values written to the efuse write registers
  105. void esp_efuse_burn_new_values(void)
  106. {
  107. esp_efuse_utility_burn_efuses();
  108. }